scholarly journals A High-Efficiency K-band MMIC Linear Amplifier Using Diode Compensation

Electronics ◽  
2019 ◽  
Vol 8 (5) ◽  
pp. 487 ◽  
Author(s):  
Zhu ◽  
Chen ◽  
Huang ◽  
Wang ◽  
Yu
Keyword(s):  
Output Power ◽  
High Efficiency ◽  
Small Signal Gain ◽  
Small Signal ◽  
Third Order ◽  
Nonlinear Capacitance ◽  
Power Added Efficiency ◽  
Linear Amplifier ◽  
Enhancement Method ◽  
K Band

This paper describes the design and measured performance of a high-efficiency and linearity-enhanced K-band MMIC amplifier fabricated with a 0.15 μm GaAs pHEMT processing technology. The linearization enhancement method utilizing a parallel nonlinear capacitance compensation diode was analyzed and verified. The three-stage MMIC operating at 20–22 GHz obtained an improved third-order intermodulation ratio (IM3) of 20 dBc at a 27 dBm per carrier output power while demonstrating higher than a 27 dB small signal gain and 1-dB compression point output power of 30 dBm with 33% power added efficiency (PAE). The chip dimension was 2.00 mm × 1.40 mm.

Optimization of InP DHBT stacked-transistors for millimeter-wave power amplifiers

2018 ◽  
Vol 10 (9) ◽  
pp. 999-1010 ◽  
Author(s):  
Michele Squartecchia ◽  
Tom K. Johansen ◽  
Jean-Yves Dupuy ◽  
Virginio Midili ◽  
Virginie Nodjiadjim ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Output Power ◽  
Heterojunction Bipolar Transistors ◽  
Power Amplifiers ◽  
Small Signal Gain ◽  
Small Signal ◽  
Large Signal ◽  
Signal Gain ◽  
Power Added Efficiency ◽  
Saturated Output Power

AbstractIn this paper, we report the analysis, design, and implementation of stacked transistors for power amplifiers realized on InP Double Heterojunction Bipolar Transistors (DHBTs) technology. A theoretical analysis based on the interstage matching between all the single transistors has been developed starting from the small-signal equivalent circuit. The analysis has been extended by including large-signal effects and layout-related limitations. An evaluation of the maximum number of transistors for positive incremental power and gain is also carried out. To validate the analysis, E-band three- and four-stacked InP DHBT matched power cells have been realized for the first time as monolithic microwave integrated circuits (MMICs). For the three-stacked transistor, a small-signal gain of 8.3 dB, a saturated output power of 15 dBm, and a peak power added efficiency (PAE) of 5.2% have been obtained at 81 GHz. At the same frequency, the four-stacked transistor achieves a small-signal gain of 11.5 dB, a saturated output power of 14.9 dBm and a peak PAE of 3.8%. A four-way combined three-stacked MMIC power amplifier has been implemented as well. It exhibits a linear gain of 8.1 dB, a saturated output power higher than 18 dBm, and a PAE higher than 3% at 84 GHz.

Wideband high-efficiency linearized PA design with reduction in memory effects and IMD3

2018 ◽  
Vol 10 (4) ◽  
pp. 391-400 ◽  
Author(s):  
Xuekun Du ◽  
Chang Jiang You ◽  
Yulong Zhao ◽  
Xiang Li ◽  
Mohamed Helaoui ◽  
...  
Keyword(s):  
Output Power ◽  
Average Output Power ◽  
High Efficiency ◽  
Second Harmonic ◽  
Memory Effects ◽  
Third Order ◽  
Average Output ◽  
Power Added Efficiency ◽  
Low Pass ◽  
Intermodulation Distortions

ABSTRACTAn analytical method is proposed to reduce the memory effects and third-order intermodulation distortions for improving the linearity of wideband power amplifier (PA). An excellent linearity can be obtained by reducing the second-harmonic output power levels and reducing the envelope voltage components in the megahertz range. An improved wideband Chebyshev low-pass matching network including the bias network is analyzed and designed to validate the proposed method. The measured results indicate that a wideband high-efficiency linearized PA is realized from 1.35 to 2.45 GHz (fractional bandwidth = 58%) with power added efficiency of 60–78%, power gain of 10.8–12.3 dB, and output power of 40.0–41.2 dBm. For a 20 MHz LTE modulated signal, the adjacent channel leakage ratios (ACLRs) of the proposed PA with digital pre-distortion (DPD) linearization are −55.7 ~ −53.9 dBc across 1.5–2.4 GHz at an average output power of 32.4–33.6 dBm. For a 40 MHz two-carrier LTE modulated signal, the ACLRs of the proposed PA with DPD linearization are −51.1 ~ −48.2 dBc at an average output power of ~30.5 dBm in the frequency range from 1.5 GHz to 2.4 GHz.

A 4.2-to-5.4 GHz stacked GaAs HBT power amplifier for C-band applications

Circuit World ◽  
2020 ◽  
Vol 46 (4) ◽  
pp. 243-248
Author(s):  
Min Liu ◽  
Panpan Xu ◽  
Jincan Zhang ◽  
Bo Liu ◽  
Liwen Zhang
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
High Power ◽  
High Efficiency ◽  
Common Source ◽  
Power Performance ◽  
Matching Network ◽  
Content Type ◽  
Power Added Efficiency ◽  
Saturated Output Power

Purpose Power amplifiers (PAs) play an important role in wireless communications because they dominate system performance. High-linearity broadband PAs are of great value for potential use in multi-band system implementation. The purpose of this paper is to present a cascode power amplifier architecture to achieve high power and high efficiency requirements for 4.2∼5.4 GHz applications. Design/methodology/approach A common emitter (CE) configuration with a stacked common base configuration of heterojunction bipolar transistor (HBT) is used to achieve high power. T-type matching network is used as input matching network. To increase the bandwidth, the output matching networks are implemented using the two L-networks. Findings By using the proposed method, the stacked PA demonstrates a maximum saturated output power of 26.2 dBm, a compact chip size of 1.17 × 0.59 mm2 and a maximum power-added efficiency of 46.3 per cent. The PA shows a wideband small signal gain with less than 3 dB variation over working frequency. The saturated output power of the proposed PA is higher than 25 dBm between 4.2 and 5.4 GHz. Originality/value The technology adopted for the design of the 4.2-to-5.4 GHz stacked PA is the 2-µm gallium arsenide HBT process. Based on the proposed method, a better power performance of 3 dB improvement can be achieved as compared with the conventional CE or common-source amplifier because of high output stacking impedance.

scholarly journals A K-Band RF-MEMS-Enabled Reconfigurable and Multifunctional Low-Noise Amplifier Hybrid Circuit

2011 ◽  
Vol 2011 ◽  
pp. 1-7 ◽  
Author(s):  
R. Malmqvist ◽  
C. Samuelsson ◽  
A. Gustafsson ◽  
P. Rantakari ◽  
S. Reyaz ◽  
...  
Keyword(s):  
Rf Mems ◽  
Noise Figure ◽  
Low Noise ◽  
Small Signal Gain ◽  
Small Signal ◽  
Mems Switch ◽  
Noise Amplifier ◽  
Hybrid Circuit ◽  
24 Ghz ◽  
K Band

A K-band (18–26.5 GHz) RF-MEMS-enabled reconfigurable and multifunctional dual-path LNA hybrid circuit (optimised for lowest/highest possible noise figure/linearity, resp.) is presented, together with its subcircuit parts. The two MEMS-switched low-NF (higher gain) and high-linearity (lower gain) LNA circuits (paths) present 16.0 dB/8.2 dB, 2.8 dB/4.9 dB and 15 dBm/20 dBm of small-signal gain, noise figure, and 1 dB compression point at 24 GHz, respectively. Compared with the two (fixed) LNA subcircuits used within this design, the MEMS-switched LNA circuit functions show minimum 0.6–1.3 dB higher NF together with similar values ofP1 dBat 18–25 GHz. The gain of one LNA circuit path is reduced by 25–30 dB when the MEMS switch and active circuitry used within in the same switching branch are switched off to select the other LNA path and minimise power consumption.

Wideband, high-efficiency, high-power GaN amplifiers, using MIC and quasi-MMIC technologies, in the 1–4 GHz range

2014 ◽  
Vol 7 (1) ◽  
pp. 1-12 ◽  
Author(s):  
Chamssedine Berrached ◽  
Diane Bouw ◽  
Marc Camiade ◽  
Kassem El-Akhdar ◽  
Denis Barataud ◽  
...  
Keyword(s):  
Output Power ◽  
High Power ◽  
High Efficiency ◽  
Continuous Wave ◽  
Power Gain ◽  
Frequency Range ◽  
Final Size ◽  
Trade Off ◽  
Power Added Efficiency ◽  
Circuit Technology

In this paper, the designs and experimental performances of wideband (higher than one octave) high-efficiency, high-power amplifiers (HPA) working in the 1–4 GHz range, using the same GaN process, are presented. They are based on the Bode–Fano integrals, which can be applied to a trade-off calculation between bandwidth and efficiency. Firstly, an microwave intregrated circuits (MIC) wideband HPA, externally matched, is presented. It generates a continuous wave (CW) output power (Pout) greater than 40 W, a power gain (GP) higher than 9.2 dB and a corresponding power added efficiency (PAE) (drain efficiency (DE)) ranged between 36 and 44% (40 and 48%) over the 1–3 GHz bandwidth. Two other amplifiers have been designed upon the same theoretical methodology, with a passive GaAs MMIC circuit technology, enabling to reduce the final size down to 420 mm2. The first internally matched Quasi monolithic microwave intergrated circuits (Quasi-MMIC) single-ended HPA generates a pulsed Pout greater than 25 W, GP higher than 9.8 dB, and a corresponding PAE (DE) ranged between 37 and 52.5% (40 and 55%) over the 2–4 GHz bandwidth. The second internally matched Quasi-MMIC HPA, based on balanced architecture, generates a pulsed Pout higher than 45 W, GP higher than 9.5 dB and PAE (DE) ranged between 33 and 44% (38 and 50%) over the 2–4 GHz bandwidth. These results are among the best ones published in terms of PAE and Pout in instantaneous octave bandwidth in the 1–4 GHz frequency range.

A 10-W S-band class-B GaN amplifier with a dynamic gate bias circuit for linearity enhancement

2013 ◽  
Vol 6 (1) ◽  
pp. 3-11 ◽  
Author(s):  
Pierre Medrel ◽  
Audrey Martin ◽  
Tibault Reveyrand ◽  
Guillaume Neveux ◽  
Denis Barataud ◽  
...  
Keyword(s):  
Output Power ◽  
Trajectory Optimization ◽  
High Efficiency ◽  
Average Power ◽  
Gate Bias ◽  
Error Vector Magnitude ◽  
Power Added Efficiency ◽  
Class B ◽  
Band Class ◽  
A Minor

In the present paper, we present a dynamic gate biasing technique applied to a 10 W, S-band GaN amplifier. The proposed methodology addresses class-B operation of power amplifiers that offers the potential for high efficiency but requires a careful attention to maintain good linearity performances at large output power back-off. This work proposes a solution to improve the linearity of class-B amplifiers driven by radio frequency-modulated signals having large peak to average power ratios. An important aspect of this work concerns the characterization of the dynamic behavior of GaN devices for gate bias trajectory optimization. For that purpose, the experimental study reported here is based on the use of a time-domain envelope setup. A specific gate bias circuit has been designed and connected to a 10 W – 2.5 GHz GaN amplifier demo board from CREE. Compared to conventional class-B operation with a fixed gate bias, a 10-dB improvement in terms of third-order intermodulation is reached. When applied to the amplification of 16-QAM signals the proposed technique demonstrates significant ACPR reduction of order of 6 dB along with error vector magnitude (EVM) improvements of five points over 8 dB output power back-off with a minor impact on power-added efficiency performances.

Effect of the Gas Temperature of a High-Power Chemical Oxygen-Iodine Laser on Calculated Small Signal Gain and Output Power

1995 ◽  
Vol 34 (Part 1, No. 4A) ◽  
pp. 1867-1873
Author(s):  
Tsutomu Fukuda ◽  
Sanichiro Yoshida ◽  
Hiroshi Ohue ◽  
Takeshi Tomizawa ◽  
Tomoo Fujioka ◽  
...  
Keyword(s):  
Output Power ◽  
High Power ◽  
Small Signal Gain ◽  
Small Signal ◽  
Gas Temperature ◽  
Iodine Laser ◽  
Signal Gain ◽  
Chemical Oxygen Iodine Laser

scholarly journals Analysis and Compensation of the AM-AM and AM-PM Distortion for CMOS Cascode Class-E Power Amplifier

2009 ◽  
Vol 2009 ◽  
pp. 1-9 ◽  
Author(s):  
Wen An Tsou ◽  
Wen Shen Wuen ◽  
Tzu Yi Yang ◽  
Kuei Ann Wen
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Signal Source ◽  
Nonlinear Capacitance ◽  
Power Added Efficiency ◽  
Equivalent Impedance ◽  
Common Gate ◽  
Class E

Analysis and compensation methodology of the AM-AM and AM-PM distortion of cascode class-E power amplifiers are presented. A physical-based model is proposed to illustrate that the nonlinear capacitance and transconductance cause the AM-AM and AM-PM distortion when modulating the supply voltage of the PA. A novel methodology that can reduce the distortion is also proposed. By degenerating common-gate transistor into a resistor, the constant equivalent impedance is obtained so that the AM-AM and AM-PM distortion is compensated. An experimental prototype of 2.6 GHz cascode class-E power amplifier with the AM-AM and AM-PM compensation has been integrated in a 0.18 μm CMOS technology, occupies a total die area of 1.6 mm2. It achieves a drain efficiency of 17.8% and a power-added efficiency of 16.6% while delivering 12 dBm of linear output power and drawing 31 mA from a 1.8 V supply. Finally, a co-simulation result demonstrated that, when the distortion of the PA has been compensated, the EVM is improved from −17 dB to −19 dB with an IEEE802.11a-like signal source.

The Design and Modeling of 2.4 and 3.5 GHz MMIC PA

2012 ◽  
pp. 105-156
Author(s):  
Chin Guek Ang
Keyword(s):  
Power Amplifier ◽  
Wireless Lan ◽  
Return Loss ◽  
High Electron Mobility Transistor ◽  
Small Signal Gain ◽  
Small Signal ◽  
Signal Gain ◽  
Power Added Efficiency ◽  
Input And Output ◽  
Amplifier Design

This chapter discusses the design of MMIC power amplifiers for wireless application by using 0.15 µm GaAs Power Pseudomorphic High Electron Mobility Transistor (PHEMT) technology with a gate width of 100 µm and 10 fingers at 2.4 GHz and 3.5 GHz. The design methodology for power amplifier design can be broken down into three main sections: architecture design, small-signal design, and large-signal optimization. For 2.4 GHz power amplifier, with 3.0 V drain voltage, the amplifier has achieved 17.265 dB small-signal gain, input and output return loss of 16.310 dB and 14.418 dB, 14.862 dBm 1-dB compression power with 12.318% power-added efficiency (PAE). For 3.5GHz power amplifier, the amplifier has achieved 14.434 dB small-signal gain, input and output return loss of 12.612 dB and 11.746 dB, 14.665 dBm 1-dB compression power with 11.796% power-added efficiency (PAE). The 2.4 GHz power amplifier can be applied for Wireless LAN applications such as WiFi and WPAN whereas 3.5 GHz power amplifier for WiMax base station.

scholarly journals Yb3+ Sensitised Er3+ Doped Silica Optical Fibre with Ultra High Transfer Efficiency and Gain

1991 ◽  
Vol 244 ◽  
Author(s):  
J. E. Townsend ◽  
W. L. Barnes ◽  
S. G. Crubb
Keyword(s):  
Energy Transfer ◽  
Output Power ◽  
Power Amplifier ◽  
Energy Transfer Efficiency ◽  
Transfer Efficiency ◽  
Design Parameters ◽  
Small Signal Gain ◽  
Small Signal ◽  
Multicomponent Glass ◽  
Silica Fibre

ABSTRACTEfficient 1.54 μm emission under 1064nm excitation of Er3+/Yb3+ codoped silica fibre is reported. The energy transfer efficiency from Yb3+ to Er3+, of at least 85%, even under high inversion, is comparable to that in multicomponent glass fibres. Fibre design parameters are discussed and results presented. Small signal gain of ˜ 45dB is also measured and a power amplifier giving 145mW output power demonstrated.

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