scholarly journals Characterization of SiO2/4H-SiC Interfaces in 4H-SiC MOSFETs: A Review

Energies ◽  
2019 ◽  
Vol 12 (12) ◽  
pp. 2310 ◽  
Author(s):  
Patrick Fiorenza ◽  
Filippo Giannazzo ◽  
Fabrizio Roccaforte
Keyword(s):  
Field Effect Transistors ◽  
Electrical Characterization ◽  
Chemical Characterization ◽  
Oxide Semiconductor ◽  
Physical Parameters ◽  
Characterization Methods ◽  
Channel Mobility ◽  
Doping Effects ◽  
Transient Capacitance ◽  
Microscopy Techniques

This paper gives an overview on some state-of-the-art characterization methods of SiO2/4H-SiC interfaces in metal oxide semiconductor field effect transistors (MOSFETs). In particular, the work compares the benefits and drawbacks of different techniques to assess the physical parameters describing the electronic properties and the current transport at the SiO2/SiC interfaces (interface states, channel mobility, trapping phenomena, etc.). First, the most common electrical characterization techniques of SiO2/SiC interfaces are presented (e.g., capacitance- and current-voltage techniques, transient capacitance, and current measurements). Then, examples of electrical characterizations at the nanoscale (by scanning probe microscopy techniques) are given, to get insights on the homogeneity of the SiO2/SiC interface and the local interfacial doping effects occurring upon annealing. The trapping effects occurring in SiO2/4H-SiC MOS systems are elucidated using advanced capacitance and current measurements as a function of time. In particular, these measurements give information on the density (~1011 cm−2) of near interface oxide traps (NIOTs) present inside the SiO2 layer and their position with respect to the interface with SiC (at about 1–2 nm). Finally, it will be shown that a comparison of the electrical data with advanced structural and chemical characterization methods makes it possible to ascribe the NIOTs to the presence of a sub-stoichiometric SiOx layer at the interface.

High-Mobility SiC MOSFETs with Alkaline Earth Interface Passivation

2016 ◽  
Vol 858 ◽  
pp. 671-676 ◽  
Author(s):  
Daniel J. Lichtenwalner ◽  
Vipindas Pala ◽  
Brett A. Hull ◽  
Scott Allen ◽  
John W. Palmour
Keyword(s):  
Nitric Oxide ◽  
Field Effect ◽  
Alkaline Earth ◽  
Phonon Scattering ◽  
Breakdown Strength ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Field Effect Mobility ◽  
Channel Mobility ◽  
Alkaline Earth Elements

Alkaline earth elements Sr and Ba provide SiO2/SiC interface conditions suitable for obtaining high channel mobility metal-oxide-semiconductor field-effect-transistors (MOSFETs) on the Si-face (0001) of 4H-SiC, without the standard nitric oxide (NO) anneal. The alkaline earth elements Sr and Ba located at/near the SiO2/SiC interface result in field-effect mobility (μFE) values as high as 65 and 110 cm2/V.s, respectively, on 5×1015 cm-3 Al-doped p-type SiC. As the SiC doping increases, peak mobility decreases as expected, but the peak mobility remains higher for Ba interface layer (Ba IL) devices compared to NO annealed devices. The Ba IL MOSFET field-effect mobility decreases as the temperature is increased to 150 °C, as expected when mobility is phonon-scattering-limited, not interface-trap-limited. This is in agreement with measurements of the interface state density (DIT) using the high-low C-V technique, indicating that the Ba IL results in lower DIT than that of samples with nitric oxide passivation. Vertical power MOSFET (DMOSFET) devices (1200V, 15A) fabricated with the Ba IL have a 15% lower on-resistance compared to devices with NO passivation. The DMOSFET devices with a Ba IL maintain a stable threshold voltage under NBTI stress conditions of-15V gate bias stress, at 150 °C for 100hrs, indicating no mobile ions. Secondary-ion mass-spectrometry (SIMS) analysis confirms that the Sr and Ba remain predominantly at the SiO2/SiC interface, even after high temperature oxide annealing, consistent with the observed high channel mobility after these anneals. The alkaline earth elements result in enhanced SiC oxidation rate, and the resulting gate oxide breakdown strength is slightly reduced compared to NO annealed thermal oxides on SiC.

MBE Growth of Oxides for III–N MOSFETs

1999 ◽  
Vol 573 ◽  
Author(s):  
B. Gila ◽  
K N. Lee ◽  
J Laroche ◽  
F Ren ◽  
S. M. Donovan ◽  
...  
Keyword(s):  
Thermal Stability ◽  
High Performance ◽  
Gate Dielectric ◽  
Field Effect Transistors ◽  
Electrical Characterization ◽  
Dielectric Materials ◽  
Interface State ◽  
Oxide Semiconductor ◽  
Good Thermal Stability ◽  
Deposition Conditions

ABSTRACTReproducible fabrication of high performance metal oxide semiconductor field effect transistors (MOSFETs) from compound semiconductors will require both good interfacial electrical characteristics and good thermal stability. While dielectrics such as SiO2, AIN, and GdGaOx have demonstrated low to moderate interface state densities, questions remain about their thermal stability and reliability, particularly for use in high power or high temperature widebandgap devices. In this paper we will compare the utility of two potential gate dielectric materials: GdOx and GaOx. GdOx has been found to produce layers with excellent surface morphologies as evidenced by surface roughness of less than I nm. Stoichiometric films can be easily obtained over a range of deposition conditions, though deposition temperatures of 500°C appear to offer the optimum interfacial electrical quality. By contrast GaOx films are quite rough, polycrystalline and show poor thermal stability. Further they exhibit a range of stoichiometries depending upon deposition temperature, Ga flux and oxygen flux. This paper will describe the relationship between deposition conditions and film characteristics for both materials, and will present electrical characterization of capacitors fabricated from GdOx on Si.

Evaluation of the Impact of Al Atoms on SiO2/ SiC Interface Property by Using 4H-SiC n+-Channel Junctionless MOSFET

2019 ◽  
Vol 963 ◽  
pp. 171-174
Author(s):  
Hironori Takeda ◽  
Takuji Hosoi ◽  
Takayoshi Shimura ◽  
Heiji Watanabe
Keyword(s):  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Electrical Characteristics ◽  
Al Doping ◽  
Oxidation Condition ◽  
Channel Mobility ◽  
Interface Property ◽  
Effective Mobility ◽  
The Impact

To investigate the impact of Al atoms on channel mobility at SiO2/SiC interface, we fabricated the junctionless metal-oxide-semiconductor field-effect transistors (MOSFETs), in which thin n+-SiC epitaxial layers with and without Al+ ion implantation were used as a channel, and compared their electrical characteristics. The effective mobility (meff) of n+-channel junctionless MOSFET without Al doping was estimated to be 14.9 cm2/Vs, which is higher than inversion-mode MOSFET fabricated with the same gate oxidation condition (3.1 cm2/Vs). The meff values of the MOSFETs with low Al doping concentration (5´1017 and 1´1018 cm-3) were almost the same as that of Al-free MOSFET, and the device with the highest Al doping (5´1018 cm-3) exhibited slight mobility degradation of about 15% compared to the other devices. Hall mobility in thick n+ layer with the highest Al doping was also slightly degraded, suggesting that Al atoms in the channel are not the major cause of degraded SiO2/SiC interface property.

Shallow Traps at P-Doped SiO2/4H-SiC(0001) Interface

2011 ◽  
Vol 679-680 ◽  
pp. 338-341 ◽  
Author(s):  
Dai Okamoto ◽  
Hiroshi Yano ◽  
Shinya Kotake ◽  
Tomoaki Hatayama ◽  
Takashi Fuyuki
Keyword(s):  
Photoelectron Spectroscopy ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Interface Traps ◽  
Channel Mobility ◽  
X Ray ◽  
Capacitance Voltage ◽  
Shallow Traps

We report on electrical and physical investigations aimed to clarify the mechanisms behind the high channel mobility of 4H-SiC metal–oxide–semiconductor field-effect transistors processed with POCl3 annealing. By low-temperature capacitance–voltage analysis, we found that the shallow interface traps are effectively removed by P incorporation. Using x-ray photoelectron spectroscopy, we found that the three-fold coordinated P atoms exist at the oxide/4H-SiC interface. The overall results suggest that P atoms directly remove the Si–Si bonds and thus eliminate the near-interface traps.

Effect of Gate Wet Reoxidation on Reliability and Channel Mobility of Metal-Oxide-Semiconductor Field-Effect Transistors Fabricated on 4H-SiC(000-1)

2008 ◽  
Vol 600-603 ◽  
pp. 791-794 ◽  
Author(s):  
Takuma Suzuki ◽  
Junji Senzaki ◽  
Tetsuo Hatakeyama ◽  
Kenji Fukuda ◽  
Takashi Shinohe ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Field Effect ◽  
Dielectric Breakdown ◽  
Field Effect Transistors ◽  
Gate Oxide ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Channel Mobility ◽  
Time Dependent Dielectric Breakdown ◽  
Oxide Reliability

The channel mobility and oxide reliability of metal-oxide-semiconductor field-effect transistors (MOSFETs) on 4H-SiC (0001) carbon face were investigated. The gate oxide was fabricated by using dry-oxidized film followed by pyrogenic reoxidation annealing (ROA). Significant improvements in the oxide reliability were observed by time-dependent dielectric breakdown (TDDB) measurement. Furthermore, the field-effect inversion channel mobility (μFE) of MOSFETs fabricated by using pyrogenic ROA was as high as that of conventional 4H-SiC (0001) MOSFETs having the pyrogenic-oxidized gate oxide. It is suggested that the pyrogenic ROA of dry oxide as a method of gate oxide fabrication satisfies both channel mobility and oxide reliability on 4H-SiC (0001) carbon-face MOSFETs.

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