scholarly journals VDS and VGS Depolarization Effect on SiC MOSFET Short-Circuit Withstand Capability Considering Partial Safe Failure-Mode

Energies ◽  
2021 ◽  
Vol 14 (23) ◽  
pp. 7960
Author(s):  
Yazan Barazi ◽  
Frédéric Richardeau ◽  
Wadia Jouha ◽  
Jean-Michel Reynes

This paper presents a detailed analysis of 1200 V Silicon Carbide (SiC) power MOSFET exhibiting different short-circuit failure mechanisms and improvement in reliability by VDS and VGS depolarization. The device robustness has undergone an incremental pulse under different density decreasing; either drain-source voltage or gate-driver voltage. Unlike silicon device, the SiC MOSFET failure mechanism firstly displays specific gradual gate-cracks mechanism and progressive gate-damage accumulations greater than 4 µs/9 J·cm−2. Secondly, a classical drain-source thermal runaway appears, as for silicon devices, in a time greater than 9 µs. Correlations with short-circuit energy measurements and temperature simulations are investigated. It is shown that the first mechanism is an incremental soft gate-failure-mode which can be easily used to detect and protect the device by a direct feedback on the gate-driver. Furthermore, it is highlighted that this new mechanism can be sufficiently consolidated to avoid the second drain-source mechanism which is a hard-failure-mode. For this purpose, it is proposed to sufficiently depolarize the on-state gate-drive voltage to reduce the chip heating-rate and thus to decouple the failure modes. The device is much more robust with a short-circuit withstand time higher than 10 µs, as in silicon, no risk of thermal runaway and with an acceptable penalty on RDS-ON.

2017 ◽  
Vol 897 ◽  
pp. 525-528 ◽  
Author(s):  
Ronald Green ◽  
Damian P. Urciuoli ◽  
Aivars J. Lelis

This paper presents electrical results for two different commercial devices and one prototype 1.2 kV SiC power MOSFET device subject to short-circuit (SC) stress. Two failure modes were observed among the devices tested, with one mode of failure resulting in catastrophic device destruction and the other resulting in permanent damage of the insulating gate dielectric manifested as a leakage current of 400 mA. Short-circuit pulses of increasing time duration caused a reduction in the gate-to-source voltage toward the falling edge of the pulse. This phenomenon is a precursor to failure of SiC MOSFETs under SC stress, but this reduction in VGS is not known to occur in silicon-based devices. The measured short-circuit withstand times for commercial devices from group A and B MOSFETs were 8 us and 12 us, respectively. MOSFET-C devices had a withstand time of 7 us. A larger chip size improves robustness even for large values of peak short-circuit current.


Materials ◽  
2022 ◽  
Vol 15 (2) ◽  
pp. 598
Author(s):  
Yuan Zou ◽  
Jue Wang ◽  
Hongyi Xu ◽  
Hengyu Wang

In this paper, the short-circuit robustness of 1200 V silicon carbide (SiC) trench MOSFETs with different gate structures has been investigated. The MOSFETs exhibited different failure modes under different DC bus voltages. For double trench SiC MOSFETs, failure modes are gate failure at lower dc bus voltages and thermal runaway at higher dc bus voltages, while failure modes for asymmetric trench SiC MOSFETs are soft failure and thermal runaway, respectively. The shortcircuit withstanding time (SCWT) of the asymmetric trench MOSFET is higher than that of the double trench MOSFETs. The thermal and mechanical stresses inside the devices during the short-circuit tests have been simulated to probe into the failure mechanisms and reveal the impact of the device structures on the device reliability. Finally, post-failure analysis has been carried out to verify the root causes of the device failure.


Materials ◽  
2021 ◽  
Vol 14 (24) ◽  
pp. 7844
Author(s):  
Genwei Wang ◽  
Shu Zhang ◽  
Meng Li ◽  
Juanjuan Wu ◽  
Bin Wang ◽  
...  

To explore the failure modes of high-Ni batteries under different axial loads, quasi-static compression and dynamic impact tests were carried out. The characteristics of voltage, load, and temperature of a battery cell with different states of charge (SOCs) were investigated in quasi-static tests. The mechanical response and safety performance of lithium-ion batteries subjected to axial shock wave impact load were also investigated by using a split Hopkinson pressure bar (SHPB) system. Different failure modes of the battery were identified. Under quasi-static axial compression, the intensity of thermal runaway becomes more severe with the increase in SOC and loading speed, and the time for lithium-ion batteries to reach complete failure decreases with the increase in SOC. In comparison, under dynamic SHPB experiments, an internal short circuit occurred after impact, but no violent thermal runaway was observed.


Author(s):  
Cha-Ming Shen ◽  
Tsan-Cheng Chuang ◽  
Jie-Fei Chang ◽  
Jin-Hong Chou

Abstract This paper presents a novel deductive methodology, which is accomplished by applying difference analysis to nano-probing technique. In order to prove the novel methodology, the specimens with 90nm process and soft failures were chosen for the experiment. The objective is to overcome the difficulty in detecting non-visual, erratic, and complex failure modes. And the original idea of this deductive method is based on the complete measurement of electrical characteristic by nano-probing and difference analysis. The capability to distinguish erratic and invisible defect was proven, even when the compound and complicated failure mode resulted in a puzzling characteristic.


Author(s):  
Martin Versen ◽  
Dorina Diaconescu ◽  
Jerome Touzel

Abstract The characterization of failure modes of DRAM is often straight forward if array related hard failures with specific addresses for localization are concerned. The paper presents a case study of a bitline oriented failure mode connected to a redundancy evaluation in the DRAM periphery. The failure mode analysis and fault modeling focus both on the root-cause and on the test aspects of the problem.


Author(s):  
Bhanu P. Sood ◽  
Michael Pecht ◽  
John Miker ◽  
Tom Wanek

Abstract Schottky diodes are semiconductor switching devices with low forward voltage drops and very fast switching speeds. This paper provides an overview of the common failure modes in Schottky diodes and corresponding failure mechanisms associated with each failure mode. Results of material level evaluation on diodes and packages as well as manufacturing and assembly processes are analyzed to identify a set of possible failure sites with associated failure modes, mechanisms, and causes. A case study is then presented to illustrate the application of a systematic FMMEA methodology to the analysis of a specific failure in a Schottky diode package.


Author(s):  
Elena Bartolomé ◽  
Paula Benítez

Failure Mode and Effect Analysis (FMEA) is a powerful quality tool, widely used in industry, for the identification of failure modes, their effects and causes. In this work, we investigated the utility of FMEA in the education field to improve active learning processes. In our case study, the FMEA principles were adapted to assess the risk of failures in a Mechanical Engineering course on “Theory of Machines and Mechanisms” conducted through a project-based, collaborative “Study and Research Path (SRP)” methodology. The SRP is an active learning instruction format which is initiated by a generating question that leads to a sequence of derived questions and answers, and combines moments of study and inquiry. By applying the FMEA, the teaching team was able to identify the most critical failures of the process, and implement corrective actions to improve the SRP in the subsequent year. Thus, our work shows that FMEA represents a simple tool of risk assesment which can serve to identify criticality in educational process, and improve the quality of active learning.


Energies ◽  
2020 ◽  
Vol 14 (1) ◽  
pp. 118
Author(s):  
Feng Zhu ◽  
Runzhou Zhou ◽  
David J. Sypeck

In this work, a computational study was carried out to simulate crushing tests on lithium-ion vehicle battery modules. The tests were performed on commercial battery modules subject to wedge cutting at low speeds. Based on loading and boundary conditions in the tests, finite element (FE) models were developed using explicit FEA code LS-DYNA. The model predictions demonstrated a good agreement in terms of structural failure modes and force–displacement responses at both cell and module levels. The model was extended to study additional loading conditions such as indentation by a cylinder and a rectangular block. The effect of other module components such as the cover and cooling plates was analyzed, and the results have the potential for improving battery module safety design. Based on the detailed FE model, to reduce its computational cost, a simplified model was developed by representing the battery module with a homogeneous material law. Then, all three scenarios were simulated, and the results show that this simplified model can reasonably predict the short circuit initiation of the battery module.


Sign in / Sign up

Export Citation Format

Share Document