scholarly journals Investigation on Ge0.8Si0.2-Selective Atomic Layer Wet-Etching of Ge for Vertical Gate-All-Around Nanodevice

Nanomaterials ◽  
2021 ◽  
Vol 11 (6) ◽  
pp. 1408
Author(s):  
Lu Xie ◽  
Huilong Zhu ◽  
Yongkui Zhang ◽  
Xuezheng Ai ◽  
Junjie Li ◽  
...  

For the formation of nano-scale Ge channels in vertical Gate-all-around field-effect transistors (vGAAFETs), the selective isotropic etching of Ge selective to Ge0.8Si0.2 was considered. In this work, a dual-selective atomic layer etching (ALE), including Ge0.8Si0.2-selective etching of Ge and crystal-orientation selectivity of Ge oxidation, has been developed to control the etch rate and the size of the Ge nanowires. The ALE of Ge in p+-Ge0.8Si0.2/Ge stacks with 70% HNO3 as oxidizer and deionized (DI) water as oxide-removal was investigated in detail. The saturated relative etched amount per cycle (REPC) and selectivity at different HNO3 temperatures between Ge and p+-Ge0.8Si0.2 were obtained. In p+-Ge0.8Si0.2/Ge stacks with (110) sidewalls, the REPC of Ge was 3.1 nm and the saturated etching selectivity was 6.5 at HNO3 temperature of 20 °C. The etch rate and the selectivity were affected by HNO3 temperatures. As the HNO3 temperature decreased to 10 °C, the REPC of Ge was decreased to 2 nm and the selectivity remained at about 7.4. Finally, the application of ALE in the formation of Ge nanowires in vGAAFETs was demonstrated where the preliminary Id–Vds output characteristic curves of Ge vGAAFET were provided.

Materials ◽  
2020 ◽  
Vol 13 (3) ◽  
pp. 771 ◽  
Author(s):  
Junjie Li ◽  
Yongliang Li ◽  
Na Zhou ◽  
Guilei Wang ◽  
Qingzhu Zhang ◽  
...  

Semiconductor nanowires have great application prospects in field effect transistors and sensors. In this study, the process and challenges of manufacturing vertical SiGe/Si nanowire array by using the conventional lithography and novel dry atomic layer etching technology. The final results demonstrate that vertical nanowires with a diameter less than 20 nm can be obtained. The diameter of nanowires is adjustable with an accuracy error less than 0.3 nm. This technology provides a new way for advanced 3D transistors and sensors.


2016 ◽  
Vol 34 (4) ◽  
pp. 041307 ◽  
Author(s):  
Chen Li ◽  
Dominik Metzler ◽  
Chiukin Steven Lai ◽  
Eric A. Hudson ◽  
Gottlieb S. Oehrlein

2021 ◽  
Vol 32 (50) ◽  
pp. 505702
Author(s):  
Young Gyu You ◽  
Dong Ho Shin ◽  
Jong Hwa Ryu ◽  
E E B Campbell ◽  
Hyun-Jong Chung ◽  
...  

2021 ◽  
Vol 314 ◽  
pp. 95-98
Author(s):  
Tomoki Hirano ◽  
Kenya Nishio ◽  
Takashi Fukatani ◽  
Suguru Saito ◽  
Yoshiya Hagimoto ◽  
...  

In this work, we characterized the wet chemical atomic layer etching of an InGaAs surface by using various surface analysis methods. For this etching process, H2O2 was used to create a self-limiting oxide layer. Oxide removal was studied for both HCl and NH4OH solutions. Less In oxide tended to remain after the HCl treatment than after the NH4OH treatment, so the combination of H2O2 and HCl is suitable for wet chemical atomic layer etching. In addition, we found that repetition of this etching process does not impact on the oxide amount, surface roughness, and interface state density. Thus, nanoscale etching of InGaAs with no impact on the surface condition is possible with this method.


2007 ◽  
Vol 544-545 ◽  
pp. 753-756
Author(s):  
In Jae Back ◽  
Su Cheol Gong ◽  
Hun Seoung Lim ◽  
Ik Sub Shin ◽  
Seoung Woo Kuk ◽  
...  

The organic-inorganic field effect transistors (OIFETs) with ZnS active layer were fabricated on the ITO/glass substrate using cross-linked PVP (poly-4-vinylphenol) as a gate insulator. ZnS semiconductor films were prepared by the atomic layer deposition method. In the case of cross-linked PVP film, the leakage current and capacitance were about 1× 10-8 A and 12 nF/cm2, showing good gate insulation property. The carrier concentration and mobility of ZnS film deposited on SiO2/Si wafer was found to be -9.4×1015 cm-3 and 49.0 cm2/ V·sec, respectively. For the OIFET devices with ITO/PVP/ZnS/Ti:Au structure, the carrier mobility was about 1.9 cm2/V·sec. From the AFM images, lower mobility in the OIFET device compared with ZnS film on SiO2/Si substrate may be attributed to a rough surface morphology of ZnS film.


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