scholarly journals Photodetector with Controlled Relocation of Carrier Density Peaks: Concept and Numerical Simulation

Photonics ◽  
2020 ◽  
Vol 7 (1) ◽  
pp. 21 ◽  
Author(s):  
Ivan Pisarenko ◽  
Eugeny Ryndin
Keyword(s):  
Integrated Circuits ◽  
Response Time ◽  
Carrier Density ◽  
High Speed ◽  
Equation System ◽  
Optical Modulator ◽  
Problem Solution ◽  
Density Peaks ◽  
Integrated Optical ◽  
Back Edge

Modern electronics faces the degradation of metal interconnection performance in integrated circuits with nanoscale feature dimensions of transistors. The application of constructively and technologically integrated optical links instead of metal wires is a promising way of the problem solution. Previously, we proposed the advanced design of an on-chip injection laser with an AIIIBV nanoheterostructure, and a functionally integrated optical modulator. To implement the efficient laser-modulator-based optical interconnections, technologically compatible photodetectors with subpicosecond response time and sufficient sensitivity are required. In this paper, we introduce the concept of a novel high-speed photodetector with controlled relocation of carrier density peaks. The device includes a traditional p-i-n photosensitive junction and an orthogonally oriented control heterostructure. The transverse electric field displaces the peaks of electron and hole densities into the regions with low carrier mobilities and lifetimes during the back edge of an optical pulse. This relocation results in the fast decline of photocurrent that does not depend on the longitudinal transport of electrons and holes. We develop a combined numerical model based on the Schrodinger-Poisson equation system to estimate the response time of the photodetector. According to the simulation results, the steep part of the photocurrent back edge has a duration of about 0.1 ps.

scholarly journals Research and development of high-speed on-chip photodetectors based on AIIIBV heterostructures

2019 ◽  
Vol 30 ◽  
pp. 08003
Author(s):  
Ivan Pisarenko ◽  
Eugeny Ryndin
Keyword(s):  
Research And Development ◽  
Carrier Density ◽  
High Speed ◽  
Technical Problem ◽  
Optical Modulator ◽  
Charge Carrier Density ◽  
Density Peaks ◽  
High Modulation ◽  
Back Edge ◽  
On Chip

This paper is aimed at the solution of the fundamental scientific and technical problem of research and development of high-performance optoelectronic devices designed for on- and inter-chip optical interconnecting in integrated circuits. Previously, we developed a laser with a double AIIIBV nanoheterostructure and a functionally integrated optical modulator. The device is based on the principle of controlled spatial relocation of charge carrier density peaks within quantum regions and provides the generation of optical signals with high modulation frequencies. The detection of short laser pulses generated by the lasermodulator requires a technologically compatible on-chip photodetector with subpicosecond response time. To meet the given requirements, we propose a novel design of a high-speed photodetector that employs the same relocation principle as the laser-modulator. The photodetector contains a traditional p-i-n photosensitive structure and an orthogonally oriented control heterostructure. During the back edge of a laser pulse, the control heterostructure displaces the peaks of electron and hole densities into special low-temperature-grown regions with short lifetimes and low carrier mobilities. We developed the quantum mechanical numerical model of the photodetector with controlled relocation of carrier density peaks and estimated the duration of the photocurrent back edge.

Genetic Parallel Programming: Design and Implementation

2006 ◽  
Vol 14 (2) ◽  
pp. 129-156 ◽  
Author(s):  
Sin Man Cheang ◽  
Kwong Sak Leung ◽  
Kin Hong Lee
Keyword(s):  
Integrated Circuits ◽  
Parallel Programming ◽  
High Speed ◽  
Large Scale ◽  
General Purpose ◽  
Computational Effort ◽  
Parallel Programs ◽  
Experimental Results ◽  
Benchmark Problems ◽  
Problem Solution

This paper presents a novel Genetic Parallel Programming (GPP) paradigm for evolving parallel programs running on a Multi-Arithmetic-Logic-Unit (Multi-ALU) Processor (MAP). The MAP is a Multiple Instruction-streams, Multiple Data-streams (MIMD), general-purpose register machine that can be implemented on modern Very Large-Scale Integrated Circuits (VLSIs) in order to evaluate genetic programs at high speed. For human programmers, writing parallel programs is more difficult than writing sequential programs. However, experimental results show that GPP evolves parallel programs with less computational effort than that of their sequential counterparts. It creates a new approach to evolving a feasible problem solution in parallel program form and then serializes it into a sequential programif required. The effectiveness and efficiency of GPP are investigated using a suite of 14 well-studied benchmark problems. Experimental results show that GPP speeds up evolution substantially.

scholarly journals Phosphorene-assisted silicon photonic modulator with fast response time

Nanophotonics ◽  
2020 ◽  
Vol 9 (7) ◽  
pp. 1973-1979 ◽  
Author(s):  
Zhao Cheng ◽  
Rui Cao ◽  
Jia Guo ◽  
Yuhan Yao ◽  
Kangkang Wei ◽  
...  
Keyword(s):  
Response Time ◽  
High Speed ◽  
Fast Response ◽  
Optical Modulator ◽  
High Electron ◽  
Optical Modulators ◽  
Strong Light ◽  
Optical Signals ◽  
All Optical ◽  
Silicon Based

AbstractAll-optical modulators avoid the conversion from external electronic signals to optical signals and thus have the potential to achieve an energy-efficient high-speed photonic system. Phosphorene recently debuted as an attractive material that exhibits outstanding high electron mobility, strong light-matter interaction and modifiable bandgap, making it ideal for all-optical modulators. In this paper, by incorporating a phosphorene and silicon-based micro-ring resonator (MRR), we first propose and experimentally demonstrate a unique phosphorene-integrated all-optical modulator in telecommunications. By utilizing a phosphorene thin film with an average thickness of 22 nm as the absorption material, the rise time of only 479 ns and decay time of 113 ns are achieved, which is the fastest reported response time in the family of phosphorene modulators. The corresponding 3 dB bandwidth is larger than 2.5 MHz, and it exhibits a low-loss performance benefited from its finite bandgap. The proposed phosphorene/MRR hybrid modulator may have potential in the applications of all-optical interconnections.

Microfabrication research at the National Submicron Facility

1983 ◽  
Vol 41 ◽  
pp. 86-89
Author(s):  
E.D. Wolf
Keyword(s):  
Integrated Circuits ◽  
Particle Physics ◽  
High Speed ◽  
New Technology ◽  
High Energy ◽  
High Energy Particle ◽  
New Science ◽  
Wide Range ◽  
Intermediate Domain ◽  
Circuit Function

Most microelectronics devices and circuits operate faster, consume less power, execute more functions and cost less per circuit function when the feature-sizes internal to the devices and circuits are made smaller. This is part of the stimulus for the Very High-Speed Integrated Circuits (VHSIC) program. There is also a need for smaller, more sensitive sensors in a wide range of disciplines that includes electrochemistry, neurophysiology and ultra-high pressure solid state research. There is often fundamental new science (and sometimes new technology) to be revealed (and used) when a basic parameter such as size is extended to new dimensions, as is evident at the two extremes of smallness and largeness, high energy particle physics and cosmology, respectively. However, there is also a very important intermediate domain of size that spans from the diameter of a small cluster of atoms up to near one micrometer which may also have just as profound effects on society as “big” physics.

Structural changes in silicon-on-insulator material during post-implantation annealing

1986 ◽  
Vol 44 ◽  
pp. 736-737
Author(s):  
C. O. Jung ◽  
S. J. Krause ◽  
S.R. Wilson
Keyword(s):  
Integrated Circuits ◽  
Oxide Layer ◽  
High Speed ◽  
Structural Changes ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Quality ◽  
Radiation Hardened ◽  
Post Implantation ◽  
Very High

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.

TEM study of phosphorus-implanted pseudomorphic Si0.88Ge0.12 on Si(100)

1995 ◽  
Vol 53 ◽  
pp. 468-469
Author(s):  
N. David Theodore ◽  
Donald Y.C Lie ◽  
J. H. Song ◽  
Peter Crozier
Keyword(s):  
Integrated Circuits ◽  
Heterojunction Bipolar Transistors ◽  
Integrated Circuit ◽  
High Speed ◽  
Room Temperature ◽  
Strain Relaxation ◽  
Bipolar Transistors ◽  
Sige Hbt ◽  
Integrated Circuit Manufacturing ◽  
Microstructural Behavior

SiGe is being extensively investigated for use in heterojunction bipolar-transistors (HBT) and high-speed integrated circuits. The material offers adjustable bandgaps, improved carrier mobilities over Si homostructures, and compatibility with Si-based integrated-circuit manufacturing. SiGe HBT performance can be improved by increasing the base-doping or by widening the base link-region by ion implantation. A problem that arises however is that implantation can enhance strain-relaxation of SiGe/Si.Furthermore, once misfit or threading dislocations result, the defects can give rise to recombination-generation in depletion regions of semiconductor devices. It is of relevance therefore to study the damage and anneal behavior of implanted SiGe layers. The present study investigates the microstructural behavior of phosphorus implanted pseudomorphic metastable Si0.88Ge0.12 films on silicon, exposed to various anneals.Metastable pseudomorphic Si0.88Ge0.12 films were grown ~265 nm thick on a silicon wafer by molecular-beam epitaxy. Pieces of this wafer were then implanted at room temperature with 100 keV phosphorus ions to a dose of 1.5×1015 cm-2.

The Radio Probe™: A New Measurement Tool for High Speed Integrated Circuits

2005 ◽  
Author(s):  
Mark Kimball
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
High Speed ◽  
Attenuation Factor ◽  
Cost Effective ◽  
Frequency Measurement ◽  
Single Frequency ◽  
Measurement Tool ◽  
Probe Design ◽  
Differential Measurement

Abstract This article presents a novel tool designed to allow circuit node measurements in a radio frequency (RF) integrated circuit. The discussion covers RF circuit problems; provides details on the Radio Probe design, which achieves an input impedance of 50Kohms and an overall attenuation factor of 0 dB; and describes signal to noise issues in the output signal, along with their improvement techniques. This cost-effective solution incorporates features that make it well suited to the task of differential measurement of circuit nodes within an RF IC. The Radio Probe concept offers a number of advantages compared to active probes. It is a single frequency measurement tool, so it complements, rather than replaces, active probes.

Electrical Probing and Surface Imaging of Deep Sub-Micron Integrated Circuits

1999 ◽  
Author(s):  
Kenneth Krieg ◽  
Richard Qi ◽  
Douglas Thomson ◽  
Greg Bridges
Keyword(s):  
High Resolution ◽  
Integrated Circuits ◽  
Real Time ◽  
High Speed ◽  
Time Signal ◽  
Surface Imaging ◽  
Atomic Force ◽  
Submicron Structures ◽  
High Resolution Images ◽  
Capacitive Loading

Abstract A contact probing system for surface imaging and real-time signal measurement of deep sub-micron integrated circuits is discussed. The probe fits on a standard probe-station and utilizes a conductive atomic force microscope tip to rapidly measure the surface topography and acquire real-time highfrequency signals from features as small as 0.18 micron. The micromachined probe structure minimizes parasitic coupling and the probe achieves a bandwidth greater than 3 GHz, with a capacitive loading of less than 120 fF. High-resolution images of submicron structures and waveforms acquired from high-speed devices are presented.

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