scholarly journals DYNAMICS FEATURES OF A VIBRATING MACHINE WITH ELASTIC ELEMENT HAVING EXPONENTIAL CHARACTERISTIC OF RESILIENT FORCE

2021 ◽  
pp. 59-62
Author(s):  
Grigory Altshul ◽  
Alexander Gouskov ◽  
Grigory PanovkoAlexander Shokhin ◽  
Alexander Shokhin

The article analyzes the possibility of using nonlinear elastic elements as a suspension of the working element of resonant vibrating machines with two unbalance vibration exciters is analyzed. The elastic characteristic of the suspension is described by an exponential law, which ensures that the natural frequency remains unchanged regardless of the system mass. Static characteristics of the vibration exciter motors are taken into account. A system of differential equations describing movement of the system depending on the processed material mass is obtained. Amplitude-frequency characteristics depending on the power supply voltage, as well as on the debalance rotational speed are obtained for different values of material mass. The stability of the obtained periodic solutions is analyzed. The constancy of resonant amplitude and frequency of the working element vibrations at various values of material mass is shown. The results obtained confirm the advisability of using an equalfrequency suspension of the working element for resonant vibrating machines.

2005 ◽  
Vol 14 (02) ◽  
pp. 267-279 ◽  
Author(s):  
M. B. GUERMAZ ◽  
L. BOUZERARA ◽  
H. ESCID ◽  
M. T. BELAROUSSI

This paper describes and analyzes a low-noise and high-bandwidth transimpedance amplifier featuring a large dynamic range. The designed amplifier is configured on three identical stages that use an active load compensated by an active resistor to improve the stability performance of the amplifier. This topology displays a transimpedance gain of 150 kΩ, which is necessary to obtain a high sensitivity. This structure operates at 5 V power supply voltage, exhibits a gain bandwidth product of 18 THzΩ and a low-noise level of about [Formula: see text]. This transimpedance amplifier can reach a transmission speed of 240 Mb/s for a photocurrent of 0.5 μA. For a photocurrent of 9.5 μA, a transmission speed of 622 Mb/s can be achieved by using an optical fiber connection containing four channels. The predicted performance is verified by simulations using PSPICE and MAGIC tools with 0.8 μm CMOS AMS parameters.


2011 ◽  
Vol 128-129 ◽  
pp. 1367-1370
Author(s):  
Wen Chang Tsai

A DC/DC voltage booster circuit is essential to design for the high-pressure (H.P.) injector driving circuit since the power supply voltages for various H.P. injectors are DC 60~90 V rather than DC 12~14V battery voltages. The DC 12~14V battery voltages have to be boosted up to the stable DC 60~90 V voltages supply for being able to drive various H.P. injectors. The new H.P. injector driving circuit consists of a voltage booster circuit and an originally designed three-stage power MOSFETs injector driving circuit to control the dc-link power supply voltage. The dynamic performance of a H.P. injector driven by the designed electrical driving circuit with the voltage booster are simulated and analyzed. The stability and electrical characteristics for the voltage booster under various injection pulse durations and engine speeds are investigated. The fuel injection quantities, supply voltages and injector driving currents of the H.P. injector fed by the new injector driving circuit is illustrated and analyzed in the paper. The experimental results show that this injector driving circuit with a newly designed voltage booster is capable of operating stably to drive the H.P. injector and obtain the accurate fuel injection quantities in the air-fuel ratio control of engines.


2011 ◽  
Vol E94-C (6) ◽  
pp. 1072-1075
Author(s):  
Tadashi YASUFUKU ◽  
Yasumi NAKAMURA ◽  
Zhe PIAO ◽  
Makoto TAKAMIYA ◽  
Takayasu SAKURAI

2016 ◽  
Vol E99.C (10) ◽  
pp. 1219-1225
Author(s):  
Masahiro ISHIDA ◽  
Toru NAKURA ◽  
Takashi KUSAKA ◽  
Satoshi KOMATSU ◽  
Kunihiro ASADA

1993 ◽  
Vol 29 (15) ◽  
pp. 1324 ◽  
Author(s):  
L.E. Larson ◽  
M.M. Matloubian ◽  
J.J. Brown ◽  
A.S. Brown ◽  
M. Thompson ◽  
...  

Circuit World ◽  
2019 ◽  
Vol 45 (2) ◽  
pp. 80-85
Author(s):  
Tian Lei ◽  
Nan Gong ◽  
Li Wang ◽  
Qin Qin Li ◽  
Heng Wei Wang

Purpose Because of the logic delay in the converter, the minimum turn on time of the switch is influenced by the constant time. When the inductor current gets to the threshold of the chip, the control signal will delay for a period. This makes the inductor current rising with the increasing of the clock and leads to the load current out of control. Thus, this paper aims to design an oscillator with a variable frequency protection function. Design/methodology/approach This paper presents an oscillator with the reducing frequency applied in the DC-DC converter. When the converter works normally, the operating frequency of the oscillator is 1.5 MHz. So the inductor current has enough time to decay and prevent the power transistor damaging. After the abnormal condition, the converter returns to the normal operating mode automatically. Findings Based on 0.5 µm CMOS process, simulated by the HSPICE, the simulation results shows that the frequency of the oscillator linearly decreases from 1.5 MHz to 380 KHz when the feedback voltage less than 0.2 V. The maximum deviation of the oscillator frequency is only 6 per cent from −50°C to 125°C within the power supply voltage of 2.7-5.5 V. Originality/value When the light load occurs at the output stage, the oscillator frequency will decrease as the load voltage drops. The test results shows that when the circuit works in the normal condition, the oscillator frequency is 1.5 MHz. When the load decreased, the operating frequency is dropped dramatically.


2018 ◽  
Vol 27 (07) ◽  
pp. 1850104 ◽  
Author(s):  
Yuwadee Sundarasaradula ◽  
Apinunt Thanachayanont

This paper presents the design and realization of a low-noise, low-power, wide dynamic range CMOS logarithmic amplifier for biomedical applications. The proposed amplifier is based on the true piecewise linear function by using progressive-compression parallel-summation architecture. A DC offset cancellation feedback loop is used to prevent output saturation and deteriorated input sensitivity from inherent DC offset voltages. The proposed logarithmic amplifier was designed and fabricated in a standard 0.18[Formula: see text][Formula: see text]m CMOS technology. The prototype chip includes six limiting amplifier stages and an on-chip bias generator, occupying a die area of 0.027[Formula: see text]mm2. The overall circuit consumes 9.75[Formula: see text][Formula: see text]W from a single 1.5[Formula: see text]V power supply voltage. Measured results showed that the prototype logarithmic amplifier exhibited an 80[Formula: see text]dB input dynamic range (from 10[Formula: see text][Formula: see text]V to 100[Formula: see text]mV), a bandwidth of 4[Formula: see text]Hz–10[Formula: see text]kHz, and a total input-referred noise of 5.52[Formula: see text][Formula: see text]V.


2021 ◽  
pp. 2140002
Author(s):  
Yanbo Chen ◽  
Shubin Zhang

Phase Locked Loop (PLL) circuit plays an important part in electronic communication system in providing high-frequency clock, recovering the clock from data signal and so on. The performance of PLL affects the whole system. As the frequency of PLL increases, designing a PLL circuit with lower jitter and phase noise becomes a big challenge. To suppress the phase noise, the optimization of Voltage Controlled Oscillator (VCO) is very important. As the power supply voltage degrades, the VCO becomes more sensitive to supply noise. In this work, a three-stage feedforward ring VCO (FRVCO) is designed and analyzed to increase the output frequency. A novel supply-noise sensing (SNS) circuit is proposed to suppress the supply noise’s influence on output frequency. Based on these, a 1.2 V 2 GHz PLL circuit is implemented in 110 nm CMOS process. The phase noise of this CMOS charge pump (CP) PLL is 117 dBc/Hz@1 MHz from test results which proves it works successfully in suppressing phase noise.


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