Compact Modeling of Lightly Doped Nanoscale DG MOSFET Transistor

2014 ◽  
Vol 492 ◽  
pp. 306-310
Author(s):  
Billel Smaani ◽  
Mourad Bella ◽  
Saϊda Latreche
Keyword(s):  
Dynamic Behavior ◽  
Drain Current ◽  
Compact Modeling ◽  
Double Gate ◽  
Static Behavior ◽  
Commercial Software ◽  
Dg Mosfet ◽  
Silvaco Atlas ◽  
Long Channel ◽  
First Time

In this paper, a compact modeling of lightly doped nanoscale Double Gate (DG) MOSFET transistor is presented. In the first time, a DG MOSFET transistor with long channel is considered. In this case, by using 1-D Poissons equation and applying the Gauss law at the interface of Silicone/Oxide, the static behavior of the long channel DG MOSFET can be observed by simple relationships between charges-voltages and charges-drain current. In second time, the dynamic behavior of the device is described through the intrinsic trans-capacitances. The present results (obtained using MATLAB) are validated by comparing them with those obtained using commercial software (Silvaco Atlas-TCAD).

Modeling of electrical behavior of undoped symmetric Double-Gate (DG) MOSFET using carrier-based approach

2019 ◽  
Vol 38 (2) ◽  
pp. 815-828
Author(s):  
Ajay Kumar Singh
Keyword(s):  
Poisson’S Equation ◽  
Analytical Models ◽  
Double Gate ◽  
Poisson's Equation ◽  
Short Channel ◽  
Content Type ◽  
Dg Mosfet ◽  
Channel Potential ◽  
Work Functions ◽  
Long Channel

Purpose This study aims to develop a compact analytical models for undoped symmetric double-gate MOSFET based on carrier approach. Double-Gate (DG) MOSFET is a newly emerging device that can potentially further scale down CMOS technology owing to its excellent control of short channel effects, ideal subthreshold slope and free dopant-associated fluctuation effects. DG MOSFET is of two types: the symmetric DG MOSFET with two gates of identical work functions and asymmetric DG MOSFET with two gates of different work functions. To fully exploit the benefits of DG MOSFETs, the body of DG MOSFETs is usually undoped because the undoped body greatly reduces source and drain junction capacitances, which enhances the switching speed. Highly accurate and compact models, which are at the same time computationally efficient, are required for proper modeling of DG MOSFETs. Design/methodology/approach This paper presents a carrier-based approach to develop a compact analytical model for the channel potential, threshold voltage and drain current of a long channel undoped symmetric DG MOSFETs. The formulation starts from a solution of the 2-D Poisson’s equation in which mobile charge term has been included. The 2-D Poisson’s equation in rectangular coordinate system has been solved by splitting the total potential into long-channel (1-D Poisson’s equation) and short-channel components (remnant 2-D differential equation) in accordance to the device physics. The analytical model of the channel potential has been derived using Boltzmann’s statistics and carrier-based approach. Findings It is shown that the metal gate suppresses the center potential more than the poly gate. The threshold voltage increases with increasing metal work function. The results of the proposed models have been validated against the Technology Computer Aided Design simulation results with close agreement. Originality/value Compact Analytical models for undoped symmetric double gate MOSFETs.

Compact Modeling of Charge, Capacitance, and Drain Current in III–V Channel Double Gate FETs

2017 ◽  
Vol 16 (2) ◽  
pp. 347-354 ◽  
Author(s):  
Chandan Yadav ◽  
Mayank Agrawal ◽  
Amit Agarwal ◽  
Yogesh Singh Chauhan
Keyword(s):  
Drain Current ◽  
Compact Modeling ◽  
Double Gate ◽  
Charge Capacitance

Surface-Potential-Based Drain Current Model for Long-Channel Junctionless Double-Gate MOSFETs

2012 ◽  
Vol 59 (12) ◽  
pp. 3292-3298 ◽  
Author(s):  
Zhuojun Chen ◽  
Yongguang Xiao ◽  
Minghua Tang ◽  
Ying Xiong ◽  
Jianqiang Huang ◽  
...  
Keyword(s):  
Surface Potential ◽  
Current Model ◽  
Drain Current ◽  
Double Gate ◽  
Long Channel

Carrier-based compact modeling of charge and capacitance of long channel undoped symmetric double-gate MOSFETs

2008 ◽  
Vol 23 (4) ◽  
pp. 045003 ◽  
Author(s):  
Jin He ◽  
Wei Bian ◽  
Yu Chen ◽  
Bo Li ◽  
Yadong Tao ◽  
...  
Keyword(s):  
Compact Modeling ◽  
Double Gate ◽  
Long Channel

scholarly journals Realization with Fabrication of Double-Gate MOSFET Based Buck Regulator

2021 ◽  
pp. 66-75
Author(s):  
Simone Leeuw ◽  
◽  
Viranjay M. Srivastava
Keyword(s):  
Output Voltage ◽  
High Efficiency ◽  
Research Work ◽  
Drain Current ◽  
Input Voltage ◽  
Switching Frequency ◽  
Maximum Output ◽  
Double Gate ◽  
Dg Mosfet ◽  
Double Gate Mosfet

The traditional buck regulator provides the steady output voltage with high efficiency and low power dissipation. Various parameters of this regulator can be improved by the placement of Double-Gate (DG) MOSFET. The double-gate MOSFET provides twice the drain current flow, which improves the various parameters of buck regulator structure and inevitably increases the device performance and efficiency. In this research work, these parameters have been analyzed with implemented DG MOSFET buck regulator and realized the total losses 42.676 mW and efficiency 74.208%. This research work has designed a DG MOSFET based buck regulator with the specification of input voltage 12 V, output voltage 3.3 V, maximum output current 40 mA, switching frequency 100 kHz, ripple current of 10%, and ripple voltage of 1%.

Modeling and Simulation of Nanoscale Lateral Gaussian Doped Channel Asymmetric Double Gate MOSFET

2015 ◽  
Vol 36 ◽  
pp. 51-63 ◽  
Author(s):  
Vandana Kumari ◽  
Manoj Saxena ◽  
Mridula Gupta
Keyword(s):  
Analytical Modeling ◽  
Current Model ◽  
Drain Current ◽  
Doping Profile ◽  
Mode Analysis ◽  
Double Gate ◽  
Digital Performance ◽  
Dg Mosfet ◽  
Double Gate Mosfet ◽  
The Impact

This work presents the drain current model using Evanescent Mode Analysis (EMA) for nanoscale Double Gate MOSFET having Gaussian doping profile along the horizontal direction in the channel i.e. from source to drain region. Due to heavily doped channel, band gap narrowing effect is incorporated in the analytical modeling scheme. The various parameters evaluated in this work using analytical modeling scheme are surface potential, electric field, threshold voltage, sub-threshold slope and drain current. The impact of peak Gaussian doping profile on the drain current and trans-conductance has been demonstrated which are important for assessing the analog performance of the device. The results are also compared with the uniformly doped DG MOSFET. The asymmetric behaviour of Gaussian doped DG MOSFET has also been investigated. In addition to this, digital performance of Gaussian doped DG MOSFET has also been assessed using exhaustive device simulation.

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