Inverter Loss Reduction Using 3kV SiC-JBS Diode and High-Speed Drive Circuit

2010 ◽  
Vol 645-648 ◽  
pp. 1127-1130 ◽  
Author(s):  
Katsumi Ishikawa ◽  
Kazutoshi Ogawa ◽  
Norihumi Kameshiro ◽  
Hidekatsu Onose ◽  
Masahiro Nagasu
Keyword(s):  
Energy Loss ◽  
Power Loss ◽  
High Speed ◽  
Loss Reduction ◽  
Forward Voltage ◽  
Turn On ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Hybrid Module ◽  
Drive Circuit

We developed a JBS diode with characteristics of a low forward voltage and a low leakage current at 3kV. Further, we built a prototype of a 3kV/200A hybrid module, equipped with Si-IGBTs and SiC-JBS diodes. We attempted to decrease the recovery loss, and the decrease in the turn-on power loss, by using a hybrid module and a high-speed drive circuit. Moreover, we estimated that the total energy loss of the converter and the inverter were reduced to about 33%.

600V-30A 4H-SiC JBS and Si IGBT Hybrid Module

2011 ◽  
Vol 679-680 ◽  
pp. 714-717
Author(s):  
Yu Zhu Li ◽  
Wei Jiang Ni ◽  
Zhe Yang Li ◽  
Yun Li ◽  
Chen Chen ◽  
...  
Keyword(s):  
Power Loss ◽  
Voltage Drop ◽  
State Power ◽  
Loss Reduction ◽  
Chip Area ◽  
Turn On ◽  
Igbt Module ◽  
Hybrid Module ◽  
Device Technology

600V-30A 4H-SiC Junction Barrier Schottky（JBS）diodes were designed and fabricated using SiC epitaxy and device technology. SiC JBS diodes were packaged in Si IGBT module，and switching measurements were done at 125°C. As free-wheeling diode for Si IGBT, 600V SiC JBS diode was compared to 600V ultra-fast diode from International Rectifier. SiC diode achieved 90% recovery loss reduction and corresponding IGBT showed 30% lower turn-on loss. However, SiC JBS diode has larger on-state voltage drop due to small chip area. On-state power loss will be lowered by increasing SiC chip area.

Development of high k/III-V (InGaAs, InAs, InSb) structures for future low power, high speed device applications

2013 ◽  
Vol 1538 ◽  
pp. 291-302
Author(s):  
Edward Yi Chang ◽  
Hai-Dang Trinh ◽  
Yueh-Chin Lin ◽  
Hiroshi Iwai ◽  
Yen-Ku Lin
Keyword(s):  
Low Power ◽  
Leakage Current ◽  
High Speed ◽  
High Performance ◽  
Gate Oxide ◽  
Chemical Cleaning ◽  
Low Leakage ◽  
Low Leakage Current ◽  
High K ◽  
Cleaning Methods

ABSTRACTIII-V compounds such as InGaAs, InAs, InSb have great potential for future low power high speed devices (such as MOSFETs, QWFETs, TFETs and NWFETs) application due to their high carrier mobility and drift velocity. The development of good quality high k gate oxide as well as high k/III-V interfaces is prerequisite to realize high performance working devices. Besides, the downscaling of the gate oxide into sub-nanometer while maintaining appropriate low gate leakage current is also needed. The lack of high quality III-V native oxides has obstructed the development of implementing III-V based devices on Si template. In this presentation, we will discuss our efforts to improve high k/III-V interfaces as well as high k oxide quality by using chemical cleaning methods including chemical solutions, precursors and high temperature gas treatments. The electrical properties of high k/InSb, InGaAs, InSb structures and their dependence on the thermal processes are also discussed. Finally, we will present the downscaling of the gate oxide into sub-nanometer scale while maintaining low leakage current and a good high k/III-V interface quality.

Characterization of Low Temperature Polysilicon TFTs with Self-Aligned Graded LDD Structure

2001 ◽  
Vol 685 ◽  
Author(s):  
Ching-Wei Lin ◽  
Li-Jing Cheng ◽  
Yin-Lung Lu ◽  
Huang-Chung Cheng
Keyword(s):  
Low Temperature ◽  
Leakage Current ◽  
High Speed ◽  
High Reliability ◽  
Activation Process ◽  
Active Matrix ◽  
Dopant Activation ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Excimer Laser Irradiation

AbstractA simple process sequence for fabrication of low temperature polysilicon (LTPS) TFTs with self-aligned graded LDD structure was demonstrated. The graded LDD structure was self-aligned by side-etch of Al under the photo-resist followed by excimer laser irradiation for dopant activation and laterally diffusion. The graded LDD polysilicon TFTs were suitable for high-speed operation and active matrix switches applications because they possessed low-leakage-current characteristic without sacrificing driving capability significantly and increasing overlap capacitance. The leakage current of graded LDD polysilicon TFTs at Vd = 5V and Vg = −10V could attain to below 1pA/μm without any hygrogenation process, when proper LDD length and laser activation process were applied. The on/off current ratios of these devices were also above 108. Furthermore, due to graded dopant distribution in LDD regions, the drain electric field could be reduced further, and as a result, graded LDD polysilicon TFTs provided high reliability for high voltage operation.

Design of Gate-Ground-NMOS-Based ESD Protection Circuits with Low Trigger Voltage, Low Leakage Current, and Fast Turn-On

ETRI Journal ◽  
2009 ◽  
Vol 31 (6) ◽  
pp. 725-731 ◽  
Author(s):  
Yong-Seo Koo ◽  
Kwangsoo Kim ◽  
Shihong Park ◽  
Kwidong Kim ◽  
Jong-Kee Kwon
Keyword(s):  
Leakage Current ◽  
Turn On ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Esd Protection ◽  
Protection Circuits

Conductivity Modulated and Implantation-Free 4H-SiC Ultra-High-Voltage PiN Diodes

2018 ◽  
Vol 924 ◽  
pp. 568-572 ◽  
Author(s):  
Arash Salemi ◽  
Hossein Elahipanah ◽  
Carl Mikael Zetterling ◽  
Mikael Östling
Keyword(s):  
Leakage Current ◽  
High Voltage ◽  
Voltage Drop ◽  
Device Simulation ◽  
Forward Voltage ◽  
Pin Diodes ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Forward Voltage Drop ◽  
Ultra High Voltage

Implantation-free mesa etched ultra-high-voltage 4H-SiC PiN diodes are fabricated, measured and analyzed by device simulation. The diode’s design allows a high breakdown voltage of about 19.3 kV according to simulations. No reverse breakdown is observed up to 13 kV with a very low leakage current of 0.1 μA. A forward voltage drop (VF) and differential on-resistance (Diff. Ron) of 9.1 V and 41.4 mΩ cm2are measured at 100 A/cm2, respectively, indicating the effect of conductivity modulation.

>1200 V, >50A SILICON CARBIDE SUPER JUNCTION TRANSISTOR

2011 ◽  
Vol 2011 (HITEN) ◽  
pp. 000104-000107
Author(s):  
Ranbir Singh ◽  
Siddarth Sundaresan ◽  
Stoyan Jeliazkov ◽  
Deepak Veereddy ◽  
Eric Lieser
Keyword(s):  
Power Loss ◽  
Electrical Performance ◽  
Total Power ◽  
Common Source ◽  
Loss Reduction ◽  
Low Leakage ◽  
Power Loss Reduction ◽  
Source Current ◽  
Junction Transistor ◽  
Schottky Rectifier

The electrical performance of GeneSiC's 1200 V/7 A SiC Super Junction Transistor (SJT) is compared with three best-in-class commercial Si IGBTs in this paper. Low leakage currents of < 100 μA at 325 °C operating temperature, switching transients < 15 ns at 250 °C, Common Source current gains of 63 and on-resistance as low as 220 mΩ were measured on the SiC SJTs. For switching 7 A, 800 V at 100 kHz, the SiC SJT+GeneSiC SiC Schottky rectifier as Free Wheeling Diode (FWD) achieved a total power loss reduction of about 64% when compared to the best all-Si IGBT+FWD configuration and a power loss reduction of about 47 %, when compared to the best Si IGBT + SiC Schottky FWD.

High-Speed Drive Circuit with Separate Source Terminal for 600 V / 40 A Normally-off SiC-JFET

2013 ◽  
Vol 740-742 ◽  
pp. 1060-1064 ◽  
Author(s):  
Katsumi Ishikawa ◽  
Kaoru Katoh ◽  
Ayumu Hatanaka ◽  
Kazutoshi Ogawa ◽  
Haruka Shimizu ◽  
...  
Keyword(s):  
Power Supply ◽  
High Speed ◽  
Energy Losses ◽  
Common Source ◽  
Switching Loss ◽  
Turn On ◽  
Speed Up ◽  
Separate Source ◽  
Drive Circuit ◽  
Efficient Power

When using JFETs with a threshold voltage lower than 2 V in a power supply system or inverter system, a high-speed drive circuit capable of precisely controlling the gate current and a mounting method are important to reduce the switching loss. In this paper, a drive circuit of a normally-off SiC-JFET with a separate source terminal is proposed and the effects are evaluated. By dividing the common source inductance and applying the speed-up capacitor, the turn-on time and turn-on energy losses can be decreased by 40% and 60%, respectively. A speed-up capacitor larger than 100 nF greatly decreases the rising time (tr) and turn-on energy losses. By applying the developed normally-off SiC-JFETs and proposed gate driver to PFC circuits and DC/DC circuits, a highly efficient power supply will be achieved.

Traction Inverter that Applies Hybrid Module Using 3kV SiC-SBDs and High-speed Drive Circuit

2015 ◽  
Vol 135 (5) ◽  
pp. 531-538 ◽  
Author(s):  
Katsumi Ishikawa ◽  
Kazutoshi Ogawa ◽  
Masahiro Nagasu
Keyword(s):  
High Speed ◽  
Hybrid Module ◽  
Drive Circuit
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