Three-Dimensional Thermal Modeling and Management of System on Package with Gold and Nano Based Material

2019 ◽  
Vol 2019 (1) ◽  
pp. 000545-000549
Author(s):  
Be-nazir Khan

Abstract A detailed computational fluid dynamic based thermal model and simulation of exposed pad SOIC package on PCB is developed with Nano and gold-based material to characterize the thermal behavior or cooling capability of the package. Achieving lower thermal resistance of electronic packaging is one of the important points of interest in electronic application. In this paper, exposed small outline IC package on PCB is compared with different composition of Au-Sn die attach materials and Nano-foil preform material to understand the thermal behavior of the package which will provide cooling through low thermal resistance between junction-to-case. Thermal reliability of electronic packaging depends on the package design and selection of materials. Package material design plays an important role in thermal management of the product. Nano-based package material can be a good choice to improve the thermal performance of system on package. Developed a 3 D model of exposed small outline IC (E-SOIC) package on a printed circuit board (PCB). Au-Sn solder paste is used as die attach material and Nano-Foil preform is used to develop the system on package (SOP) model of exposed pad SOIC package on PWB. Different types of composition of Au-Sn solder paste, such as 78Au22Sn and 80Au20Sn are considered for die attach purpose. The reason for choosing the AuSn solder paste is good reliability and performance. Au-Sn has higher thermal conductivity than other solder materials, such as Pb-free solder paste, 96.5Sn3.5Ag and leaded solder paste, 37Pb63Sn. Two types of thermal model developed to compare the package material and design of the different die attach materials and Nano-Foil preforms. In this paper simulation and data analysis will show how the optimum thermal management depends on the material selection and design of the system on package (SOP). Surface mount type SOIC package with exposed pad design is selected to enhance the thermal purpose. Gold-tin and Nano-Foil preform will be used as alternative of lead-free package materials.

2021 ◽  
Vol 26 (5) ◽  
pp. 426-431
Author(s):  
V.A. Sergeev ◽  
◽  
A.M. Khodakov ◽  
M.Yu. Salnikov ◽  
◽  
...  

Thermal methods of quality control of the plated-through hole (PTH) of printed circuit board (PCB) are based on thermal models. However, known thermal models of PTH take no account of heat transfer to PCB material thus not allowing for PTH heat characteristic tying up with adhesion quality. In this work, an axisymmetric thermal model of a single-layer PCB PTH under one-sided heating conditions is considered. It was shown that the ratio of the temperature increments of the upper (heated) and lower end of the PTH in the considered range of heating power does not depend on the power level. A linear thermal equivalent scheme of the PTH has been proposed, which includes the longitudinal thermal resistance of the PTH metallization, de-termined by the parameters and quality of the metallization layer, the thermal resistance, which determines the convection heat exchange between the ends of the PTH with the adjacent PCB surface and the environment, and the thermal resistance of the area of the PCB material adjacent to the PTH, depending on the quality of the metallization adhesion and the PCB dielectric. Thermal equivalent circuit parameters determined by the ratio of the temperature increment of the upper and lower ends of the PTH and their difference can serve as the basis for the development of a nondestructive inspection procedure for PTH quality control by way of its unilateral heating, for example, by a laser beam.


2018 ◽  
Vol 30 (3) ◽  
pp. 182-193 ◽  
Author(s):  
Muna E. Raypah ◽  
Mutharasu Devarajan ◽  
Fauziah Sulaiman

Purpose Thermal management of high-power (HP) light-emitting diodes (LEDs) is an essential issue. Junction temperature (TJ) and thermal resistance (Rth) are critical parameters in evaluating LEDs thermal management and reliability. The purpose of this paper is to study thermal and optical characteristics of ThinGaN (UX:3) white LED mounted on SinkPAD by three types of solder paste (SP): No-Clean SAC305 (SP1), Water-Washable SAC305 (SP2) and No-Clean Sn42/Bi57.6/Ag0.4 (SP3). Design/methodology/approach Thermal transient tester (T3Ster) machine is used to determine TJ and total thermal resistance (Rth–JA). In addition, the LED’s optical properties are measured via thermal and radiometric characterization of power LEDs (TeraLED) system. The LED is mounted on SinkPAD using SP1, SP2 and SP3 by stencil printing to control a thickness of SP and reflow soldering oven to minimize the number of voids. The LED with SP1, SP2 and SP3 is tested at various input currents and ambient temperatures. Findings The results indicate that at high input current, which equals to 1,200 mA, Rth–JA and TJ, respectively, are reduced by 30 and 17 per cent between SP1 and SP2. At same current value, Rth–JA and TJ are minimized by 42 and 25 per cent between SP1 and SP3, respectively. In addition, at an ambient temperature of 85°C, Rth–JA and TJ are decreased by 34 and 7 per cent between SP1 and SP2, respectively. Similarly, the reduction in Rth–JA and TJ between SP1 and SP3 is 44 and 10 per cent, respectively. Luminous flux, luminous efficacy and color shift of the LED with the three types of SPs are compared and discussed. It is found that the SP1 improves the chromatic properties of the LED by increasing the overall light efficiency and decreasing the color shift. Originality/value Thermal and optical performance of ThinGaN LEDs mounted on SinkPAD via three types of SPs is compared. This investigation can assist the research on thermal management of HP ThinGaN-based LEDs.


2001 ◽  
Author(s):  
V. H. Adams ◽  
T.-Y. Tom Lee

Abstract Alternative interconnect strategies are being considered in place of the standard wire bond interconnect for GaAs power amplifier MMIC devices due to cost and electrical performance improvements. The package/die thermal performance consequences are potentially high-risk issue to these interconnect strategies and requires evaluation. Thermal simulations are conducted to compare and evaluate the thermal performances of three interconnect strategies: wire bond, gold post-flip chip, and through via interconnects. The test vehicle simulated is a three-stage, dual band power amplifier integrated circuit dissipating approximately 5 W steady-state power. Parametric studies are conducted to evaluate the impact of the printed circuit board, die thickness, solid gold vias, and design enhancements on package thermal performance. Best thermal performance is provided by a wire bonded, thin GaAs die attached with solder die attach to a printed circuit board that maximizes the number of plated-through-holes directly under the die. This configuration results in a best case junction-to-heat sink thermal resistance of 12 °C/W. Optimum flip chip and through via designs result in degraded thermal performance compared to the above described wire bond design but may have acceptable thermal performance. For these simulations, predicted junction-to-heatsink thermal resistance is in a range of 15–20 °C/W and is better than a comparable wire bonded design that uses a conductive epoxy die attach material.


Author(s):  
O. S. Abd El Kawi ◽  
E. F. Atwan ◽  
S. A. Abdelmonem ◽  
A. M. Abdalla ◽  
K. M. Elshazly

In this study a mathematical model has been developed to simulate two dimensional fluidized beds with uniform fluidization. The model consists of two sub models for hydrodynamic and thermal behavior of fluidized beds on which a FORTRAN program entitled (NEWFLUIDIZED) is devolved .The program is used to predict the volume fraction of gas and particle phases, the velocity of the two phases, the gas pressure and the temperature distribution for two phases. Also the program calculates the heat transfer coefficient. Besides that, the program predicts the fluidized bed stability and determines the optimum input gas velocity for fluidized beds to achieve the best thermal behavior. The hydrodynamic model is verified by comparing its results with the computational fluid dynamic code MFIX [1]. The thermal model was tested and compared to the available previous experimental correlations. The model results show good agreement with MFIX results and the thermal model of the present work confirms Zenz [2] and Gunn [3] equations.


Author(s):  
Gert Berckmans ◽  
Jan Ronsmans ◽  
Joris Jaguemont ◽  
Ahmadou Samba ◽  
Noshin Omar ◽  
...  

The large push for more environmental energy storage solutions for the automotive industry by different actors has led to the usage of lithium-ion capacitors (LICs) combining the features of both lithium-ion batteries (LIBs) and electric-double layer capacitors (EDLCs). In this paper, the thermal behavior of two types of advanced LICs has been thoroughly studied and analyzed by developing a three-dimensional (3D) thermal model in COMSOL Multiphysics®. Such an extensive and accurate thermal 3D has not been fully addressed in literature, which is a key building block for designing battery packs with an adequate thermal management. After an extensive measurement campaign, the high accuracy of the developed model in this paper is proven for two types of LICs, the 3300 F and the 2300 F. An error between the simulation and measurements is maximum 2 °C. This 3D model has been developed to gain insight in the thermal behavior of LICs, which is necessary to develop a thermal management system, which can ensure the safe operation of LICs when used in modules or packs.


Electronics ◽  
2020 ◽  
Vol 9 (11) ◽  
pp. 1778
Author(s):  
Ting Kang ◽  
Yuxin Ye ◽  
Yuncong Jia ◽  
Yanmei Kong ◽  
Binbin Jiao

This study introduces an enhanced thermal management strategy for efficient heat dissipation from GaN power amplifiers with high power densities. The advantages of applying an advanced liquid-looped silicon-based micro-pin fin heat sink (MPFHS) as the mounting plate for GaN devices are illustrated using both experimental and 3D finite element model thermal simulation methods, then compared against traditional mounting materials. An IR thermography system was equipped to obtain the temperature distribution of GaN mounted on three different plates. The influence of mass flow rate on a MPFHS was also investigated in the experiments. Simulation results showed that GaN device performance could be improved by increasing the thermal conductivity of mounting plates’ materials. The dissipated power density of the GaN power amplifier increased 17.5 times when the mounting plate was changed from LTCC (Low Temperature Co-fired Ceramics) (k = 2 Wm−1 K−1) to HTCC (High-Temperature Co-fired Ceramics) (k = 180 Wm−1 K−1). Experiment results indicate that the GaN device performance was significantly improved by applying liquid-looped MPFHS, with the maximum dissipated power density reaching 7250 W/cm2. A thermal resistance model for the whole system, replacing traditional plates (PCB (Printed Circuit Board), silicon wafer and LTCC/HTCC) with an MPFHS plate, could significantly reduce θjs (thermal resistance of junction to sink) to its theoretical limitation value.


2018 ◽  
Vol 68 (3) ◽  
pp. 326
Author(s):  
Madhavan Nampoothiri S. ◽  
Sabu Sebastian M. ◽  
Sajith Kumar P.C.

This paper presents the methodology adopted for implementation of Peltier cooling in hermetically sealed electronic packaging units used in sub-sea vessels. In sub-sea vessels, sonar front-end electronics is packaged in hermetically sealed electronic packaging units. The thermal design of the unit is a highly challenging task considering the heat dissipation of 300W from the electronics, non-availability of chilled air for cooling and IP68 sealing requirements. Cooling fans cannot be integrated, since these units are to be placed in acoustically sensitive pressure capsule area of the subsea vessel. The electronic cooling in this unit is achieved using conduction cooling with external fins. To enhance the cooling, suitable Peltier cooling (Thermo-electric cooling or TEC) module is selected and implemented with the system. Computational fluid dynamic analysis of the unit is carried-out to study the air-flow and thermal performances with Peltier cooler. The unit is realised and the estimated temperatures validated by experimental temperature measurements on the realised unit. The measured temperatures are within the safe operating limits of the electronic components and hence the cooling design of the unit is satisfactory. It is also observed that maximum temperature reduction has occurred at 1.5A current and card edge temperature of Printed circuit board lowered by 9.28 °C by implementing Peltier cooling.


Author(s):  
Tousif Ahmed ◽  
Maha Bhouri ◽  
Samer Kahwaji ◽  
Dominic Groulx ◽  
Mary Anne White

This paper presents a study of thermal management of tablet computers (tablet PCs) using phase change materials (PCMs) encapsulated in aluminized laminated film under continuous operation. The experimental setup consists of original tablet PC parts and a simplified dummy printed circuit board (PCB) with a thermal response similar to the original PCB. Two PCMs were used in the experiments, n-eicosane and PT-37 (a commercial PCM from PureTemp). These PCMs have similar melting temperatures (n-eicosane – 35.6 °C; PT-37 – 36.3 °C) but different latent heats of fusion (n-eicosane – 236 kJ/kg; PT-37 – 206 kJ/kg). Two encapsulations with different sizes (6″ × 2.6″, 7″ × 1.5″) but the same thickness (0.0792″ (2 mm)) were used in this study. The effects of inclination and power input level on the thermal behavior of the tablet were investigated. Experiments showed that PCM encapsulated in laminate film led to lower back cover temperature for constant heat flux applications. As much as a 20 °C temperature reduction of the back cover hotspot was achieved with encapsulated PCM. It was also observed that better thermal behavior was achieved both by the melting of PCMs and heat spreading through the laminate film. It was found that the rate of PCM melting is directly related to the power input. No significant effect on PCM melting and temperature history was observed in relation to the system inclination.


2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Xiaojuan Tian ◽  
Mingguang Chen

AbstractInterfacial thermal resistance (ITR) is a critical property for the performance of nanostructured devices where phonon mean free paths are larger than the characteristic length scales. The affordable, accurate and reliable prediction of ITR is essential for material selection in thermal management. In this work, the state-of-the-art machine learning methods were employed to realize this. Descriptor selection was conducted to build robust models and provide guidelines on determining the most important characteristics for targets. Firstly, decision tree (DT) was adopted to calculate the descriptor importances. And descriptor subsets with topX highest importances were chosen (topX-DT, X = 20, 15, 10, 5) to build models. To verify the transferability of the descriptors picked by decision tree, models based on kernel ridge regression, Gaussian process regression and K-nearest neighbors were also evaluated. Afterwards, univariate selection (UV) was utilized to sort descriptors. Finally, the top5 common descriptors selected by DT and UV were used to build concise models. The performance of these refined models is comparable to models using all descriptors, which indicates the high accuracy and reliability of these selection methods. Our strategy results in concise machine learning models for a fast prediction of ITR for thermal management applications.


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