Increased High-Temperature Reliability and Package Hardening of Commercial Integrated Circuits (Through Die Extraction, Electroless Nickel/Gold Pad Reconditioning, and Ceramic Re-Assembly)

2015 ◽  
Vol 2015 (HiTEN) ◽  
pp. 000123-000128
Author(s):  
Erick M. Spory
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Semiconductor Industry ◽  
Value Added ◽  
Electroless Nickel ◽  
High Volume ◽  
Gold Plating ◽  
Global Circuit ◽  
Temperature Applications

There is an ever-increasing demand for electronics in higher temperature applications, both in variety and volume. In many cases, the actual integrated circuit within the plastic packaging can support operation at higher temperatures, although the packaging and connectivity is unable to do so. Ultimately, there still remains a significant gap in the volume demand required for high temperature integrated circuit lines to justify support of more expensive ceramic solutions by the original component manufacturer vs. the cheaper, high-volume PEM flows. Global Circuit Innovations, Inc. has developed a manufacturable, cost-effective solution to extract the integrated circuit from any plastic encapsulated device and subsequently re-package that device into an identical ceramic footprint, with the ability to maintain high-integrity connectivity to the device and enabling functionality for 1000's of hours at temperatures at 250C and beyond. This process represents a high-value added solution to provide high-temperature integrated circuits for a large spectrum of requirements: low-volume, quick-turn evaluation of integrated circuit prototyping, as well as medium to high-volume production needs for ongoing production needs. Although both die extraction and integrated circuit pad electroless nickel/gold plating have both been performed successfully for many years in the semiconductor industry, Global Circuit Innovations, Inc. has been able to combine the two in a reliable, volume manufacturing flow to satisfy many of the stringent requirements for high-temperature applications.

Environmentally Hardening IC Die Previously Assembled in Plastic Packages through Die Removal, Bond Pad Replating and Reassembly into Hermetic Packages

2018 ◽  
Vol 2018 (HiTEC) ◽  
pp. 000039-000044
Author(s):  
Charlie Beebout ◽  
Erick M. Spory
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Oil And Gas ◽  
Elevated Temperatures ◽  
Electroless Nickel ◽  
Oil And Gas Industry ◽  
Market Demand ◽  
Global Circuit ◽  
Bond Wires ◽  
Bond Pads

ABSTRACT Many integrated circuits (ICs) will operate well above their maximum rated temperature of +70°C or +125°C, but are often not packaged appropriately to reliably endure temperatures above +150C. Specifically, the original gold or copper bonds on the aluminum die bond pads are prone to Kirkendall or Horsting voiding, particularly at temperatures greater than +150°C. Also the mold compounds used in plastic packaging for IC assembly can degrade at these elevated temperatures. In some cases, commercial demand for higher temperature reliability can justify a separate offering of ICs assembled in hermetic, ceramic packages from the original component manufacturer (OCM). However, in most cases, the market demand is deemed insufficient. Global Circuit Innovations (GCI) has developed a high-yielding process, which can remove a semiconductor die (i.e., computer chip) from a plastic package, remove the original bond wires and/or ball bonds, plate the aluminum die bond pads with Electroless Nickel, Electroless Palladium, and Immersion Gold (ENEPIG), and then reassemble the now improved semiconductor die into a hermetic, ceramic package. Device Extraction, ENEPIG die bond pad plating and Repackaging (DEER) provides an improved die bond pad surface such that works well with either gold or aluminum bond wires in applications up to +250°C without mechanical or electrical connectivity degradation. GCI routinely exposes sample devices to +250°C bakes with 100% post bake yields so as to continuously ensure that any device processed with the DEER technology will reliably perform in high-temperature environments. Although the oil and gas industry has already expressed significant interest in the DEER process, with excellent lifetest and production application results demonstrating dramatically increased component lifetimes at elevated temperatures, this technology can also be leveraged for any application exposing ICs to harsh environments. Not only is the high-temperature reliability dramatically increased, but also the new hermetic, ceramic package protects the IC from a variety of elements and environments (i.e., corrosives and moisture).

scholarly journals Lithography for enabling advances in integrated circuits and devices

2012 ◽  
Vol 370 (1973) ◽  
pp. 4015-4041 ◽  
Author(s):  
C. Michael Garner
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Extreme Ultraviolet ◽  
Field Effect Transistors ◽  
Semiconductor Industry ◽  
High Volume ◽  
Pattern Transfer ◽  
Time Pattern ◽  
Technology Roadmap ◽  
The Future

Because the transistor was fabricated in volume, lithography has enabled the increase in density of devices and integrated circuits. With the invention of the integrated circuit, lithography enabled the integration of higher densities of field-effect transistors through evolutionary applications of optical lithography. In 1994, the semiconductor industry determined that continuing the increase in density transistors was increasingly difficult and required coordinated development of lithography and process capabilities. It established the US National Technology Roadmap for Semiconductors and this was expanded in 1999 to the International Technology Roadmap for Semiconductors to align multiple industries to provide the complex capabilities to continue increasing the density of integrated circuits to nanometre scales. Since the 1960s, lithography has become increasingly complex with the evolution from contact printers, to steppers, pattern reduction technology at i-line, 248 nm and 193 nm wavelengths, which required dramatic improvements of mask-making technology, photolithography printing and alignment capabilities and photoresist capabilities. At the same time, pattern transfer has evolved from wet etching of features, to plasma etch and more complex etching capabilities to fabricate features that are currently 32 nm in high-volume production. To continue increasing the density of devices and interconnects, new pattern transfer technologies will be needed with options for the future including extreme ultraviolet lithography, imprint technology and directed self-assembly. While complementary metal oxide semiconductors will continue to be extended for many years, these advanced pattern transfer technologies may enable development of novel memory and logic technologies based on different physical phenomena in the future to enhance and extend information processing.

Integrated circuits in silicon carbide for high-temperature applications

MRS Bulletin ◽  
2015 ◽  
Vol 40 (5) ◽  
pp. 431-438 ◽  
Author(s):  
Carl-Mikael Zetterling
Keyword(s):  
Silicon Carbide ◽  
High Temperature ◽  
Integrated Circuits ◽  
Image Position ◽  
Temperature Applications

Abstract

Extended High-Temperature Operation of Silicon Carbide CMOS Circuits for Venus Surface Application

2016 ◽  
Vol 13 (4) ◽  
pp. 143-154 ◽  
Author(s):  
Jim Holmes ◽  
A. Matthew Francis ◽  
Ian Getreu ◽  
Matthew Barlow ◽  
Affan Abbasi ◽  
...  
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Logic Synthesis ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Timing Models ◽  
High Temperature Operation

In the last decade, significant effort has been expended toward the development of reliable, high-temperature integrated circuits. Designs based on a variety of active semiconductor devices including junction field-effect transistors and metal-oxide-semiconductor (MOS) field-effect transistors have been pursued and demonstrated. More recently, advances in low-power complementary MOS (CMOS) devices have enabled the development of highly integrated digital, analog, and mixed-signal integrated circuits. The results of elevated temperature testing (as high as 500°C) of several building block circuits for extended periods (up to 100 h) are presented. These designs, created using the Raytheon UK's HiTSiC® CMOS process, present the densest, lowest-power integrated circuit technology capable of operating at extreme temperatures for any period. Based on these results, Venus nominal temperature (470°C) transistor models and gate-level timing models were created using parasitic extracted simulations. The complete CMOS digital gate library is suitable for logic synthesis and lays the foundation for complex integrated circuits, such as a microcontroller. A 16-bit microcontroller, based on the OpenMSP 16-bit core, is demonstrated through physical design and simulation in SiC-CMOS, with an eye for Venus as well as terrestrial applications.

Thin Film Processing of Complex Multilayer Structures of High-Temperature Superconductors

MRS Bulletin ◽  
1992 ◽  
Vol 17 (8) ◽  
pp. 34-38 ◽  
Author(s):  
Ronald H. Ono
Keyword(s):  
Thin Film ◽  
High Temperature ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
High Temperature Superconductors ◽  
Dissimilar Materials ◽  
Film Structure ◽  
Monolithic Integrated Circuit ◽  
Fully Integrated ◽  
Economy Of Scale

The realization of a revolutionary generation of electronics based on high-temperature superconductors (HTS) crucially depends on the ability to make high-quality thin film microstructures. These will incorporate materials such as YBa2Cu3O7-δ (YBCO), TlBaCaCuO, or BiSrCaCuO in a fashion similar to the circuits and devices made of their low Tc counterparts Nb or NbN. Without exception, the most valuable structures will be composed of multiple layers of superconducting films and dielectrics, in some cases combined with normal metals, low-temperature superconductors, or a variety of semiconductors. Generically, these can be combined in two ways: in a hybrid design where specialized packages and bonding are used to attach dissimilar materials, or in a monolithic thin film structure such as the one seen in Figure 1.The division between hybrid and monolithic multilayers results from the historical development of electronic circuits. Hybrid designs typically require linewidths and alignment accuracy somewhat less demanding than those used in fully integrated circuits. The advantage of hybrid construction is the separation of incompatible processing steps onto different substrates or die. The monolithic integrated circuit, whether microelectronic, millimeter wave, or radio frequency, can be made in large batches with concomitant economy of scale and can be fabricated with fewer parasitic constraints. Superconducting integrated circuits have followed the semiconductor pattern of being developed in a hybrid fashion, then transferred to a fully integrated process.

scholarly journals High Temperature Silicon Integrated Circuits and Passive Components for Commercial and Military Applications

1998 ◽  
Author(s):  
Richard R. Grzybowski ◽  
Ben Gingrich
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Elevated Temperatures ◽  
Silicon On Insulator ◽  
Passive Component ◽  
Oil Well ◽  
Automotive Electronics ◽  
Passive Components ◽  
Silicon Integrated Circuits

Advances in silicon-on-insulator (SOI) integrated circuit technology and the steady development of wider band gap semiconductors like silicon carbide are enabling the practical deployment of high temperature electronics. High temperature civilian and military electronics applications include distributed controls for aircraft, automotive electronics, electric vehicles and instrumentation for geothermal wells, oil well logging and nuclear reactors. While integrated circuits are key to the realization of complete high temperature electronic systems, passive components including resistors, capacitors, magnetics and crystals are also required. This paper will present characterization data obtained from a number of silicon high temperature integrated evaluated over a range of elevated temperatures and aged at a selected high temperature. This paper will also present a representative cross section of high temperature passive component characterization data for device types needed by many applications. Device types represented will include both small signal and power resistors and capacitors. Specific problems encountered with the employment of these devices in harsh environments will be discussed for each family of components. The goal in presenting this information is to demonstrate the viability of a significant number of commercially available silicon integrated circuits and passive components that operate at elevated temperatures as well as to encourage component suppliers to continue to optimize a selection of their product offerings for operation at higher temperatures. In addition, systems designers will be encouraged to view this information with an eye toward the conception and implementation of reliable and affordable high temperature systems.

Digital and Analogue Integrated Circuits in Silicon Carbide for High Temperature Operation

2012 ◽  
Vol 2012 (HITEC) ◽  
pp. 000373-000377 ◽  
Author(s):  
E.P Ramsay ◽  
D.T. Clark ◽  
J.D. Cormack ◽  
A.E. Murphy ◽  
D.A Smith ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
High Temperature ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Nand Gate ◽  
Cmos Process ◽  
Flip Flop ◽  
Aero Engines ◽  
Simple Logic ◽  
High Temperature Operation

A need for high temperature integrated circuits is emerging in a number of application areas. As Silicon Carbide power discrete devices become more widely available, there is a growing need for control ICs capable of operating at the same temperatures and mounted on the same modules. Also, the use of high temperature sensors, in, for example, aero engines and in deep hydrocarbon and geothermal drilling applications results in a demand for high temperature sensor interface ICs. This paper presents new results on a range of simple logic and analogue circuits fabricated on a developing Silicon Carbide CMOS process which is intended for mixed signal integrated circuit applications such as those above. A small family of logic circuits, pin compatible with the 74xx series TTL logic parts, has been designed, fabricated and tested and includes, for example, a Quad Nand gate and a Dual D-type flip-flop. These have been found to be functional from room temperature up to 400°C. Analogue blocks have been investigated with a view to using switched capacitor or autozero techniques to compensate for temperature and time induced drifts, allowing very high temperature operation.

Operation of Silicon Carbide Integrated Circuits under High Temperature and Pressure

2017 ◽  
Vol 2017 (1) ◽  
pp. 000526-000530
Author(s):  
M. Barlow ◽  
A. M. Francis ◽  
J. Holmes
Keyword(s):  
Silicon Carbide ◽  
High Pressure ◽  
High Temperature ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Leading Edge ◽  
Limited Information ◽  
High Temperature And Pressure ◽  
Temperature And Pressure

Abstract Silicon carbide integrated circuits have demonstrated the ability to function at temperatures as high as 600 °C for extended periods of time. Many environments where high temperature in-situ electronics are desired also have large pressures as well. While some validation has been done for high pressure environments, limited information on the parametric impact of pressure on SiC integrated circuits is available. This paper takes two leading-edge SiC integrated circuit processes using two different classes of devices (JFET and CMOS), and measures the performance through temperature and pressure variation. Circuit functionality was verified at high temperature (475 °C) as well as high pressure (1700 psig).

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