Thermally Activated Bumping Process using Sn3.0Ag0.5Cu Solder Powder for Low-Cost Interposers

2013 ◽  
Vol 2013 (1) ◽  
pp. 000420-000423
Author(s):  
Kwang-Seong Choi ◽  
Ho-Eun Bae ◽  
Haksun Lee ◽  
Hyun-Cheol Bae ◽  
Yong-Sung Eom

A novel bumping process using solder bump maker (SBM) is developed for fine-pitch flip chip bonding. It features maskless screen printing process with the result that a fine-pitch, low-cost, and lead-free solder-on-pad (SoP) technology can be easily implemented. The process includes two main steps: one is the thermally activated aggregation of solder powder on the metal pads on a substrate and the other is the reflow of the deposited powder on the pads. Only a small quantity of solder powder adjacent to the pads can join the first step, so a quite uniform SoP array on the substrate can be easily obtained regardless of the pad configurations. Through this process, an SoP array on an organic substrate with a pitch of 130 μm is, successfully, formed.

2015 ◽  
Vol 2015 (DPC) ◽  
pp. 000611-000638
Author(s):  
Jonathan Prange ◽  
Yi Qin ◽  
Matthew Thorseth ◽  
Inho Lee ◽  
Masaaki Imanari ◽  
...  

Flip-chip interconnect and 3-D packaging applications must utilize reliable, high-performance metallization products in order to produce highly-efficient, low-cost microelectronic devices. As the market moves to shrinking device architectural features and increasingly difficult pattern layouts, more demand is placed on the plating performance of the copper, nickel and lead-free solder products used to create these interconnects. Additionally, the move from traditional C4 bumping processes with lead-free solder to capping processes utilizing copper pillars with lead-free solder requires metal interfaces that are highly compatible in order to avoid defects that could occur. In this paper, next-generation products developed for copper pillar, nickel barrier, and lead-free solder plating will be introduced that are capable of delivering high-performance and highly reliable metallic interconnects. The additive packages that were selected and optimized allowing for increased rate of electrodeposition, uniform height control with controllable pillar shape and smooth surface morphology will be discussed. Furthermore, compatibility will be shown for a lead-free solder cap electrodeposited onto copper pillar structures, both with and without nickel barrier layers, on large pore features (≥50 μm diameter) and micro pore features (≤20 μm diameter) for both bumping and capping applications.


2012 ◽  
Vol 42 (2) ◽  
pp. 230-239 ◽  
Author(s):  
Ye Tian ◽  
Justin Chow ◽  
Xi Liu ◽  
Yi Ping Wu ◽  
Suresh K. Sitaraman

2003 ◽  
Vol 125 (4) ◽  
pp. 597-601
Author(s):  
R. T. P. Lee ◽  
A. S. Zuruzi ◽  
S. K. Lahiri

The results of this study demonstrate the viability of a low cost maskless process for the fabrication of ultra-fine pitch solder bumps. The fabricated solder bump arrays have a pitch and diameter of 120 and 70 μm, respectively. Widely used eutectic 63Sn37Pb and lead-free 95.5Sn3.8Ag0.7Cu solders were used to form the bumps. No solder bridging was observed between adjacent bumps, and the solder bumps exhibited good dimensional uniformity. The solder bump to aluminum (Al) pad bond integrity was found to be excellent, as evidenced by the high stress to failure. The failure mode is predominately Al pad lift-off indicating a robust solder bump-pad joint.


Author(s):  
Masayuki Uchida ◽  
Hisashi Ito ◽  
Ken Yabui ◽  
Hideo Nishiuchi ◽  
Takashi Togasaki ◽  
...  

2015 ◽  
Vol 772 ◽  
pp. 284-289 ◽  
Author(s):  
Sabuj Mallik ◽  
Jude Njoku ◽  
Gabriel Takyi

Voiding in solder joints poses a serious reliability concern for electronic products. The aim of this research was to quantify the void formation in lead-free solder joints through X-ray inspections. Experiments were designed to investigate how void formation is affected by solder bump size and shape, differences in reflow time and temperature, and differences in solder paste formulation. Four different lead-free solder paste samples were used to produce solder bumps on a number of test boards, using surface mount reflow soldering process. Using an advanced X-ray inspection system void percentages were measured for three different size and shape solder bumps. Results indicate that the voiding in solder joint is strongly influenced by solder bump size and shape, with voids found to have increased when bump size decreased. A longer soaking period during reflow stage has negatively affectedsolder voids. Voiding was also accelerated with smaller solder particles in solder paste.


2008 ◽  
Vol 47-50 ◽  
pp. 907-911
Author(s):  
Chang Woo Lee ◽  
Y.S. Shin ◽  
J.H. Kim

The growth behaviour of the intermetallic compounds (IMCs) in Pb-free solder bump is investigated. The Pb-free micro-bump, Sn-50%Bi, was fabricated by binary electroplating for flip-chip bond. The diameter of the bump is about 506m and the height is about 60 6m. In order to increase the reliability of the bonding, it is necessary to protect the growth of the IMCs in interface between Cu pad and the solder bump. For control of IMCs growth, SiC particles were distributed in the micro-solder bump during electroplating. The thickness of the IMCs in the interface was estimated by FE-SEM, EDS, XRF and TEM. From the results, The IMCs were found as Cu6Sn5 and Cu3Sn. The thickness of the IMCs decreases with increase the amount of SiC particles until 4 g/cm2. The one candidate of the reasons is that the SiC particles could decrease the area which be reacted between the solder and Cu layer. And another candidate is that the particle can make to difficult inter-diffusion within the interface.


2004 ◽  
Vol 45 (3) ◽  
pp. 754-758 ◽  
Author(s):  
Ikuo Shohji ◽  
Yuji Shiratori ◽  
Hiroshi Yoshida ◽  
Masahiko Mizukami ◽  
Akira Ichida

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