scholarly journals Low power current sources for bioimpedance measurements: a comparison between Howland and OTA-based CMOS circuits

2019 ◽  
Vol 3 (1) ◽  
pp. 66-73 ◽  
Author(s):  
Pedro Bertemes-Filho ◽  
Volney C. Vincence ◽  
Marcio M. Santos ◽  
Ilson X. Zanatta
Keyword(s):  
Low Power ◽  
Current Source ◽  
Harmonic Distortion ◽  
Input Voltage ◽  
Wide Frequency Range ◽  
Current Conveyor ◽  
Invasive Technique ◽  
Output Impedance ◽  
Current Frequency ◽  
Class Ab

Abstract Multifrequency Electrical Bioimpedance (MEB) has been widely used as a non-invasive technique for characterizing tissues. Most MEB systems use wideband current sources for injecting current and instrumentation amplifiers for measuring the resultant potential difference. To be viable current sources should have intrinsically high output impedance for a very wide frequency range. Most contemporary current sources in MEB systems are based on the Howland circuit. The objective of this work is to compare the Mirrored Modified Howland Current Source (MMHCS) with three Operational Transconductance Amplifier (OTA) based voltage controlled current sources (i.e., class-A, class-AB and current conveyor). The results show that both current conveyor and class-AB OTA-based current sources have a wider output current frequency response and an output impedance of 226% larger than the MMHCS circuit at 1 MHz. The presented class-AB OTA circuit has a power consumption of 4.6 mW whereas current conveyor consumed 1.6 mW. However, the MMHCS circuit had a maximum total harmonic distortion of 0.5% over the input voltage from -0.5 to +0.5 V. The OTA-based current sources are going to be integrated in a semiconductor process. The results might be useful for cell impedance measurements and for very low power bioimpedance applications.

scholarly journals A Low-Power Stable Wideband Current Source for Acupuncture Point Skin Impedance Measurements

2021 ◽  
Vol 2021 ◽  
pp. 1-9
Author(s):  
Changpei Qiu ◽  
Tianxia Zhao ◽  
Qiuping Li ◽  
Xin’an Wang ◽  
Kanglin Xiao ◽  
...  
Keyword(s):  
Low Power ◽  
Current Source ◽  
Harmonic Distortion ◽  
Acupuncture Point ◽  
Cmos Technology ◽  
Skin Impedance ◽  
Output Impedance ◽  
Output Current ◽  
Impedance Measurements ◽  
The Stability

A low-power stable wideband current source for acupuncture point skin impedance measurements has been designed employing a differential architecture and negative feedback. The circuits extend bandwidth to 1 MHz, reducing harmonic distortion to 0.24% at 1 MHz. The output impedance is 37 MΩ at 100 kHz and 11 MΩ at 1 MHz. The stability of the output current of the current source when connected to different loads is below 0.1% at frequencies up to 500 kHz and increases to 0.74% at 1 MHz. The circuit was manufactured in a 0.13-μm CMOS technology and measured results are presented. The area of the current source is 0.09 mm2 and its consumption is 1.2 mW. It is intended for low-power acupuncture point skin impedance measurements.

scholarly journals High-Speed Rail-to-Rail Class-AB Buffer Amplifier with Compact, Adaptive Biasing for FPD Applications

Electronics ◽  
2020 ◽  
Vol 9 (12) ◽  
pp. 2018
Author(s):  
Chang-Ho An ◽  
Bai-Sun Kong
Keyword(s):  
Low Power ◽  
Current Source ◽  
Settling Time ◽  
Output Buffer ◽  
Slew Rate ◽  
Class Ab ◽  
Tail Current ◽  
Rail To Rail ◽  
Adaptive Biasing ◽  
Buffer Amplifier

A high-slew-rate, low-power, CMOS, rail-to-rail buffer amplifier for large flat-panel-display (FPD) applications is proposed. The major circuit of the output buffer is a rail-to-rail, folded-cascode, class-AB amplifier which can control the tail current source using a compact, novel, adaptive biasing scheme. The proposed output buffer amplifier enhances the slew rate throughout the entire rail-to-rail input signal range. To obtain a high slew rate and low power consumption without increasing the static current, the tail current source of the adaptive biasing generates extra current during the transition time of the output buffer amplifier. A column driver IC incorporating the proposed buffer amplifier was fabricated in a 1.6-μm 18-V CMOS technology, whose evaluation results indicated that the static current was reduced by up to 39.2% when providing an identical settling time. The proposed amplifier also achieved up to 49.1% (90% falling) and 19.9 % (99.9% falling) improvements in terms of settling time for almost the same static current drawn and active area occupied.

scholarly journals Voltage mode electronically tunable full-wave rectifier

2017 ◽  
Vol 68 (1) ◽  
pp. 61-67 ◽  
Author(s):  
Predrag B. Petrović ◽  
Milan Vesković ◽  
Slobodan Đukić
Keyword(s):  
Signal Processing ◽  
Power Consumption ◽  
Harmonic Distortion ◽  
Input Voltage ◽  
Current Conveyor ◽  
Output Current ◽  
Zero Crossing ◽  
Full Wave ◽  
Voltage Signal ◽  
Electronically Tunable

Abstract The paper presents a new realization of bipolar full-wave rectifier of input sinusoidal signals, employing one MO-CCCII (multiple output current controlled current conveyor), a zero-crossing detector (ZCD), and one resistor connected to fixed potential. The circuit provides the operating frequency up to 10 MHz with increased linearity and precision in processing of input voltage signal, with a very low harmonic distortion. The errors related to the signal processing and errors bound were investigated and provided in the paper. The PSpice simulations are depicted and agree well with the theoretical anticipation. The maximum power consumption of the converter is approximately 2.83 mW, at ±1.2 V supply voltages.

scholarly journals PLL-BASED 3? INVERTER CIRCUIT FOR MICROGRID SYSTEM OPERATED BY ELECTROSTATIC GENERATOR

2019 ◽  
Vol 20 (1) ◽  
pp. 177-193
Author(s):  
S.M.A Motakabber ◽  
Tawfikur Rahman ◽  
Muhammad I. Ibrahimy ◽  
A. H. M. Zahirul Alam
Keyword(s):  
Phase Angle ◽  
Current Source ◽  
Harmonic Distortion ◽  
Input Voltage ◽  
Switching Topology ◽  
Source Control ◽  
Switching Frequency ◽  
Electrostatic Generator ◽  
Inverter Circuit ◽  
Frequency Harmonic

A current source control based PLL (phase lock loop) technique is one of the most efficient methods for modern 3? synchronized grid power systems. When an inverter circuit is driven by an electrostatic generator with wind power, it encounters some problems, such as static and dynamic turn-on-off switching losses, unbalanced source voltage, low continuous current, higher frequency harmonic distortion, phase angle imbalance, etc. To solve these problems, a series of connected switching inverter modules technique is proposed. It is not only a traditional inverter system, but it also works as a low-frequency ripple current inverter with lower switch losses. A new topology of phase synchronous inverter (PSI) is designed using a PLL current source controller. The input voltage source of the PSI is a high DC voltage from an electrostatic generator (ESG). The modified ESG is capable of generating the HVDC and a continuous moderate amount of current. The proposed switching topology of the inverter is able to control the microgrid power as well as reduce the dynamic and static switching loss. It also reduces the high-frequency harmonic distortion and improves the phase angle error. The output LCL lowpass filter scheme of the inverter is designed to reduce the total harmonic distortion of 1.62%. The PSI circuit is designed and simulated using MATLAB software. In the developed system, the input voltage of 8 k , microgrid frequency of 50Hz, switching frequency of the carrier of 10 kHz, and modulation index of 0.85 are considered to be implemented. The proposed novel microgrid connected PSI switching module design technique has significantly enhanced the power stability. The overall system efficiency improved by 95.52%. ABSTRAK: Sumber-arus terkawal berdasarkan teknik PLL (fasa litar kunci) adalah satu kaedah cekap bagi sistem moden tenaga grid selaras 3?. Apabila litar songsang (inverter) digerak menggunakan penjana elektrostatik bersama tenaga angin, ia mengalami masalah seperti kehilangan tenaga statik dan dinamik suis hidup-mati, sumber voltan yang tidak seimbang, kurang arus terus, gangguan harmoni frekuensi tinggi, ketidak-seimbangan sudut fasa, dan sebagainya. Bagi menyelesaikan masalah ini, teknik modul suis bersiri dihubung bersama inverter telah dicadangkan. Ini bukan semata-mata teknik lama sistem inverter, tetapi ia juga berfungsi sebagai arus tidak tetap frekuensi-rendah dengan kurang kehilangan tenaga pada suis inverter. Topologi baru fasa inverter tetap (PSI) ini telah direka menggunakan kawalan sumber arus PLL. Sumber voltan masuk PSI ini telah digunakan daripada voltan DC tinggi penjana elektrostatik (ESG). ESG yang diubah suai ini dapat menghasilkan HVDC dan arus terus yang sederhana. Topologi suis inverter yang dicadang ini dapat mengawal kuasa mikrogrid serta mengurangkan kehilangan dinamik dan statik suis. Ia juga mengurangkan gangguan harmoni frekuensi tinggi dan memperbaiki ketidak-seimbangan sudut fasa. Skim tapisan signal keluar yang rendah pada LCL inverter ini direka bagi mengurangkan total gangguan harmoni sebanyak 1.62%. Litar PSI ini direka dan disimulasi menggunakan perisian MATLAB. Dalam sistem yang dibangunkan ini, 8 kVDCvoltan masuk, 50Hz frekuensi mikrogrid, 10 kHz frekuensi suis angkutan dan 0.85 indeks modulasi telah dipertimbangkan untuk kegunaan. Teknik baru modul suis PSI mikrogrid bersambung yang dicadangkan ini mempunyai kepentingan dalam menstabilkan kuasa dan memperbaiki kecekapan sistem keseluruhan sebanyak 95.52%.

COMPOSITE TRANSISTOR CELL USING DYNAMIC BODY BIAS FOR HIGH GAIN AND LOW-VOLTAGE APPLICATIONS

2014 ◽  
Vol 23 (08) ◽  
pp. 1450108 ◽  
Author(s):  
VANDANA NIRANJAN ◽  
ASHWANI KUMAR ◽  
SHAIL BALA JAIN
Keyword(s):  
Low Power ◽  
Large Scale ◽  
Low Voltage ◽  
Supply Voltage ◽  
High Gain ◽  
Signal Frequency ◽  
Output Impedance ◽  
Self Cascode ◽  
Intrinsic Gain ◽  
Body Bias

In this work, a new composite transistor cell using dynamic body bias technique is proposed. This cell is based on self cascode topology. The key attractive feature of the proposed cell is that body effect is utilized to realize asymmetric threshold voltage self cascode structure. The proposed cell has nearly four times higher output impedance than its conventional version. Dynamic body bias technique increases the intrinsic gain of the proposed cell by 11.17 dB. Analytical formulation for output impedance and intrinsic gain parameters of the proposed cell has been derived using small signal analysis. The proposed cell can operate at low power supply voltage of 1 V and consumes merely 43.1 nW. PSpice simulation results using 180 nm CMOS technology from Taiwan Semiconductor Manufacturing Company (TSMC) are included to prove the unique results. The proposed cell could constitute an efficient analog Very Large Scale Integration (VLSI) cell library in the design of high gain analog integrated circuits and is particularly interesting for biomedical and instrumentation applications requiring low-voltage low-power operation capability where the processing signal frequency is very low.

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