SPIKE_4096: A neural integrated circuit for image segmentation

1998 ◽  
pp. 287-294 ◽  
Author(s):  
Jean -Luc Rebourg ◽  
Jean -Denis Muller ◽  
Manuel Samuelides
Keyword(s):  
Image Segmentation ◽  
Integrated Circuit

scholarly journals OPTIMIZATION OF SEGMENTATION QUALITY OF INTEGRATED CIRCUIT IMAGES / INTEGRINIŲ GRANDYNŲ VAIZDŲ SEGMENTAVIMO KOKYBĖS OPTIMIZAVIMAS

2012 ◽  
Vol 4 (1) ◽  
pp. 5-8
Author(s):  
Gintautas Mušketas
Keyword(s):  
Genetic Algorithms ◽  
Image Segmentation ◽  
Integrated Circuit ◽  
Optimization Problem ◽  
Active Regions ◽  
Genetic Optimization ◽  
Segmentation Accuracy ◽  
Segmentation Quality ◽  
Sequence Parameters

The paper presents investigation into the application of genetic algorithms for the segmentation of the active regions of integrated circuit images. This article is dedicated to a theoretical examination of the applied methods (morphological dilation, erosion, hit-and-miss, threshold) and describes genetic algorithms, image segmentation as optimization problem. The genetic optimization of the predefined filter sequence parameters is carried out. Improvement to segmentation accuracy using a non optimized filter sequence makes 6%. Santrauka Nagrinėjamas genetinių algoritmų taikymas integrinių grandynų aktyviųjų sričių vaizdams segmentuoti. Teoriškai aprašomi taikomi segmentavimo metodai (morfologinis plėtimas, erozija, pataikymo-nepataikymo transformacija, slenksčio funkcija), genetiniai algoritmai. Vaizdo segmentavimas apibrėžiamas kaip optimizavimo problema. Atliekamas eksperimentiškai parinktos filtrų sekos parametrų optimizavimas ir parodoma, kad optimizuota filtrų seka gaunami 6 % geresni rezultatai.

Integrated circuit layer image segmentation

2010 ◽  
Author(s):  
Giedrius Masalskis ◽  
Romas Petrauskas
Keyword(s):  
Image Segmentation ◽  
Integrated Circuit ◽  
Layer Image

The Precipitation of Si in AlCuSi Thin Films

1973 ◽  
Vol 31 ◽  
pp. 34-35 ◽  
Author(s):  
R. M. Anderson
Keyword(s):  
Electron Microscopy ◽  
Thin Films ◽  
Heat Treatment ◽  
Solid Solution ◽  
Integrated Circuit ◽  
Copper Film ◽  
Solution Concentration ◽  
X Ray ◽  
Silicon Thin Films ◽  
Before And After

Aluminum-copper-silicon thin films have been considered as an interconnection metallurgy for integrated circuit applications. Various schemes have been proposed to incorporate small percent-ages of silicon into films that typically contain two to five percent copper. We undertook a study of the total effect of silicon on the aluminum copper film as revealed by transmission electron microscopy, scanning electron microscopy, x-ray diffraction and ion microprobe techniques as a function of the various deposition methods.X-ray investigations noted a change in solid solution concentration as a function of Si content before and after heat-treatment. The amount of solid solution in the Al increased with heat-treatment for films with ≥2% silicon and decreased for films <2% silicon.

Characterization of RF Sputtered ZnO Piezoelectric Films Using Transmission Electron Microscope

1975 ◽  
Vol 33 ◽  
pp. 86-87
Author(s):  
Kemining W. Yeh ◽  
Richard S. Muller ◽  
Wei-Kuo Wu ◽  
Jack Washburn
Keyword(s):  
Integrated Circuit ◽  
Acoustic Waves ◽  
New Technology ◽  
Surface Acoustic Waves ◽  
Electromechanical Properties ◽  
Leading Role ◽  
Saw Devices ◽  
Transmission Electron ◽  
High Degree

Considerable and continuing interest has been shown in the thin film transducer fabrication for surface acoustic waves (SAW) in the past few years. Due to the high degree of miniaturization, compatibility with silicon integrated circuit technology, simplicity and ease of design, this new technology has played an important role in the design of new devices for communications and signal processing. Among the commonly used piezoelectric thin films, ZnO generally yields superior electromechanical properties and is expected to play a leading role in the development of SAW devices.

Scanning Electron Microscopy in Hybrid Microelectronics

1976 ◽  
Vol 34 ◽  
pp. 456-457
Author(s):  
S. Khadpe ◽  
R. Faryniak
Keyword(s):  
Integrated Circuits ◽  
Thick Film ◽  
Integrated Circuit ◽  
Failure Modes ◽  
Three Dimensional ◽  
Circuit Components ◽  
Hybrid Microcircuit ◽  
Electrical Connections ◽  
Scanning Electron

The Scanning Electron Microscope (SEM) is an important tool in Thick Film Hybrid Microcircuits Manufacturing because of its large depth of focus and three dimensional capability. This paper discusses some of the important areas in which the SEM is used to monitor process control and component failure modes during the various stages of manufacture of a typical hybrid microcircuit.Figure 1 shows a thick film hybrid microcircuit used in a Motorola Paging Receiver. The circuit consists of thick film resistors and conductors screened and fired on a ceramic (aluminum oxide) substrate. Two integrated circuit dice are bonded to the conductors by means of conductive epoxy and electrical connections from each integrated circuit to the substrate are made by ultrasonically bonding 1 mil aluminum wires from the die pads to appropriate conductor pads on the substrate. In addition to the integrated circuits and the resistors, the circuit includes seven chip capacitors soldered onto the substrate. Some of the important considerations involved in the selection and reliability aspects of the hybrid circuit components are: (a) the quality of the substrate; (b) the surface structure of the thick film conductors; (c) the metallization characteristics of the integrated circuit; and (d) the quality of the wire bond interconnections.

Preparation of TEM samples by focused ion beams

1995 ◽  
Vol 53 ◽  
pp. 518-519
Author(s):  
John F. Walker ◽  
J C Reiner ◽  
C Solenthaler
Keyword(s):  
Integrated Circuit ◽  
Polycrystalline Silicon ◽  
Field Effect Transistor ◽  
High Spatial Resolution ◽  
Ion Beam ◽  
Ion Beams ◽  
Focused Ion Beams ◽  
Precise Location ◽  
Effect Transistor ◽  
Circuit Technology

The high spatial resolution available from TEM can be used with great advantage in the field of microelectronics to identify problems associated with the continually shrinking geometries of integrated circuit technology. In many cases the location of the problem can be the most problematic element of sample preparation. Focused ion beams (FIB) have previously been used to prepare TEM specimens, but not including using the ion beam imaging capabilities to locate a buried feature of interest. Here we describe how a defect has been located using the ability of a FIB to both mill a section and to search for a defect whose precise location is unknown. The defect is known from electrical leakage measurements to be a break in the gate oxide of a field effect transistor. The gate is a square of polycrystalline silicon, approximately 1μm×1μm, on a silicon dioxide barrier which is about 17nm thick. The break in the oxide can occur anywhere within that square and is expected to be less than 100nm in diameter.

Acoustic microscopy techniques for the inspection of integrated circuit devices and packages

1992 ◽  
Vol 50 (2) ◽  
pp. 966-967
Author(s):  
Thomas M. Moore
Keyword(s):  
Integrated Circuit ◽  
Acoustic Microscopy ◽  
Hybrid Technique ◽  
Frequency Scanning ◽  
Ic Packaging ◽  
Ic Package ◽  
Microscopy Techniques ◽  
Ic Package Inspection ◽  
Pulse Echo ◽  
Scanning Acoustic Microscope

In the last decade, a variety of characterization techniques based on acoustic phenomena have come into widespread use. Characteristics of matter waves such as their ability to penetrate optically opaque solids and produce image contrast based on acoustic impedance differences have made these techniques attractive to semiconductor and integrated circuit (IC) packaging researchers.These techniques can be divided into two groups. The first group includes techniques primarily applied to IC package inspection which take advantage of the ability of ultrasound to penetrate deeply and nondestructively through optically opaque solids. C-mode Acoustic Microscopy (C-AM) is a recently developed hybrid technique which combines the narrow-band pulse-echo piezotransducers of conventional C-scan recording with the precision scanning and sophisticated signal analysis capabilities normally associated with the high frequency Scanning Acoustic Microscope (SAM). A single piezotransducer is scanned over the sample and both transmits acoustic pulses into the sample and receives acoustic echo signals from the sample.

Ion thinning of integrated circuit transverse specimens for transmission electron microscopy

1992 ◽  
Vol 50 (2) ◽  
pp. 1426-1427
Author(s):  
F. Shaapur
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Integrated Circuit ◽  
Substrate Surface ◽  
Homogeneous Material ◽  
Material System ◽  
Ion Milling ◽  
Cross Sectional ◽  
Transmission Electron ◽  
Motion Profile

Non-uniform ion-thinning of heterogenous material structures has constituted a fundamental difficulty in preparation of specimens for transmission electron microscopy (TEM). A variety of corrective procedures have been developed and reported for reducing or eliminating the effect. Some of these techniques are applicable to any non-homogeneous material system and others only to unidirectionalfy heterogeneous samples. Recently, a procedure of the latter type has been developed which is mainly based on a new motion profile for the specimen rotation during ion-milling. This motion profile consists of reversing partial revolutions (RPR) within a fixed sector which is centered around a direction perpendicular to the specimen heterogeneity axis. The ion-milling results obtained through this technique, as studied on a number of thin film cross-sectional TEM (XTEM) specimens, have proved to be superior to those produced via other procedures.XTEM specimens from integrated circuit (IC) devices essentially form a complex unidirectional nonhomogeneous structure. The presence of a variety of mostly lateral features at different levels along the substrate surface (consisting of conductors, semiconductors, and insulators) generally cause non-uniform results if ion-thinned conventionally.

TEM study of phosphorus-implanted pseudomorphic Si0.88Ge0.12 on Si(100)

1995 ◽  
Vol 53 ◽  
pp. 468-469
Author(s):  
N. David Theodore ◽  
Donald Y.C Lie ◽  
J. H. Song ◽  
Peter Crozier
Keyword(s):  
Integrated Circuits ◽  
Heterojunction Bipolar Transistors ◽  
Integrated Circuit ◽  
High Speed ◽  
Room Temperature ◽  
Strain Relaxation ◽  
Bipolar Transistors ◽  
Sige Hbt ◽  
Integrated Circuit Manufacturing ◽  
Microstructural Behavior

SiGe is being extensively investigated for use in heterojunction bipolar-transistors (HBT) and high-speed integrated circuits. The material offers adjustable bandgaps, improved carrier mobilities over Si homostructures, and compatibility with Si-based integrated-circuit manufacturing. SiGe HBT performance can be improved by increasing the base-doping or by widening the base link-region by ion implantation. A problem that arises however is that implantation can enhance strain-relaxation of SiGe/Si.Furthermore, once misfit or threading dislocations result, the defects can give rise to recombination-generation in depletion regions of semiconductor devices. It is of relevance therefore to study the damage and anneal behavior of implanted SiGe layers. The present study investigates the microstructural behavior of phosphorus implanted pseudomorphic metastable Si0.88Ge0.12 films on silicon, exposed to various anneals.Metastable pseudomorphic Si0.88Ge0.12 films were grown ~265 nm thick on a silicon wafer by molecular-beam epitaxy. Pieces of this wafer were then implanted at room temperature with 100 keV phosphorus ions to a dose of 1.5×1015 cm-2.

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