Influence of an oxide layer on the hydride embrittlement in zircaloy-4

1993 ◽  
Vol 29 (5) ◽  
pp. 617-622 ◽  
Author(s):  
J.B Bai
Author(s):  
C. O. Jung ◽  
S. J. Krause ◽  
S.R. Wilson

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.


2015 ◽  
Vol 53 (8) ◽  
pp. 535-540 ◽  
Author(s):  
Young Gun Ko ◽  
Dong Hyuk Shin ◽  
Hae Woong Yang ◽  
Yeon Sung Kim ◽  
Joo Hyun Park ◽  
...  

2003 ◽  
Vol 762 ◽  
Author(s):  
H. Águas ◽  
L. Pereira ◽  
A. Goullet ◽  
R. Silva ◽  
E. Fortunato ◽  
...  

AbstractIn this work we present results of a study performed on MIS diodes with the following structure: substrate (glass) / Cr (2000Å) / a-Si:H n+ (400Å) / a-Si:H i (5500Å) / oxide (0-40Å) / Au (100Å) to determine the influence of the oxide passivation layer grown by different techniques on the electrical performance of MIS devices. The results achieved show that the diodes with oxides grown using hydrogen peroxide present higher rectification factor (2×106)and signal to noise (S/N) ratio (1×107 at -1V) than the diodes with oxides obtained by the evaporation of SiO2, or by the chemical deposition of SiO2 by plasma of HMDSO (hexamethyldisiloxane), but in the case of deposited oxides, the breakdown voltage is higher, 30V instead of 3-10 V for grown oxides. The ideal oxide thickness, determined by spectroscopic ellipsometry, is dependent on the method used to grow the oxide layer and is in the range between 6 and 20 Å. The reason for this variation is related to the degree of compactation of the oxide produced, which is not relevant for applications of the diodes in the range of ± 1V, but is relevant when high breakdown voltages are required.


2005 ◽  
Vol 879 ◽  
Author(s):  
Scott K. Stanley ◽  
John G. Ekerdt

AbstractGe is deposited on HfO2 surfaces by chemical vapor deposition (CVD) with GeH4. 0.7-1.0 ML GeHx (x = 0-3) is deposited by thermally cracking GeH4 on a hot tungsten filament. Ge oxidation and bonding are studied at 300-1000 K with X-ray photoelectron spectroscopy (XPS). Ge, GeH, GeO, and GeO2 desorption are measured with temperature programmed desorption (TPD) at 400-1000 K. Ge initially reacts with the dielectric forming an oxide layer followed by Ge deposition and formation of nanocrystals in CVD at 870 K. 0.7-1.0 ML GeHx deposited by cracking rapidly forms a contacting oxide layer on HfO2 that is stable from 300-800 K. Ge is fully removed from the HfO2 surface after annealing to 1000 K. These results help explain the stability of Ge nanocrystals in contact with HfO2.


2018 ◽  
Vol 49 (15) ◽  
pp. 1445-1458
Author(s):  
Deheng Shi ◽  
Fenghui Zou ◽  
Zunlue Zhu ◽  
Jinfeng Sun

2018 ◽  
Author(s):  
Rituja Patil ◽  
Aayush Mantri ◽  
Stephen House ◽  
Judith C. Yang ◽  
James McKone

We have studied the composition and morphology of Ni-Mo alloys. These alloys consist of a Ni-rich core surrounded by Mo-rich oxide layer. The HER activity of Ni-Mo alloys was seen to be limited by interfacial resistance rather than kinetic and solution transport. Vulcan carbon, a conductive support mitigate the resistive limitations by providing conductive percolation networks.


Author(s):  
Yanhua Huang ◽  
Lei Zhu ◽  
Kenny Ong ◽  
Hanwei Teo ◽  
Younan Hua

Abstract Contamination in the gate oxide layer is the most common effect which cause the gate oxide integrate (GOI) issue. Dynamic Secondary Ion Mass Spectrometry (SIMS) is a mature tool for GOI contamination analysis. During the sample preparation, all metal and IDL layers above poly should be removed because the presence of these layers added complexity for the subsequent SIMS analysis. The normal delayering process is simply carried out by soaking the sample in the HF solution. However, the poly surface is inevitably contaminated by surroundings even though it is already a practice to clean with DI rinse and tape. In this article, TOFSIMS with low energy sputter gun is used to clean the sample surface after the normal delayering process. The residue signals also can be monitored by TOF SIMS during sputtering to confirm the cross contamination is cleared. After that, a much lower background desirable by dynamic SIMS. Thus an accurate depth profile in gate oxide layer can be achieved without the interference from surface.


Author(s):  
Jeffery P. Huynh ◽  
Joseph P. Shannon ◽  
Richard W. Johnson ◽  
Mike Santana ◽  
Thomas Y. Chu ◽  
...  

Abstract Modifications directly to a transistor’s source/drain and polysilicon gate through the backside of a SOI device were made. Contact resistance data was obtained by creating contacts through the buried oxide layer of a manufactured test structure. A ring oscillator circuit was modified and the shift in oscillator frequency was measured. Finally, cross section images of the FIB created contacts were presented in the paper to illustrate the entire process.


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