Compositional Characterization of an O-N-O Layer in a Dram Using FE-TEM and EDS Elemental Mapping

1998 ◽  
Vol 4 (S2) ◽  
pp. 146-147
Author(s):  
M. Kawasaki ◽  
T. Oikawa ◽  
K. Ibe ◽  
K. H. Park ◽  
M. Shiojiri ◽  
...  
Keyword(s):  
Crystalline Silicon ◽  
Single Crystal Silicon ◽  
Elemental Distribution ◽  
Bright Field Image ◽  
Elemental Mapping ◽  
Ion Milling ◽  
Crystal Silicon ◽  
Nominal Structure ◽  
High Resolution Tem ◽  
Milling Method

An O-N-O layer within a DRAM is designed to be an insulator between a single-crystal silicon substrate and a poly-crystalline silicon gate. The nominal structure of the layer is SiO2-Si3N4-SiO2. A small amount of phosphorus is doped in the poly-crystalline silicon gate to improve the electrical characteristics of the device. Transmission Electron Microscopy (TEM) was first used to view the micro structure in the layer. A bright field image gave clear contrast in the O-N-O layer, however, TEM images do not provide direct information about the elemental distribution. In this study X-ray elemental mapping was thus used to show this distribution.The specimen was cut from a 16M-DRAM device and thinned using the cross-section ion milling method. The O-N-O layer was examined using a JEM-201 OF FE-(S)TEM equipped with a JEOL UTW-EDS detector. Fig. 1 shows a high resolution TEM image of the O-N-O layer.

Compositional Characterization of an O-N-O Layer in a Dram Using FE-(S)TEM And EELS

1998 ◽  
Vol 4 (S2) ◽  
pp. 150-151
Author(s):  
M. Kawasaki ◽  
T. Oikawa ◽  
K. Ibe ◽  
K. H. Park ◽  
M. Shiojiri ◽  
...  
Keyword(s):  
Crystalline Silicon ◽  
Single Crystal Silicon ◽  
Dark Field ◽  
Elemental Distribution ◽  
Ion Milling ◽  
Crystal Silicon ◽  
Imaging Device ◽  
Annular Dark Field ◽  
Milling Method ◽  
Scanning Imaging

An O-N-O layer within a DRAM is designed to be an insulator between a single-crystal silicon substrate and a poly-crystalline silicon gate. The nominal structure of the layer is SiO2-Si3N4-SiO2. It has been reported that oxygen and nitrogen diffuse into each other layer while preserving the three layered structure. In order to measure the elemental distribution quantitatively, EELS was used for Si and light elements O and N in this study.The specimen was cut from a 16M-DRAM device and prepared for TEM observation by the crosssection ion milling method. The O-N-O layer was analyzed using a JEM-201 OF FE-(S)TEM equipped with a scanning imaging device including a High-Angle Annular Dark Field(HAADF) detector which is capable of collecting electrons scattered 50 to 110 mrad, and also a PEELS(GATAN model 676). Fig. 1 shows a HAADF image of the O-N-O layer.

A Novel Method to Observe the Silicide in TEM

2005 ◽  
Author(s):  
Pan Liu
Keyword(s):  
Contact Resistance ◽  
Single Crystal ◽  
Single Crystal Silicon ◽  
Metal Silicide ◽  
Fabrication Technology ◽  
Ion Milling ◽  
Crystal Silicon ◽  
Transmission Electron ◽  
Milling Method ◽  
Novel Method

Abstract In modern IC fabrication technology, metal silicide technology in microelectronics has been a standard process to reduce contact resistance. The thickness of metal silicide is an important parameter in reducing the contact resistance, especially, the 130nm, 90nm, and beyond technology. The traditional method to measure the thickness of silicide, however, has a dilemma as to whether to obtain the clear interface or to get the true thickness. This paper reports a novel method to improve the interface contrast and get a true thickness by changing the substrate single crystal contrast. Polishing and ion milling method were used to get thin transmission electron microscopy samples. In this paper, the substrate scattering probability is changed by tilting the samples. Using the method, a clear interface can be developed between the silicide and substrate single crystal silicon can be obtained without affecting the accuracy of the measured silicide thickness.

Compositional Characterization of an O-N-O Layer in a Dram Using FE-TEM and Energy Filtered Elemental Mapping

1998 ◽  
Vol 4 (S2) ◽  
pp. 148-149
Author(s):  
M. Kawasaki ◽  
T. Oikawa ◽  
K. Ibe ◽  
K. H. Park ◽  
M. Shiojiri ◽  
...  
Keyword(s):  
Relative Concentration ◽  
Single Crystal Silicon ◽  
Background Intensity ◽  
Mapping Technique ◽  
Elemental Distribution ◽  
Ion Milling ◽  
Edge Image ◽  
Crystal Silicon ◽  
Window Method ◽  
Elemental Maps

A dielectric O-N-O multi-layer is formed between a single-crystal silicon substrate and a polycrystalline silicon gate to insulate them. The nominal structure of the layer is SiO2-Si3N4-SiO2. In this study, in order to visualize the elemental distribution, energy filtered mapping technique was used and also the relative concentration was calculated from the intensities of the elemental maps to characterize the structure quantitatively.The specimen was cut from a 16M-DRAM device and made suitable for TEM observation by the cross-section ion milling method. The O-N-O layer was examined using a JEM-2010F FE-TEM equipped with a post column energy filter(GIF 200). Fig. 1 shows energy filtered elemental maps of Si, O and N with an elastic image of the O-N-O layer obtained by the three-window method.As a map is produced after a background intensity extrapolated from two pre-edge images is subtracted from a post-edge image, each pixel of these maps provides energy loss intensity of an element.

HREM observation of dislocations near room temperature fractures in silicon

1988 ◽  
Vol 46 ◽  
pp. 892-893
Author(s):  
M. H. Rhee ◽  
W. A. Coghlan
Keyword(s):  
Cross Section ◽  
Room Temperature ◽  
Single Crystal Silicon ◽  
Dislocation Nucleation ◽  
Back Side ◽  
Ion Milling ◽  
Crystal Silicon ◽  
Flat Surfaces ◽  
Induced Fractures ◽  
Vicker’S Microhardness

Silicon is believed to be an almost perfectly brittle material with cleavage occurring on {111} planes. In such a material at room temperature cleavage is expected to occur prior to any dislocation nucleation. This behavior suggests that cleavage fracture may be used to produce usable flat surfaces. Attempts to show this have failed. Such fractures produced in semiconductor silicon tend to occur on planes of variable orientation resulting in surfaces with a poor surface finish. In order to learn more about the mechanisms involved in fracture of silicon we began a HREM study of hardness indent induced fractures in thin samples of oxidized silicon.Samples of single crystal silicon were oxidized in air for 100 hours at 1000°C. Two pieces of this material were glued together and 500 μm thick cross-section samples were cut from the combined piece. The cross-section samples were indented using a Vicker's microhardness tester to produce cracks. The cracks in the samples were preserved by thinning from the back side using a combination of mechanical grinding and ion milling.

Electrical Properties of Polycrystalline-Silicon Thin Films for VLSI

1986 ◽  
Vol 71 ◽  
Author(s):  
T I Kamins
Keyword(s):  
Electrical Properties ◽  
Integrated Circuits ◽  
Single Crystal ◽  
Grain Boundaries ◽  
Polycrystalline Silicon ◽  
Crystalline Silicon ◽  
Single Crystal Silicon ◽  
Active Regions ◽  
Crystal Silicon ◽  
Polysilicon Film

AbstractThe electrical properties of polycrystalline silicon differ from those of single-crystal silicon because of the effect of grain boundaries. At low and moderate dopant concentrations, dopant segregation to and carrier trapping at grain boundaries reduces the conductivity of polysilicon markedly compared to that of similarly doped single-crystal silicon. Because the properties of moderately doped polysilicon are limited by grain boundaries, modifying the carrier traps at the grain boundaries by introducing hydrogen to saturate dangling bonds improves the conductivity of polysilicon and allows fabrication of moderate-quality transistors with their active regions in the polycrystalline films. Removing the grain boundaries by melting and recrystallization allows fabrication of high-quality transistors. When polysilicon is used as an interconnecting layer in integrated circuits, its limited conductivity can degrade circuit performance. At high dopant concentrations, the active carrier concentration is limited by the solid solubility of the dopant species in crystalline silicon. The current through oxide grown on polysilicon can be markedly higher than that on oxide of similar thickness grown on singlecrystal silicon because the rough surface of a polysilicon film enhances the local electric field in oxide thermally grown on it. Consequently, the structure must be controlled to obtain reproducible conduction through the oxide. The differences in the behavior of polysilicon and single-crystal silicon and the limited electrical conductivity in polysilicon are having a greater impact on integrated circuits as the feature size decreases and the number of devices on a chip increases in the VLSI era.

Micro-Scale Cantilever Testing of Linear Elastic and Elastic-Plastic Materials

2012 ◽  
Vol 525-526 ◽  
pp. 57-60 ◽  
Author(s):  
J.E. Darnbrough ◽  
S. Mahalingam ◽  
Peter E.J. Flewitt
Keyword(s):  
Mechanical Properties ◽  
Single Crystal Silicon ◽  
Ion Milling ◽  
Crystal Silicon ◽  
Micro Scale ◽  
Elastic Plastic ◽  
Linear Elastic ◽  
Dual Beam ◽  
The Individual ◽  
Elastic Plastic Materials

t is increasingly a requirement to be able to determine the mechanical properties of materials: (i) at the micro-scale, (ii) that are in the form of surface coatings and (iii) that have nanoscale microstructures. As a consequence micro-scale testing is an important tool that has been developed to aid the evaluation of the mechanical properties of such materials. In this work cantilever beam specimens (typically 2μm by 2μm by 10μm in size) have been prepared by gallium ion milling and then deformed in-situ within a FEI Helios Dual Beam workstation. The latter is achieved using a force probe with a geometry suitable for loading the micro-scale test specimens. Thus force and displacement can be measured together with observing the deformation and fracture of the individual specimens. This paper considers the evaluation of the mechanical properties in particular elastic modulus, yield strength and fracture strength of materials that result in relatively large deflections to the micro-scale cantilever beams. Two materials are considered the first is linear elastic single crystal silicon and the other elastic-plastic nanocrystalline (nc) nickel. The results are discussed with respect to the reproducibility of this method of mechanical testing and the evaluated properties are compared with those derived by alternative procedures.

From the Casimir Limit to Phononic Crystals: 20 Years of Phonon Transport Studies Using Silicon-on-Insulator Technology

2013 ◽  
Vol 135 (6) ◽  
Author(s):  
Amy M. Marconnet ◽  
Mehdi Asheghi ◽  
Kenneth E. Goodson
Keyword(s):  
Room Temperature ◽  
Crystalline Silicon ◽  
Phonon Dispersion ◽  
Single Crystal Silicon ◽  
Phonon Transport ◽  
Silicon On Insulator ◽  
Boundary Scattering ◽  
Porous Films ◽  
Crystal Silicon ◽  
20 Nm

Silicon-on-insulator (SOI) technology has sparked advances in semiconductor and MEMs manufacturing and revolutionized our ability to study phonon transport phenomena by providing single-crystal silicon layers with thickness down to a few tens of nanometers. These nearly perfect crystalline silicon layers are an ideal platform for studying ballistic phonon transport and the coupling of boundary scattering with other mechanisms, including impurities and periodic pores. Early studies showed clear evidence of the size effect on thermal conduction due to phonon boundary scattering in films down to 20 nm thick and provided the first compelling room temperature evidence for the Casimir limit at room temperature. More recent studies on ultrathin films and periodically porous thin films are exploring the possibility of phonon dispersion modifications in confined geometries and porous films.

Investigation of the Promotion Effect of Germane in Low Temperature Uhv-Cvd Silicon

1987 ◽  
Vol 102 ◽  
Author(s):  
Kevin J. Uram ◽  
Bernard S. Meyerson
Keyword(s):  
Low Temperature ◽  
Silicon Germanium ◽  
Crystalline Silicon ◽  
Defect Density ◽  
Single Crystal Silicon ◽  
Gas Mixture ◽  
Crystal Silicon ◽  
Germanium Silicon ◽  
Kinetics Of ◽  
Silicon Germanium Alloys

ABSTRACTHigh quality, low defect density, single crystalline silicon/germanium alloys have been grown on Si(100) substrate wafers in a low temperature UHV-CVD reactor. Using a silane/germane gaseous source, the growth rate of the epitaxial layer increases from 4 angstroms/minute with no germane present to 82 angstroms/minute with 12.7% germane present in the reaction gas mixture at 550C. The germanium/silicon ratio in the deposited alloy is a factor of two greater than the germane/silane ratio in the reaction gas mixture. The kinetics of this effect are studied and correlation to UHV hydrogen thermal desorption from single crystal silicon-germanium alloys are made.

Fabrication of a Single Crystal Silicon Substrate for AM-LCD Using Vertical Etching of (110) Silicon

1995 ◽  
Vol 377 ◽  
Author(s):  
Jun-Bo Yoon ◽  
Ho-Jun Lee ◽  
Chul-Hi Han ◽  
Choong-Ki Kim
Keyword(s):  
Silicon Substrate ◽  
Crystalline Silicon ◽  
Single Crystal Silicon ◽  
Liquid Crystal Displays ◽  
Ring Oscillator ◽  
Si Substrate ◽  
Crystal Silicon ◽  
Active Matrix ◽  
Single Crystal Silicon Substrate ◽  
Matrix Liquid

ABSTRACTIn this paper, feasibility of crystalline silicon (c-Si) substrate for transmissive active matrix liquid crystal displays (AM-LCDs) has been investigated. The transparent pixel areas of AM-LCD were formed by vertical etching of (110) silicon substrate using anisotropie etching property of aqueous KOH. Combining this vertical etching process with the conventional MOSFET fabrication process, the pixel switching devices, peripheral circuits and transparent apertures were successfully integrated on the same c-Si substrate. The pixel NMOS devices exhibit an electron mobility of about 600cm2/V-s, a subthreshold slope of 65mV/decade and ON/OFF current ratio of 9 decades at 5V drain voltage. And the gate delay time is 3.3ns at 10V power voltage, measured from a ring oscillator which has enhancement-load type NMOS inverters having the (W/L) iload- (W/L) driverer of 25μm/15μm - 50μm/10μm.

scholarly journals Механизм диффузии монооксидов углерода и кремния в кристалле кубического карбида кремния

2019 ◽  
Vol 61 (12) ◽  
pp. 2334
Author(s):  
С.А. Кукушкин ◽  
А.В. Осипов
Keyword(s):  
Activation Energy ◽  
Single Crystal ◽  
Crystalline Silicon ◽  
Single Crystal Silicon ◽  
Silicon Monoxide ◽  
Vacancy Mechanism ◽  
Reaction Products ◽  
Crystal Silicon ◽  
Single Crystal Sic ◽  
Co Gas

The basic processes are described occurring in the case of the diffusion of carbon monoxide CO and silicon monoxide SiO through a layer of single-crystal silicon carbide SiC. This problem arises when a single-crystal SiC layer is grown by the method of atom substitution due to the chemical reaction of a crystalline silicon substrate with CO gas. The reaction products are the epitaxial layer of SiC and the gas SiO. It has been shown that CO and SiO molecules decompose in SiC crystals. Oxygen atoms migrate through interstitials in the [110] direction only with an activation energy of 2.6 eV. The migration of Si and C atoms occurs by the vacancy mechanism in the corresponding sublattices with activation energies of 3.6 eV and 3.9 eV, respectively, and also in the [110] direction only.

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