scholarly journals Evaporative electron cooling in asymmetric double barrier semiconductor heterostructures

2019 ◽  
Vol 10 (1) ◽  
Author(s):  
Aymen Yangui ◽  
Marc Bescond ◽  
Tifei Yan ◽  
Naomi Nagai ◽  
Kazuhiko Hirakawa

Abstract Rapid progress in high-speed, densely packed electronic/photonic devices has brought unprecedented benefits to our society. However, this technology trend has in reverse led to a tremendous increase in heat dissipation, which degrades device performance and lifetimes. The scientific and technological challenge henceforth lies in efficient cooling of such high-performance devices. Here, we report on evaporative electron cooling in asymmetric Aluminum Gallium Arsenide/Gallium Arsenide (AlGaAs/GaAs) double barrier heterostructures. Electron temperature, Te, in the quantum well (QW) and that in the electrodes are determined from photoluminescence measurements. At 300 K, Te in the QW is gradually decreased down to 250 K as the bias voltage is increased up to the maximum resonant tunneling condition, whereas Te in the electrode remains unchanged. This behavior is explained in term of the evaporative cooling process and is quantitatively described by the quantum transport theory.

1990 ◽  
Vol 01 (02) ◽  
pp. 153-167
Author(s):  
TZU-YIN CHIU ◽  
PING K. KO

The merits of high speed bipolar and low power VLSI CMOS are combined in BiCMOS technology. Designers are exploiting additional dimensions of flexibility and are implementing aggressive high performance systems not achievable before. Various approaches to BiCMOS integration, spanning from a single mask addition to sophisticated fully self-aligned device structures, are reviewed in this article. The philosophies behind the technology evolution in the last five years are discussed. We have also ventured to extrapolate future BiCMOS technology trend and applications.


MRS Bulletin ◽  
2003 ◽  
Vol 28 (1) ◽  
pp. 21-34 ◽  
Author(s):  
Vasudeva P. Atluri ◽  
Ravi V. Mahajan ◽  
Priyavadan R. Patel ◽  
Debendra Mallik ◽  
John Tang ◽  
...  

AbstractHistorically, the primary function of microprocessor packaging has been to facilitate electrical connectivity of the complex and intricate silicon microprocessor chips to the printed circuit board while providing protection to the chips from the external environment. However, as microprocessor performance continues to follow Moore's law, the package has evolved from a simple protective enclosure to a key enabler of performance. The art and science of semiconductor packaging has advanced radically over the past few decades as faster and more powerful microprocessors with tens of millions of transistors continue to be available, which require more signal and power input/output connections as well as greater power-dissipation capabilities. Key drivers for the development of packaging technologies include power delivery, thermal management, and interconnect scaling, in which the space transformation from fine-featured silicon interconnects to the relatively coarse features seen on motherboards has to be enabled by the package. These drivers, under constant market-driven cost pressure, have led to increased demands on new materials and new package architectures to enable silicon performance. Significant advances have already been made in the areas of heat dissipation, power delivery, high-speed signaling, and high-density interconnects. It is expected that the future evolution of microprocessors will be increasingly challenging in these areas. This article focuses on providing a broad perspective view of the evolution of microprocessor packaging and discusses future challenges.


Author(s):  
Duong Vy Le ◽  
Shiwei Zhang ◽  
Jonggyu Lee ◽  
Yoonjin Won

Thermal management has become more important as high-performance electronics have concentrated heat loads with current cooling technologies. This motivates the implementation of new cooling solutions to dissipate high heat levels from high-performance electronics. Evaporative cooling is one of the most promising approaches for meeting these future thermal demands. Thin-film evaporation promotes heat dissipation through the phase change process with minimal conduction resistance. In this process, it is important to design surface properties and structures that can minimize meniscus thickness, increase liquid-vapor interface area, and enhance evaporation performances. In this study, we thereby investigate thin-film evaporation by employing nanotextured copper substrates for varying thermal conditions. Specifically, we visualize the liquid spreading on the nanotextured surfaces using a high-speed imaging technique to quantify evaporative heat transfer for various designs. The permeability is calculated using an enhanced wicking model to account for the evaporation effect. The mass balance measurements allow us to calculate evaporation rates. Then, we employ infrared thermography to examine two-dimensional temporal temperature profiles of the samples during the evaporative wicking with a given heat flux. The combination of time-lapse images, evaporation rate measurements, and temperature profiles will provide a comprehensive understanding of evaporation performances of textured surfaces.


2019 ◽  
Vol 141 (3) ◽  
Author(s):  
Duong Vy Le ◽  
Quang N. Pham ◽  
Jonggyu Lee ◽  
Shiwei Zhang ◽  
Yoonjin Won

AbstractAs modern electronics become miniaturized with high power, thermal management for electronics devices has become significant. This motivates the implementation of new cooling solutions to dissipate high-heat levels from high-performance electronics. Evaporative cooling is one of the most promising approaches for meeting these future thermal demands. Thin-film evaporation promotes heat dissipation through the phase change process with minimal conduction resistance. In this process, it is important to design surface structures and corresponding surface properties that can minimize meniscus thickness, increase liquid–vapor interfacial area, and enhance evaporation performances. In this study, we investigate thin-film evaporation by employing nanotextured copper substrates for varying thermal conditions. The liquid spreading on the nanotextured surfaces is visualized using a high-speed imaging technique to quantify evaporative heat transfer for various surfaces. The permeability is calculated using an enhanced wicking model to estimate the evaporation effect combined with the mass measurements. Then, infrared (IR) thermography is employed to examine two-dimensional temporal temperature profiles of the samples during the evaporative wicking with a given heat flux. The combination of optical time-lapse images, evaporation rate measurements, and temperature profiles will provide a comprehensive understanding of evaporation performances using textured surfaces.


Author(s):  
Aravind Sridhar ◽  
Sarah Styslinger ◽  
Christopher Duron ◽  
Sushil H. Bhavnani ◽  
Roy W. Knight ◽  
...  

An alternative to air-cooling of high performance computing equipment is presented. Heat removal via pool boiling in FC-72 was tested. Tests were conducted on a multichip module using 1.8 cm × 1.8 cm test die with multiple thermal test cells with temperature sensing capability. Measurements with the bare silicon die in direct contact with the fluid are reported. Additional testing included the test die directly indium-attached to copper heat spreaders having surface treatments. A screen-printed sintered boiling-enhanced surface (4 cm × 4 cm) was evaluated. Tests were conducted on an array of five die. Parameters tested include heat flux levels, dielectric liquid pool conditions (saturated or subcooled), and effect of neighboring die. Information was gathered on surface temperatures for a range of heat flux values up to 12 W/cm2. The highest heat dissipated from a circuit board with five bare die was 195 W (39 W per die). Addition of the heat spreader allowed heat dissipation of up to 740 W (from a five-die array). High-speed imaging was also acquired to help examine detailed information on the boiling process. Numerical modeling indicated that placing multiple boards in close proximity to each other did not degrade performance until board spacing was reduced to 3 mm.


Author(s):  
N. Yoshimura ◽  
K. Shirota ◽  
T. Etoh

One of the most important requirements for a high-performance EM, especially an analytical EM using a fine beam probe, is to prevent specimen contamination by providing a clean high vacuum in the vicinity of the specimen. However, in almost all commercial EMs, the pressure in the vicinity of the specimen under observation is usually more than ten times higher than the pressure measured at the punping line. The EM column inevitably requires the use of greased Viton O-rings for fine movement, and specimens and films need to be exchanged frequently and several attachments may also be exchanged. For these reasons, a high speed pumping system, as well as a clean vacuum system, is now required. A newly developed electron microscope, the JEM-100CX features clean high vacuum in the vicinity of the specimen, realized by the use of a CASCADE type diffusion pump system which has been essentially improved over its predeces- sorD employed on the JEM-100C.


Author(s):  
Marc H. Peeters ◽  
Max T. Otten

Over the past decades, the combination of energy-dispersive analysis of X-rays and scanning electron microscopy has proved to be a powerful tool for fast and reliable elemental characterization of a large variety of specimens. The technique has evolved rapidly from a purely qualitative characterization method to a reliable quantitative way of analysis. In the last 5 years, an increasing need for automation is observed, whereby energy-dispersive analysers control the beam and stage movement of the scanning electron microscope in order to collect digital X-ray images and perform unattended point analysis over multiple locations.The Philips High-speed Analysis of X-rays system (PHAX-Scan) makes use of the high performance dual-processor structure of the EDAX PV9900 analyser and the databus structure of the Philips series 500 scanning electron microscope to provide a highly automated, user-friendly and extremely fast microanalysis system. The software that runs on the hardware described above was specifically designed to provide the ultimate attainable speed on the system.


Author(s):  
M. T. Postek ◽  
A. E. Vladar

One of the major advancements applied to scanning electron microscopy (SEM) during the past 10 years has been the development and application of digital imaging technology. Advancements in technology, notably the availability of less expensive, high-density memory chips and the development of high speed analog-to-digital converters, mass storage and high performance central processing units have fostered this revolution. Today, most modern SEM instruments have digital electronics as a standard feature. These instruments, generally have 8 bit or 256 gray levels with, at least, 512 × 512 pixel density operating at TV rate. In addition, current slow-scan commercial frame-grabber cards, directly applicable to the SEM, can have upwards of 12-14 bit lateral resolution permitting image acquisition at 4096 × 4096 resolution or greater. The two major categories of SEM systems to which digital technology have been applied are:In the analog SEM system the scan generator is normally operated in an analog manner and the image is displayed in an analog or "slow scan" mode.


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