Transition mechanisms of two interactingDXcenters inN‐type AlGaAs using reverse‐bias deep level transient spectroscopy and temperature‐dependent pulse‐width reverse‐bias deep level transient spectroscopy methods

1993 ◽  
Vol 74 (6) ◽  
pp. 3921-3926
Author(s):  
C. W. Wang ◽  
C. H. Wu
2006 ◽  
Vol 957 ◽  
Author(s):  
Yahya Alivov ◽  
Xiao Bo ◽  
Fan Qian ◽  
Daniel Johnstone ◽  
Cole Litton ◽  
...  

ABSTRACTThe conduction band offset of n-ZnO/n-6H-SiC heterostructures fabricated by rf-sputtered ZnO on commercial n-type 6H-SiC substrates has been measured. Temperature dependent current-voltage characteristics, photocapacitance, and deep level transient spectroscopy measurements showed the conduction band offsets to be 1.25 eV, 1.1 eV, and 1.22 eV, respectively.


2010 ◽  
Vol 645-648 ◽  
pp. 499-502 ◽  
Author(s):  
Alberto F. Basile ◽  
John Rozen ◽  
X.D. Chen ◽  
Sarit Dhar ◽  
John R. Williams ◽  
...  

The electrical properties of the SiC/SiO2 interface resulting from oxidation of the n-type 6H-SiC polytype were studied by hi-lo CV, temperature dependent CV and constant capacitance deep level transient spectroscopy (CCDLTS) techniques. Several trap species differing in energy and capture cross section were identified. A trap distribution at 0.5 eV below the 6H-SiC conduction band energy and a shallower density of states in both the 6H and 4H polytyes are passivated by post-oxidation NO annealing. However, other ultra-shallow and deeper defect distributions remain after nitridation. The latter may originate from semiconductor traps.


2004 ◽  
Vol 815 ◽  
Author(s):  
X. D. Chen ◽  
C. C. Ling ◽  
S. Fung ◽  
C. D. Beling ◽  
H. S. Wu ◽  
...  

AbstractDeep level transient spectroscopy (DLTS) was used to study deep level defects in He-implanted n-type 6H-SiC samples. Low dose He-implantation (fluence ∼2×1011 ions/cm2) has been employed to keep the as-implanted sample conductive so that studying the introduction and the thermal evolution of the defects becomes feasible. A strong broad DLTS peak at 275K-375K (called signal B) and another deep level at EC-0.50eV were observed in the as-implanted sample. The intensity of the peak B was observed to linearly proportional to the logarithm of the filling pulse width, which is a signature for electron capture into a defect related to dislocation. After annealing at 500°C, the intensity of peak was significantly reduced and the remained signal has properties identical to the well known Z1/Z2 deep defects, although it is uncertain whether the Z1/Z2 exist in the as-implanted sample or it is the annealing product of the dislocation-related defect. The E1/E2 defect (EC-0.3/0.4eV) was not presence in the as-implanted sample, but was observed after the 300°C annealing.


2012 ◽  
Vol 717-720 ◽  
pp. 757-760 ◽  
Author(s):  
Alberto F. Basile ◽  
A.C. Ahyi ◽  
L.C. Feldman ◽  
J.R. Williams ◽  
P.M. Mooney

The electrical properties of the SiO2/SiC interface fabricated by sodium-enhanced oxidation (SEO) of n-type 4H-SiC were studied by temperature-dependent C-V and constant-capacitance deep level transient spectroscopy (CCDLTS). With the exception of near-interface traps in the SiC epi-layer, which are not present in the SEO samples, the trap species observed in SEO capacitors are the same as those observed in both standard-oxidized and NO-annealed MOS capacitors. Total electron trapping in accumulation is comparable in SEO and NO-annealed capacitors; however, the traps in SEO capacitors are located at the interface whereas tunneling into oxide traps is observed in NO-annealed samples. A series of bias-temperature stress tests show that electron trapping is essentially unchanged when mobile sodium ions are moved toward the interface. The improved mobility attained by this process compared to NO annealing may be due to the absence of near-interface SiC traps in SEO samples.


2009 ◽  
Vol 64 (9-10) ◽  
pp. 658-664
Author(s):  
Verena Mertens ◽  
Rolf Reineke-Koch ◽  
Jürgen Parisi

Copper chalcopyrite based solar cells with different molar gallium to gallium plus indium ratio (GGI) are looked at, using deep level transient spectroscopy (DLTS) and admittance spectroscopy (AS). Depending on the respective measurement parameters, like reverse bias level, height and length of the voltage pulse applied, either a minority carrier or/and a majority carrier deep level signal is/are detected in the temperature range below 200 K. The AS investigations reveal only one trap signal. After a detailed description of the defect properties taking advantage of the two diode model, we discuss the origin of these trap signals in view of our experimental findings


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