Electron Trapping in 4H-SiC MOS Capacitors Fabricated by Sodium-Enhanced Oxidation

2012 ◽  
Vol 717-720 ◽  
pp. 757-760 ◽  
Author(s):  
Alberto F. Basile ◽  
A.C. Ahyi ◽  
L.C. Feldman ◽  
J.R. Williams ◽  
P.M. Mooney
Keyword(s):  
Deep Level Transient Spectroscopy ◽  
Deep Level ◽  
Electron Trapping ◽  
Stress Tests ◽  
Temperature Dependent ◽  
Mos Capacitors ◽  
Total Electron ◽  
Enhanced Oxidation ◽  
Transient Spectroscopy ◽  
Bias Temperature Stress

The electrical properties of the SiO2/SiC interface fabricated by sodium-enhanced oxidation (SEO) of n-type 4H-SiC were studied by temperature-dependent C-V and constant-capacitance deep level transient spectroscopy (CCDLTS). With the exception of near-interface traps in the SiC epi-layer, which are not present in the SEO samples, the trap species observed in SEO capacitors are the same as those observed in both standard-oxidized and NO-annealed MOS capacitors. Total electron trapping in accumulation is comparable in SEO and NO-annealed capacitors; however, the traps in SEO capacitors are located at the interface whereas tunneling into oxide traps is observed in NO-annealed samples. A series of bias-temperature stress tests show that electron trapping is essentially unchanged when mobile sodium ions are moved toward the interface. The improved mobility attained by this process compared to NO annealing may be due to the absence of near-interface SiC traps in SEO samples.

Improved SiO2/ 4H-SiC Interface Defect Density Using Forming Gas Annealing

2019 ◽  
Vol 963 ◽  
pp. 465-468
Author(s):  
Stephan Wirths ◽  
Giovanni Alfieri ◽  
Alyssa Prasmusinto ◽  
Andrei Mihaila ◽  
Lukas Kranz ◽  
...  
Keyword(s):  
Defect Density ◽  
Deep Level ◽  
Flat Band ◽  
Temperature Dependent ◽  
Mos Capacitors ◽  
Interface Defect ◽  
Before And After ◽  
Oxide Deposition ◽  
Transient Spectroscopy ◽  
Post Deposition

We investigated the influence of forming gas annealing (FGA) before and after oxide deposition on the SiO2/4H-SiC interface defect density (Dit). For MOS capacitors (MOSCAPs) that were processed using FGAs at temperatures above 1050°C, CV characterization revealed decreased flat band voltage shifts and stretch-out for different sweep directions and frequencies. Moreover, constant-capacitance deep level transient spectroscopy (CC-DLTS) was performed and showed Dit levels below 1012 cm-2eV-1 for post deposition FGA at 1200°C. Finally, lateral MOSFETs were fabricated to analyze the temperature-dependent threshold voltage (Vth) shift.

Transport Properties and Conduction Band Offset of n-ZnO/n-6H-SiC Heterostructures

2006 ◽  
Vol 957 ◽  
Author(s):  
Yahya Alivov ◽  
Xiao Bo ◽  
Fan Qian ◽  
Daniel Johnstone ◽  
Cole Litton ◽  
...  
Keyword(s):  
Conduction Band ◽  
Deep Level Transient Spectroscopy ◽  
Deep Level ◽  
Band Offset ◽  
Measured Temperature ◽  
Temperature Dependent ◽  
Conduction Band Offset ◽  
Current Voltage ◽  
Current Voltage Characteristics ◽  
Transient Spectroscopy

ABSTRACTThe conduction band offset of n-ZnO/n-6H-SiC heterostructures fabricated by rf-sputtered ZnO on commercial n-type 6H-SiC substrates has been measured. Temperature dependent current-voltage characteristics, photocapacitance, and deep level transient spectroscopy measurements showed the conduction band offsets to be 1.25 eV, 1.1 eV, and 1.22 eV, respectively.

Effect of NO Annealing on 6H- and 4H-SiC MOS Interface States

2010 ◽  
Vol 645-648 ◽  
pp. 499-502 ◽  
Author(s):  
Alberto F. Basile ◽  
John Rozen ◽  
X.D. Chen ◽  
Sarit Dhar ◽  
John R. Williams ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Cross Section ◽  
Deep Level Transient Spectroscopy ◽  
Capture Cross Section ◽  
Deep Level ◽  
Capture Cross ◽  
Temperature Dependent ◽  
Band Energy ◽  
Transient Spectroscopy ◽  
Semiconductor Traps

The electrical properties of the SiC/SiO2 interface resulting from oxidation of the n-type 6H-SiC polytype were studied by hi-lo CV, temperature dependent CV and constant capacitance deep level transient spectroscopy (CCDLTS) techniques. Several trap species differing in energy and capture cross section were identified. A trap distribution at 0.5 eV below the 6H-SiC conduction band energy and a shallower density of states in both the 6H and 4H polytyes are passivated by post-oxidation NO annealing. However, other ultra-shallow and deeper defect distributions remain after nitridation. The latter may originate from semiconductor traps.

Near-interface Traps in n-type SiO2/SiC MOS Capacitors from Energy-resolved CCDLTS

2010 ◽  
Vol 1246 ◽  
Author(s):  
Alberto F Basile ◽  
Sarit Dhar ◽  
John Rozen ◽  
Xudong Chen ◽  
John Williams ◽  
...  
Keyword(s):  
Silicon Dioxide ◽  
Electron Emission ◽  
Deep Level Transient Spectroscopy ◽  
Deep Level ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Interface Traps ◽  
Emission Rates ◽  
Mos Capacitors ◽  
Transient Spectroscopy

AbstractSilicon Carbide (SiC) Metal-Oxide-Semiconductor (MOS) capacitors, having different nitridation times, were characterized by means of Constant Capacitance Deep Level Transient Spectroscopy (CCDLTS). Electron emission was investigated with respect to the temperature dependence of emission rates and the amplitude of the signal as a function of the filling voltage. The comparison between the emission activation energies of the dominant CCDLTS peaks and the filling voltages, led to the conclusion that the dominant trapping behavior originates in the Silicon-dioxide (SiO2) layer. Moreover, a model of electron capture via tunneling can explain the dependence of the CCDLTS signal on increasing filling voltage.

Deep Traps in 4H-SiC MOS Capacitors Investigated by Deep Level Transient Spectroscopy

2014 ◽  
Vol 778-780 ◽  
pp. 603-606 ◽  
Author(s):  
Einar Ö. Sveinbjörnsson ◽  
Olafur Gíslason
Keyword(s):  
Thermal Oxidation ◽  
Conduction Band ◽  
High Temperatures ◽  
Deep Level Transient Spectroscopy ◽  
Deep Level ◽  
Conduction Band Edge ◽  
Mos Capacitors ◽  
Deep Traps ◽  
Transient Spectroscopy ◽  
Very High

Using Deep Level Transient Spectroscopy (DLTS) on n-type MOS capacitors we find that thermal oxidation of 4H-SiC produces deep traps at or near the SiO2/SiC interface with two well defined DLTS peaks. The traps are located ~ 0.85 V and ~ 1.0 eV below the SiC conduction band edge and are present in wet and dry oxides as well as oxides produced by sodium enhanced oxidation and oxides grown in N2O. The deep traps are located at the SiO/SiC interface after oxidation at 1150°C but do extend further into the SiC epilayer after oxidation at 1240°C. We identify these traps as ON1 and ON2 which been observed in epitaxial layers after oxidation at very high temperatures (1200-1500°C) [.

A Study of Deep Energy-Level Traps at the 4H-SiC/SiO2 Interface and Their Passivation by Hydrogen

2008 ◽  
Vol 600-603 ◽  
pp. 755-758 ◽  
Author(s):  
Fredrik Allerstam ◽  
Einar Ö. Sveinbjörnsson
Keyword(s):  
Energy Level ◽  
Conduction Band ◽  
Deep Level Transient Spectroscopy ◽  
Deep Level ◽  
Band Edge ◽  
Conduction Band Edge ◽  
Interface Traps ◽  
Enhanced Oxidation ◽  
Transient Spectroscopy

This study is focused on characterization of deep energy-level interface traps formed during sodium enhanced oxidation of n-type Si face 4H-SiC. The traps are located 0.9 eV below the SiC conduction band edge as revealed by deep level transient spectroscopy. Furthermore these traps are passivated using post-metallization anneal at 400°C in forming gas ambient.

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