Transient thermal management of portable electronics using heat storage and dynamic power dissipation control

Author(s):  
Lipeng Cao ◽  
J.P. Krusius ◽  
M.A. Korhonen ◽  
T.S. Fisher
Energies ◽  
2021 ◽  
Vol 14 (11) ◽  
pp. 3006
Author(s):  
Serge Nyallang Nyamsi ◽  
Ivan Tolj

Two-tank metal hydride pairs have gained tremendous interest in thermal energy storage systems for concentrating solar power plants or industrial waste heat recovery. Generally, the system’s performance depends on selecting and matching the metal hydride pairs and the thermal management adopted. In this study, the 2D mathematical modeling used to investigate the heat storage system’s performance under different thermal management techniques, including active and passive heat transfer techniques, is analyzed and discussed in detail. The change in the energy storage density, the specific power output, and the energy storage efficiency is studied under different heat transfer measures applied to the two tanks. The results showed that there is a trade-off between the energy storage density and the energy storage efficiency. The adoption of active heat transfer enhancement (convective heat transfer enhancement) leads to a high energy storage density of 670 MJ m−3 (close to the maximum theoretical value of 755.3 MJ m−3). In contrast, the energy storage efficiency decreases dramatically due to the increase in the pumping power. On the other hand, passive heat transfer techniques using the bed’s thermal conductivity enhancers provide a balance between the energy storage density (578 MJ m−3) and the energy efficiency (74%). The utilization of phase change material as an internal heat recovery medium leads to a further reduction in the heat storage performance indicators (142 MJ m−3 and 49%). Nevertheless, such a system combining thermochemical and latent heat storage, if properly optimized, can be promising for thermal energy storage applications.


1991 ◽  
Vol 113 (3) ◽  
pp. 258-262 ◽  
Author(s):  
J. G. Stack ◽  
M. S. Acarlar

The reliability and life of an Optical Data Link transmitter are inversely related to the temperature of the LED. It is therefore critical to have efficient packaging from the point of view of thermal management. For the ODL® 200H devices, it is also necessary to ensure that all package seals remain hermetic throughout the stringent military temperature range requirements of −65 to +150°C. For these devices, finite element analysis was used to study both the thermal paths due to LED power dissipation and the thermally induced stresses in the hermetic joints due to ambient temperature changes


Author(s):  
Yu Hsien Wu ◽  
Kumar Srinivasan ◽  
Steven Patterson ◽  
Emmanuel Bot

The transient thermal simulation is an important part of thermal management development for new vehicle architectures. Different techniques have been studied in the past to address this coupled conduction/convection/radiation problem. In order to fully capture the transient thermal behavior of various underhood and underbody components, it is also necessary to accurately model the thermal mass of each part and the thermal links between dissimilar materials. The paper will outline a new, efficient methodology for this type of thermal analysis that shows acceptable results for complex full vehicle thermal analysis without sacrificing accuracy. The methodology is based on approximating the transient convective field with intermittent steady state solutions. The paper will present results from this new approach and compare them with fully transient simulation results as well as experimental data. The new methodology can be optimized to significantly reduce simulation run times without sacrificing accuracy and to be more practical for application in the vehicle development cycle.


VLSI Design ◽  
2002 ◽  
Vol 15 (2) ◽  
pp. 547-553
Author(s):  
S. M. Rezaul Hasan ◽  
Yufridin Wahab

This paper explores the deterministic transistor reordering in low-voltage dynamic BiCMOS logic gates, for reducing the dynamic power dissipation. The constraints of load driving (discharging) capability and NPN turn-on delay for MOSFET reordered structures has been carefully considered. Simulations shows significant reduction in the dynamic power dissipation for the transistor reordered BiCMOS structures. The power-delay product figure-of-merit is found to be significantly enhanced without any associated silicon-area penalty. In order to experimentally verify the reduction in power dissipation, original and reordered structures were fabricated using the MOSIS 2 μm N-well analog CMOS process which has a P-base layer for bipolar NPN option. Measured results shows a 20% reduction in the power dissipation for the transistor reordered structure, which is in close agreement with the simulation.


2017 ◽  
Vol 21 (1) ◽  
pp. 3
Author(s):  
Burhan Khurshid

Generalized Parallel Counters (GPCs) are frequently used in constructing high speed compressor trees. Previous work has focused on achieving efficient mapping of GPCs on FPGAs by using a combination of general Look-up table (LUT) fabric and specialized fast carry chains. The  resulting structures are purely combinational and cannot be efficiently pipelined to achieve the potential FPGA performance. In this paper, we take an alternate approach and try to eliminate the fast carry chain from the GPC structure. We present a heuristic that maps GPCs on FPGAS using only general LUT fabric. The resultant GPCs are then easily re-timed by placing registers at the fan-out nodes of each LUT. We have used our heuristic on various GPCs reported in prior work. Our heuristic successfully eliminates the carry chain from the GPC structure with the same LUT count in most of the cases. Experimental results using Xilinx Kintex-7 FPGAs show a considerable reduction in critical path and dynamic power dissipation with same area utilization in most of the cases.


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