A new method for improving breakdown voltage in PSOI MOSFETs using variable drift region doping concentration

Author(s):  
S. E. Jamali Mahabadi ◽  
Ali A. Orouji ◽  
Hamid Amini Moghadam ◽  
Parviz Keshavarzi
2009 ◽  
Vol 615-617 ◽  
pp. 655-658 ◽  
Author(s):  
Chiharu Ota ◽  
Johji Nishio ◽  
Kazuto Takao ◽  
Tetsuo Hatakeyama ◽  
Takashi Shinohe ◽  
...  

Previous simulation works and experiments on the loss of 4H-SiC floating junction Schottky barrier diodes (Super-SBDs) show that the loss is related to the doping concentration in the drift region and the pattern of the floating layer. The effect of the doping concentration for lowering the loss is characterized the breakdown voltage (Vbd) and the on-state resistances (RonS) of the Super-SBDs based on Baliga’s figure of Merit (BFOM). Experimental devices with two doping concentrations in the drift region are fabricated to investigate the static characteristics: Vbd and RonS. The Vbd of the Super-SBDs is close to the simulation result, near 3000 V. However the tendency of the Vbd by the doping concentration is not similar to the simulation result. And the RonS are about 3.22 mcm2 which is higher than that of simulation result. The doping concentration optimized in this study does not show significant lowering loss and the design of the floating layer in the termination region affect the low-loss static characteristics of the Super-SBD. In addition, adopting PiN structure with floating layer (Super-PiN) affects the low-loss dynamic characteristics, optimizing the doping concentration in the drift region. We conclude that the fabricated Super-SBDs with the floating layer in the termination region, the drift region with a doping concentration of 1.01016 cm-3 and mesa-shaped termination structure, have excellent Vbd of 2990 V which is almost same as that of simulation result and RonS of 3.22 mcm2.


2021 ◽  
Author(s):  
Lijuan Wu ◽  
Haifeng Wu ◽  
Jinsheng Zeng ◽  
Xing Chen ◽  
Shaolian Su

Abstract A stepped split triple-gate SOI LDMOS with P/N strip (P/N SSTG SOI LDMOS) is proposed, which has ultralow specific on-resistance (Ron,sp) and low switching losses. The proposed device has a triple-gate (TG) and stepped split gates (SSGs). P strip, N-drift and oxide trench are alternately arranged in the Z direction. Meanwhile, the SSGs are located in the oxide trench of the N-drift region and are distributed in steps. Firstly, the TG increases the channel width (Wch) and has the effect of modulating current distribution, resulting in lower Ron,sp and higher transconductance (gm). Secondly, the SSGs serve as the field plate to assist the depletion of the N-drift region, increasing the optimal doping concentration of the N-drift region (Nd-opt) and further reducing the Ron,sp. Moreover, the SSGs also have the effect of modulating the electric field distribution to maintain a high breakdown voltage (BV). Meanwhile, gate-drain charge (QGD) and switching losses are reduced on account of the introduction of the SSGs. Thirdly, in the off-state, the P strip and SSGs multidimensional assisted depletion of the N-drift region, which greatly increases the Nd-opt. The highly doped N-drift region provides a low-resistance path for the current, which also further reduces Ron,sp. Compared with triple-gate (TG) SOI LDMOS with almost equal breakdown voltage, the Ron,sp and QGD of P/N SSTG SOI LDMOS are reduced by 62% and 63%, respectively.


Electronics ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 332
Author(s):  
Hojun Lee ◽  
Ogyun Seok ◽  
Taeeun Kim ◽  
Min-Woo Ha

High-power switching applications, such as thyristor valves in a high-voltage direct current converter, can use 4H-SiC. The numerical simulation of the 4H-SiC devices requires specialized models and parameters. Here, we present a numerical simulation of the 4H-SiC thyristor on an N+ substrate gate current during the turn-on process. The base-emitter current of the PNP bipolar junction transistor (BJT) flow by adjusting the gate potential. This current eventually activated a regenerative action of the thyristor. The increase of the gate current from P+ anode to N+ gate also decreased the snapback voltage and forward voltage drop (Vf). When the doping concentration of the P-drift region increased, Vf decreased due to the reduced resistance of a low P-drift doping. An increase in the P buffer doping concentration increased Vf owing to enhanced recombination at the base of the NPN BJT. There is a tradeoff between the breakdown voltage and forward characteristics. The breakdown voltage is increased with a decrease in concentration, and an increase in drift layer thickness occurs due to the extended depletion region and reduced peak electric field.


2002 ◽  
Vol 742 ◽  
Author(s):  
T. Kimoto ◽  
K. Hashimoto ◽  
K. Fujihira ◽  
K. Danno ◽  
S. Nakamura ◽  
...  

ABSTRACTHomoepitaxial growth, impurity doping, and diode fabrication on 4H-SiC(11–20) and (03–38) have been investigated. Although the efficiency of nitrogen incorporation is higher on the non-standard faces than on (0001), a low background doping concentration of 2∼3×1014 cm-3 can be achieved. On these faces, boron and aluminum are less effectively incorporated, compared to the growth on off-axis (0001). 4H-SiC(11–20) epilayers are micropipe-free, as expected. More interestingly, almost perfect micropipe closing has been realized in 4H-SiC (03–38) epitaxial growth. Ni/4H-SiC(11–20) and (03–38) Schottky barrier diodes showed promising characteritics of 3.36 kV-24 mΩcm2 and 3.28 kV–22 mΩcm2, respectively. The breakdown voltage of 4H-SiC(03–38) Schottky barrier diodes was significantly improved from 1 kV to above 2.5 kV by micropipe closing.


2014 ◽  
Vol 778-780 ◽  
pp. 915-918 ◽  
Author(s):  
Keiji Wada ◽  
Kosuke Uchida ◽  
Ren Kimura ◽  
Mitsuhiko Sakai ◽  
Satoshi Hatsukawa ◽  
...  

Blocking characteristics of 2.2 kV and 3.3 kV -class 4H-SiC MOSFETs with various doping conditions for the edge termination region have been investigated. By optimizing the implanted dose into the edge termination structure consisting of junction termination extension (JTE) and field limiting ring (FLR), a breakdown voltage of 3,850 V for 3.3 kV -class MOSFET has been attained. This result corresponds to about 95% of the approximate parallel-plane breakdown voltage estimated from the doping concentration and the thickness of the epitaxial layer. Implanted doping for the JFET region is effective in reducing JFET resistance, resulting in the specific on-resistance of 14.2 mΩcm2 for 3.3 kV SiC MOSFETs. Switching characteristics at the high drain voltage of 2.0 kV are also discussed.


1998 ◽  
Vol 512 ◽  
Author(s):  
B. Jayant Baliga

ABSTRACTProgress made in the development of high performance power rectifiers and switches from silicon carbide are reviewed with emphasis on approaching the 100-fold reduction in the specific on-resistance of the drift region when compared with silicon devices with the same breakdown voltage. The highlights are: (a) Recently completed measurements of impact ionization coefficients in SiC indicate an even higher Baliga's figure of merit than projected earlier. (b) The commonly reported negative temperature co-efficient for breakdown voltage in SiC devices has been shown to arise at defects, allaying concerns that this may be intrinsic to the material. (c) Based upon fundamental considerations, it has been found that Schottky rectifiers offer superior on-state voltage drop than P-i-N rectifiers for reverse blocking voltages below 3000 volts. (d) Nearly ideal breakdown voltage has been experimentally obtained for Schottky diodes using an argon implanted edge termination. (e) Planar ion-implanted junctions have been successfully fabricated using oxide as a mask with high breakdown voltage and low leakage currents by using a filed plate edge termination. (f) High inversion layer mobility has been experimentally demonstrated on both 6H and 4H-SiC by using a deposited oxide layer as gate dielectric. (g) A novel, high-voltage, normally-off, accumulation-channel, MOSFET has been proposed and demonstrated with 50x lower specific on-resistance than silicon devices in spite of using logic-level gate drive voltages. These results indicate that SiC based power devices could become commercially viable in the 21st century if cost barriers can be overcome.


Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1469 ◽  
Author(s):  
Po-Lin Lin ◽  
Shen-Li Chen ◽  
Sheng-Kai Fan

Electrostatic discharge (ESD) events are the main factors impacting the reliability of Integrated circuits (ICs); therefore, the ESD immunity level of these ICs is an important index. This paper focuses on comprehensive drift-region engineering for ultra-high-voltage (UHV) circular n-channel lateral diffusion metal-oxide-semiconductor transistor (nLDMOS) devices used to investigate impacts on ESD ability. Under the condition of fixed layout area, there are four kinds of modulation in the drift region. First, by floating a polysilicon stripe above the drift region, the breakdown voltage and secondary breakdown current of this modulation can be increased. Second, adjusting the width of the field-oxide layer in the drift region when the width of the field-oxide layer is 5.8 μm will result in the minimum breakdown voltage (105 V) but the best secondary breakdown current (6.84 A). Third, by adjusting the discrete unit cell and its spacing, the corresponding improved trigger voltage, holding voltage, and secondary breakdown current can be obtained. According to the experimental results, the holding voltage of all devices under test (DUTs) is greater than that of the reference group, so the discrete HV N-Well (HVNW) layer can effectively improve its latch-up immunity. Finally, by embedding different P-Well lengths, the findings suggest that when the embedded P-Well length is 9 μm, it will have the highest ESD ability and latch-up immunity.


2012 ◽  
Vol 239-240 ◽  
pp. 726-729
Author(s):  
Qiao Liang Wang ◽  
Yu Zhao ◽  
Rui Feng Lv ◽  
Yan Yan Zhu

In semiconductor industry, carrier concentration of a semiconductor material needs to be measured. Theoretical computation is complex and has its limitation. Experiment measurement always needs complicated and expensive instruments. Here, a new method for measuring the carrier concentration of silicon wafer was put forward. The dependen curve of thermoelectromotive force on temperature was graphed. The results showed that when temperature is below 460K, thermoelectromotive force is proportional to temperature of the hot probe. With the help of Origin software, slope of curve was obtained.Accoeding to related formula,the doping concentartion and it’s uniformity were figured out finally .Compared with other similar methods, this method is more simplified and thet equipment is cheaper.


2013 ◽  
Vol 347-350 ◽  
pp. 1506-1509 ◽  
Author(s):  
Yong Hong Tao ◽  
Run Hua Huang ◽  
Gang Chen ◽  
Song Bai ◽  
Yun Li

High voltage 4H-SiC junction barrier schottky (JBS) diode with breakdown voltage higher than 4.5 kV has been fabricated. The doping level and thickness of the N-type drift layer and the device structure have been performed by numerical simulations. The thickness of the device epilayer is 50 μm, and the doping concentration is 1.2×1015 cm3. A floating guard rings edge termination has been used to improve the effectiveness of the edge termination technique. The diodes can block a reverse voltage of at least 4.5 kV, and the on-state current density was 80 A/cm2 at VF =4 V.


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