Rapid Diagnostics of ASIC Circuit Marginalities Using Dynamic Laser Stimulation

2006 ◽  
Vol 6 (1) ◽  
pp. 9-16 ◽  
Author(s):  
J.Y. Liao ◽  
G.L. Woods ◽  
H.L. Marks
2011 ◽  
Vol 30 (2) ◽  
pp. 27-31
Author(s):  
V. Ponomarchuk ◽  
◽  
N. Khramenko ◽  
O. Guzun ◽  
Barudi Abdul Moneim ◽  
...  

Author(s):  
Magdalena Sienkiewicz ◽  
Philippe Rousseille

Abstract This paper presents a case study on scan test reject in a mixed mode IC. It focuses on the smart use of combined mature FA techniques, such as Soft Defect Localization (SDL) and emission microscopy (EMMI), to localize a random scan test anomaly at the silicon bulk level.


Author(s):  
Dominique Carisetti ◽  
Nicolas Sarazin ◽  
Nathalie Labat ◽  
Nathalie Malbert ◽  
Arnaud Curutchet ◽  
...  

Abstract To improve the long-term stability of AlGaN/GaN HEMTs, the reduction of gate and drain leakage currents and electrical anomalies at pinch-off is required. As electron transport in these devices is both coupled with traps or surface states interactions and with polarization effects, the identification and localization of the preeminent leakage path is still challenging. This paper demonstrates that thermal laser stimulation (TLS) analysis (OBIRCh, TIVA, XIVA) performed on the die surface are efficient to localize leakage paths in GaN based HEMTs. The first part details specific parameters, such as laser scan speed, scan direction, wavelength, and laser power applied for leakage gate current paths identification. It compares results obtained with Visible_NIR electroluminescence analysis with the ones obtained by the TLS techniques on GaN HEMT structures. The second part describes some failure analysis case studies of AlGaN/GaN HEMT with field plate structure which were successful, thanks to the OBIRCh technique.


Author(s):  
Chunlei Wu ◽  
Suying Yao

Abstract Lock-in IR-OBIRCH analysis, as a kind of static thermal laser stimulation (S-TLS) technique, is very effective to isolate a fault for the parametric failure cases. However, its capability is limited to localize a defect when the IC is operated under a defined operating condition. Whereas the dynamic thermal laser stimulation (D-TLS) technique is good at locating a fault while the IC is operated under some functions to activate the failure. In this paper, a novel method is presented to realize DTLS just by Lock-in IR-OBIRCH assisted with a Current Detection Probe Head. Two cases are studied to demonstrate the effectiveness of this method.


Author(s):  
V. Pouget ◽  
E. Faraud ◽  
K. Shao ◽  
S. Jonathas ◽  
D. Horain ◽  
...  

Abstract This paper presents the use of pulsed laser stimulation with picosecond and femtosecond laser pulses. We first discuss the resolution improvement that can be expected when using ultrashort laser pulses. Two case studies are then presented to illustrate the possibilities of the pulsed laser photoelectric stimulation in picosecond single-photon and femtosecond two-photon modes.


Author(s):  
Jonathan Shaw ◽  
Christopher McMahon ◽  
Yin Shyang Ng ◽  
Félix Beaudoi

Abstract This paper presents the use of Dynamic Laser Stimulation (DLS) and Time-Resolved DLS (TR-DLS) to provide fail site localization and complementary information on a failed embedded memory IC. In this study, an embedded dual port RAM within a 90nm IC that failed one of the Memory Built-In Self Tests (MBISTs) was investigated. This technique rapidly localized the failing area within the memory read/write circuitry. The TR-DLS provided maps for each operation of the MBIST pattern. With this information, the failure was clearly identified as a read operation failure. The TR-DLS technique also provided much refined site signature (down to just one net) within the sense amp of the Port B of the dual port RAM. This information provided very specific indication on how to improve the operation of that particular sense amp circuitry within the dual port RAM Memory.


Author(s):  
T. Kiyan ◽  
C. Boit ◽  
C. Brillert

Abstract In this paper, a methodology based upon laser stimulation and a comparison of continuous wave and pulsed laser operation will be presented that localizes the fault relevant sites in a fully functional scan chain cell. The technique uses a laser incident from the backside to inject soft faults into internal nodes of a master-slave scan flip-flop in consequence of localized photocurrent. Depending on the illuminated type of the transistors (n- or p-type), injection of a logic ‘0’ or ‘1’ into the master or the slave stage of a flip-flop takes place. The laser pulse is externally triggered and can easily be shifted to various time slots in reference to clock and scan pattern. This feature of the laser diode allows triggering the laser pulse on the rising or the falling edge of the clock. Therefore, it is possible to choose the stage of the flip-flop in which the fault injection should occur. It is also demonstrated that the technique is able to identify the most sensitive signal condition for fault injection with a better time resolution than the pulse width of the laser, a significant improvement for failure analysis of integrated circuits.


Author(s):  
Kevin Sanchez ◽  
Romain Desplats ◽  
Philippe Perdu ◽  
Felix Beaudoin ◽  
Sylvain Dudit ◽  
...  

Abstract In this paper we report on the application field of Dynamic Laser Stimulation (DLS) techniques to Integrated Circuit (IC) analysis. The effects of thermal and photoelectric laser stimulation on ICs are presented. Implementations, practical considerations and applications are presented for techniques based on functional tests like Soft Defect Localization (SDL) and Laser Assisted Device Alteration (LADA). A new methodology, Delay Variation Mapping (DVM), will also be presented and discussed.


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