A Novel Discrete Passives Integration on Organic Substrate

2005 ◽  
Author(s):  
Vasudivan Sunappan ◽  
Chee Wai Lu ◽  
Lai Lai Wai ◽  
Wei Fan ◽  
Boon Keng Lok
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Board ◽  
Organic Substrate ◽  
Temperature Cycling ◽  
Circuit Board ◽  
Electrical Performance ◽  
Core Material ◽  
Bottom Surface ◽  
Passive Components ◽  
Printed Circuit

A novel process has been developed to embed discrete (surface mountable) passive components like capacitors, resistors and inductors using printed circuit board fabrication technology. The process comprises of mounting passive components on top surface of a core PCB (printed circuit board) material using surface mount technology. The passive components mounting were designed in multiple clusters within the PCB. Dielectric sheets are sandwiched between top surface of core PCB and second PCB material for lamination process. A direct interconnection of the passive components to one or more integrated circuits (IC) is further accomplished by mounting the ICs on the bottom surface of the core material in an area directly under the passive components. The close proximity of the embedded passive components such as capacitors to an IC improved electrical performance by providing impedance reduction and resonance suppression at high frequency range. The reliability of solder joints was evaluatedd by temperature cycling test.

Confirming the Signal Integrity in Transmission of Digital Signals on Microstrip Straight Circuits via the Eye Diagrams

2014 ◽  
Vol 5 (1) ◽  
pp. 737-741
Author(s):  
Alejandro Dueñas Jiménez ◽  
Francisco Jiménez Hernández
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Board ◽  
Signal Integrity ◽  
High Volume ◽  
Information Storage ◽  
Circuit Board ◽  
Electromagnetic Simulation ◽  
Electronic Systems ◽  
Digital Signals ◽  
Printed Circuit

Because of the high volume of processing, transmission, and information storage, electronic systems presently requires faster clock speeds tosynchronizethe integrated circuits. Presently the “speeds” on the connections of a printed circuit board (PCB) are in the order of the GHz. At these frequencies the behavior of the interconnects are more like that of a transmission line, and hence distortion, delay, and phase shift- effects caused by phenomena like cross talk, ringing and over shot are present and may be undesirable for the performance of a circuit or system.Some of these phrases were extracted from the chapter eight of book “2-D Electromagnetic Simulation of Passive Microstrip Circuits” from the corresponding author of this paper.

Magnetic Emission Mapping for Passive Integrated Components Characterisation

2003 ◽  
Author(s):  
O. Crépel ◽  
Y. Bouttement ◽  
P. Descamps ◽  
C. Goupil ◽  
P. Perdu ◽  
...  
Keyword(s):  
Magnetic Field ◽  
Mobile Phone ◽  
Printed Circuit Board ◽  
Magnetic Sensors ◽  
Circuit Board ◽  
Magnetic Disturbance ◽  
Passive Components ◽  
Printed Circuit ◽  
Integrated Inductor ◽  
The Magnetic Field

Abstract We developed a system and a method to characterize the magnetic field induced by circuit board and electronic component, especially integrated inductor, with magnetic sensors. The different magnetic sensors are presented and several applications using this method are discussed. Particularly, in several semiconductor applications (e.g. Mobile phone), active dies are integrated with passive components. To minimize magnetic disturbance, arbitrary margin distances are used. We present a system to characterize precisely the magnetic emission to insure that the margin is sufficient and to reduce the size of the printed circuit board.

Microhardness Testing on Via Fill Material for Via In Pad Technology

2003 ◽  
Author(s):  
Norman J. Armendariz ◽  
Carolyn McCormick
Keyword(s):  
Printed Circuit Board ◽  
Failure Modes ◽  
Strong Dependence ◽  
Circuit Board ◽  
Electrical Performance ◽  
Gravimetric Analysis ◽  
Passive Components ◽  
Root Cause ◽  
Fill Material ◽  
Signal Routing

Abstract Via in pad PCB (Printed Circuit board) technology for passive components such as chip capacitors and resistors, provides the potential for improved signal routing density and reduced PCB area. Because of these improvements there is the potential for PCB cost reduction as well as gains in electrical performance through reduced impedance and inductance. However, not long after the implementation, double digit unit failures for solder joint electrical opens due to capacitor “tombstoning” began to occur. Failure modes included via fill material (solder mask) protrusion from the via as well as “out gassing” and related “tombstoning.” This failure analysis involved investigating a strong dependence on PCB supplier and, less obviously, manufacturing site. Other factors evaluated included via fill material, drill size, via fill thermal history and via fill amount or fill percent. The factor most implicated was incomplete cure of the via fill material. Previous thermal gravimetric analysis methods to determine level of polymerization or cure did not provide an ability to measure and demonstrate via fill cure level in small selected areas or its link to the failures. As a result, there was a metrology approach developed to establish this link and root-cause the failures in the field, which was based on microhardness techniques and noncontact via fill measuring metrologies.

scholarly journals Estimating Recycling Return of Integrated Circuits Using Computer Vision on Printed Circuit Boards

2021 ◽  
Vol 11 (6) ◽  
pp. 2808
Author(s):  
Leandro H. de S. Silva ◽  
Agostinho A. F. Júnior ◽  
George O. A. Azevedo ◽  
Sergio C. Oliveira ◽  
Bruno J. T. Fernandes
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Electronic Waste ◽  
Decision Criterion ◽  
Economic Feasibility ◽  
Electronic Equipment ◽  
Circuit Board ◽  
Mechanical Recycling ◽  
Printed Circuit

The technological growth of the last decades has brought many improvements in daily life, but also concerns on how to deal with electronic waste. Electrical and electronic equipment waste is the fastest-growing rate in the industrialized world. One of the elements of electronic equipment is the printed circuit board (PCB) and almost every electronic equipment has a PCB inside it. While waste PCB (WPCB) recycling may result in the recovery of potentially precious materials and the reuse of some components, it is a challenging task because its composition diversity requires a cautious pre-processing stage to achieve optimal recycling outcomes. Our research focused on proposing a method to evaluate the economic feasibility of recycling integrated circuits (ICs) from WPCB. The proposed method can help decide whether to dismantle a separate WPCB before the physical or mechanical recycling process and consists of estimating the IC area from a WPCB, calculating the IC’s weight using surface density, and estimating how much metal can be recovered by recycling those ICs. To estimate the IC area in a WPCB, we used a state-of-the-art object detection deep learning model (YOLO) and the PCB DSLR image dataset to detect the WPCB’s ICs. Regarding IC detection, the best result was obtained with the partitioned analysis of each image through a sliding window, thus creating new images of smaller dimensions, reaching 86.77% mAP. As a final result, we estimate that the Deep PCB Dataset has a total of 1079.18 g of ICs, from which it would be possible to recover at least 909.94 g of metals and silicon elements from all WPCBs’ ICs. Since there is a high variability in the compositions of WPCBs, it is possible to calculate the gross income for each WPCB and use it as a decision criterion for the type of pre-processing.

Flexible Electronics Fabrication for Missile Wiring Interconnects

2012 ◽  
Vol 2012 (DPC) ◽  
pp. 001096-001114
Author(s):  
Michael R. Whitley ◽  
Tracy D. Hudson
Keyword(s):  
Unmanned Aerial Vehicles ◽  
Flexible Electronics ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Polyimide Films ◽  
Passive Components ◽  
Printed Circuit ◽  
Data Formats ◽  
Aerial Vehicles ◽  
Ink Jet

The increased usage of unmanned aerial vehicles has driven the desire for smaller and lighter missile bodies. The wiring harnesses required to connect the missile subsystems constitute a significant portion of the missile weight and cost. We have been exploring the development of flexible electronics substrates manufactured using ink jet technology on polyimide films. This technology has an advantage over traditional flex circuit manufacturing because in addition to creating traditional wiring patterns the ink jet technology enables the creation of passive components such as resistors and capacitors. The Dimatix DMP-2831 ink jet system uses individually controllable piezoelectric driven MEMS nozzles to precisely deposit nanoparticle inks. These inks are then annealed to form wiring patterns. We will present the process for converting traditional printed circuit board data formats to inkjet printable data, the process for depositing the ink, annealing and testing.

Pretreatment of Blind Via Holes before Ni/Au and Cu Plating Applied with Atmospheric Pressure Plasma Jet

2005 ◽  
Vol 2 (3) ◽  
pp. 189-196 ◽  
Author(s):  
Yasushi Sawada ◽  
Keiichi Yamazaki ◽  
Noriyuki Taguchi ◽  
Tetsuji Shibata
Keyword(s):  
Atmospheric Pressure ◽  
Printed Circuit Board ◽  
Formation Rate ◽  
Plasma Processing ◽  
Atmospheric Pressure Plasma ◽  
Plasma Jet ◽  
Circuit Board ◽  
Bottom Surface ◽  
Printed Circuit ◽  
Via Holes

The effectiveness of atmospheric pressure (AP) plasma preprocessing before Ni/Au or Cu plating has been examined by applying it to a build-up printed circuit board (FR-4 grade) and polyimide-based flexible circuit film, both with blind via-holes (BVHs). The AP plasma applied with a dielectric barrier discharge is generated inside a 56 mm wide quartz vessel by an RF power generator using Ar-O2 gas mixture. One side of the vessel is open and the plasma jet is blown on the sample substrate transported 5 mm downward from the outlet of the vessel. The deposit failure rate of Ni/Au electroless deposit to 50 μm-diameter BVHs formed on a photo resist on the printed circuit board is 12.5% without preprocessing but is decreased to 0% after applying the AP plasma processing. As for 50 μm-diameter BVHs formed with a YAG laser on a polyimide-based flexible circuit film, the bump formation using electrolytic copper plating fails without preprocessing, but a 100% bump formation rate is achieved after applying AP plasma processing. It is presumed that the AP plasma processing improves the wetting property of the BVH walls and allows the plating solution to uniformly cover the entire wall surfaces without generating bubbles. The removal of organic substances attached to the BVH bottom surface also helps to improve the adherence of metal plating.

Mechanical Stress Analysis and Evaluation of Hybrid Land Grid Array Attached Large Form Factor Organic Modules

2012 ◽  
Vol 2012 (1) ◽  
pp. 000818-000824
Author(s):  
John Torok ◽  
Shawn Canfield ◽  
Yuet-Ying Yu ◽  
Jiantao Zheng
Keyword(s):  
Form Factor ◽  
Stress Analysis ◽  
Mechanical Stress ◽  
Printed Circuit Board ◽  
Organic Substrate ◽  
Circuit Board ◽  
Bottom Surface ◽  
Mechanical Shock ◽  
Analysis And Evaluation ◽  
Pcb Assembly

Recent industry trends to continue enabling increased server system performance and packaging density has driven the need to implement larger form factor hybrid land grid array (LGA) attached organic modules. In addition, given the need to package multiple modules on a single printed circuit board (PCB) assembly, PCB cross-sections and their corresponding physical properties (e.g., flatness, etc.) as well as module bottom surface metallurgy (BSM) co-planarity require a more detailed understanding of impacts to the compliant as well as the soldered connector interfaces. Lastly, the migration to lead (Pb)-free solders has further complicated the issue given both the change in material properties as well as processing temperatures. In this paper we will discuss the mechanical stress analysis and evaluation tests assessment of a recently developed 50 mm square organic processor module, hybrid LGA attached to a multiple site PCB. The analysis presented will highlight the methodology to identify both connector soldered stress and predicted contact load variation across the module's mated interface. Key parameters discuss will include the PCB flatness, Organic substrate BSM co-planarity (both predicted and measured) and the Hybrid LGA as-soldered contact co-planarity. Corroborating predicted analytical results, we will discuss various evaluation tests performed to validate the design's integrity. Key tests include, pressure sensitive film (PSF) studies and environment stress exposures, including thermal shock, mechanical shock and vibration and seismic exposure. Post test electrical integrity and test sample construction analysis, including 3D x-ray and mechanical cross-section, will also be described. The analysis process and testing described will provide a method to evaluate more challenging hybrid LGA applications as both module sizes and/or number applied per PCB assembly increase and Pb-free assembly is introduced in future applications.

The applicability of electrodeposited photoresists in producing ultra‐fine lines using sputtered seeding layers

Circuit World ◽  
2002 ◽  
Vol 28 (2) ◽  
pp. 11-13 ◽  
Author(s):  
Paavo Jalonen ◽  
Aulis Tuominen
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Core Material ◽  
Quality Properties ◽  
Printed Circuit ◽  
Printed Circuit Board Manufacturing ◽  
Coating Method ◽  
Film Method ◽  
Seed Layers ◽  
Dry Film

Photolithographic techniques are universally employed in multi‐layer printed circuit board manufacturing. The growing demand for miniaturization of electronics means that finer lines and smaller vias are increasingly required and these very fine lines on the substrate are increasingly difficult to produce by conventional means. One very promising means of meeting these fine line requirements is via the etching of sputtered thin films on a substrate and then growing copper on these lines using an additive method. In this work we tested the capability of an electrodeposited, positive‐acting photoresist for patterning thin film circuits on sputtered seed layers such as chromium. A fully additive electroless copper was then used to produce the copper lines. Epoxy reinforced fibreglass was used as a core material. The performance and quality properties of the process were examined, along with limitations of the process when compared with both a conventional dry film method and a spin coating method.

scholarly journals Optical inspection of mounted printed circuit board using National Instruments software

2020 ◽  
Vol 7 (1.) ◽  
Author(s):  
Gyula Korsoveczki
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Microsoft Excel ◽  
Printed Circuit ◽  
Vision Development ◽  
Optical Inspection ◽  
The Given

The topic of the given task based on the optical opposition of a mounted printed circuit board using National Instruments software. During the inspection, 7 types of resistors, 3 types of integrated circuits, barcodes and text were detected. The results of the detection have been visualized and a Microsoft Excel scan report has been exported. The optical inspection was carried out using the National Instruments Vision Development Module and LabVIEW development environments.

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