Experimental Characterization of Bonded Microcoolers for Hot Spot Removal

2005 ◽  
Author(s):  
Yan Zhang ◽  
Gehong Zeng ◽  
Christine Hoffman ◽  
Ali Shakouri ◽  
Peng Wang ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Hot Spots ◽  
Hot Spot ◽  
Experimental Results ◽  
Cooling Power ◽  
Experimental Characterization ◽  
Region Versus ◽  
Test Range ◽  
Microelectronic Devices

In this paper we describe the experimental results of Si/SiGe superlattice microcoolers, which are used to cool the target hot spot on a 65μm-thick silicon substrate. The device areas under test range from 50×50 to 150×150 μm2. We measured the cooling temperature at the hot spot region versus the current supplied to the microcooler, as well as the thermal resistance, and the cooling power density (CPD, also defined as heat flux — the flow of heat per unit area in W/cm2) of these devices. The experimental results show the maximum cooling at the hot spot region approaches 1°C for device area 150×150μm2 at 80°C, and CPD up to ∼110W/cm2 for device area 50×50×2 μm2 (two 50×50μm2 device array, as illustrated in Figure 3) at 80°C. The two-chip bonded configuration will allow the integration of spot coolers and integrated circuit chips with minimum impact on the processing of microelectronic devices. Key parameters limiting the cooling performance at the hot spots are also discussed.

Controllable, High Force Amplification Using Elastic Cable Capstans

2012 ◽  
Author(s):  
Gray C. Thomas ◽  
Clayton C. Gimenez ◽  
Erica D. Chin ◽  
Andrew P. Carmedelle ◽  
Aaron M. Hoover
Keyword(s):  
Dynamic Performance ◽  
Experimental Results ◽  
Rotating Drum ◽  
Experimental Characterization ◽  
Experimental Apparatus ◽  
Linear Force ◽  
Low Torque ◽  
Robotic Applications

This paper presents the design and experimental characterization of a continuously variable linear force amplifier based on the theory of capstans. In contrast to traditional capstan amplifiers, the design presented here uses an elastic cable, enabling a control actuator to not only continuously clutch output to a rotating drum but also passively declutch by releasing tension. Our experimental results demonstrate successful declutching at all force amplification ratios up to the limit of our experimental apparatus, 21 — significantly higher than previously published values. A system of distributed capstan amplifiers driven by a central torque source with cable engagement switched by lightweight, low torque actuators has potential to reduce the mass of distal actuators and enable more dynamic performance in robotic applications.

Experimental Characterization of the Vertical and Lateral Heat Transfer in 3D-SIC Packages

2015 ◽  
Author(s):  
Herman Oprins ◽  
Vladimir Cherman ◽  
Geert Van der Plas ◽  
Joeri De Vos ◽  
Eric Beyne
Keyword(s):  
Power Distribution ◽  
Hot Spot ◽  
Lateral Spreading ◽  
Experimental Characterization ◽  
Test Chip ◽  
Conductivity Increase ◽  
Thermal Conductivity Increase ◽  
Equivalent Properties ◽  
Lateral Heat

In this paper, we present the experimental characterization of 3D packages using a dedicated stackable test chip. An advanced CMOS test chip with programmable power distribution has been designed, fabricated, stacked and packaged in molded and bare die 3D packages. The packages have been experimentally characterized in test sockets with and without cooling, and soldered to the PCB. Using uniform and localized hot spot power distribution, the thermal self-heating and thermal coupling resistance and the lateral spreading in the 3D packages have been studied. Furthermore, the measurements have been used to characterize the thermal properties of the epoxy mold compound and the die-die interface and to calibrate a thermal model for the calculation of equivalent properties of underfilled μbump arrays. This model has been applied to study the trade-off between the stand-off height reduction and the underfill thermal conductivity increase in order to reduce the inter die thermal resistance.

Experimental Characterization of the Vertical and Lateral Heat Transfer in Three-Dimensional Stacked Die Packages

2016 ◽  
Vol 138 (1) ◽  
Author(s):  
Herman Oprins ◽  
Vladimir Cherman ◽  
Geert Van der Plas ◽  
Joeri De Vos ◽  
Eric Beyne
Keyword(s):  
Power Distribution ◽  
Printed Circuit Board ◽  
Hot Spot ◽  
Three Dimensional ◽  
Lateral Spreading ◽  
Circuit Board ◽  
Experimental Characterization ◽  
Test Chip ◽  
Conductivity Increase

In this paper, we present the experimental characterization of three-dimensional (3D) packages using a dedicated stackable test chip. An advanced complementary metal oxide silicon (CMOS) test chip with programmable power distribution has been designed, fabricated, stacked, and packaged in molded and bare die 3D packages. The packages have been experimentally characterized in test sockets with and without cooling and soldered to the printed circuit board (PCB). Using uniform and localized hot spot power distribution, the thermal self-heating and thermal coupling resistance and the lateral spreading in the 3D packages have been studied. Furthermore, the measurements have been used to characterize the thermal properties of the die–die interface and to calibrate a thermal model for the calculation of equivalent properties of underfilled μbump arrays. This model has been applied to study the tradeoff between the standoff height reduction and the underfill thermal conductivity increase in order to reduce the interdie thermal resistance.

Evaporative Thermal Performance of Vapor Chambers Under Nonuniform Heating Conditions

2008 ◽  
Vol 130 (12) ◽  
Author(s):  
Je-Young Chang ◽  
Ravi S. Prasher ◽  
Suzana Prstic ◽  
P. Cheng ◽  
H. B. Ma
Keyword(s):  
Heat Flux ◽  
Thermal Resistance ◽  
Thermal Performance ◽  
Hot Spots ◽  
Hot Spot ◽  
Heat Fluxes ◽  
Experimental Results ◽  
Nonuniform Heating ◽  
Test Results ◽  
Uniform Heating

This paper reports the test results of vapor chambers using copper post heaters and silicon die heaters. Experiments were conducted to understand the effects of nonuniform heating conditions (hot spots) on the evaporative thermal performance of vapor chambers. In contrast to the copper post heater, which provides ideal heating, a silicon chip package was developed to replicate more realistic heat source boundary conditions of microprocessors. The vapor chambers were tested for hot spot heat fluxes as high as 746 W/cm2. The experimental results show that evaporator thermal resistance is not sensitive to nonuniform heat conditions, i.e., it is the same as in the uniform heating case. In addition, a model was developed to predict the effective thickness of a sintered-wick layer saturated with water at the evaporator. The model assumes that the pore sizes in the sintered particle wick layer are distributed nonuniformly. With an increase of heat flux, liquid in the larger size pores are dried out first, followed by drying of smaller size pores. Statistical analysis of the pore size distribution is used to calculate the fraction of the pores that remain saturated with liquid at a given heat flux condition. The model successfully predicts the experimental results of evaporative thermal resistance of vapor chambers for both uniform and nonuniform heat fluxes.

scholarly journals SpotFuzz: Fuzzing Based on Program Hot-Spots

Electronics ◽  
2021 ◽  
Vol 10 (24) ◽  
pp. 3142
Author(s):  
Haibo Pang ◽  
Jie Jian ◽  
Yan Zhuang ◽  
Yingyun Ye ◽  
Zhanbo Li
Keyword(s):  
Hot Spots ◽  
Hot Spot ◽  
Experimental Results ◽  
Test Cases ◽  
Limited Time ◽  
Very High

AFL is the most widely used coverage-guided fuzzer, which relies on rough execution information to assign seeds energy, which can lead to waste. We track the program executed by AFL and discover that the hit counts of each edge might vary greatly when using different seeds as inputs. Some seeds, which are continuously given too much energy, experience very high hit counts of several edges without new crashes or edges being explored, which results in invalid execution and waste of performance. We also define time-consuming edges and discover that they only occupy a small part of the program. In this paper, we define invalid execution edges and time-consuming edges as hot-spots and propose a fuzzing solution SpotFuzz to solve energy waste caused by the above hot-spot phenomenon. It allocates seeds with more hot-spots during execution and uses less energy to reduce energy waste. Moreover, it preferentially selects seeds with less time-consuming edges as test cases, allowing for more edges to be explored in a limited time. We implement an SpotFuzz prototype based on AFL and test it on several real programs for 600 CPU days. The experimental results show that minimizing the invalid and time-consuming execution of edges can improve the fuzzing efficiency. On average, SpotFuzz could find 42.96% more unique crashes and 14.25% more edges than AFL on GNU Binutils and tcpdump.

Removing the Hot-Spots in High Power Devices Using the Thermoelectric Cooler and Micro Heat Pipe

2012 ◽  
Author(s):  
Agat Hirachan ◽  
Dereje Agonafer
Keyword(s):  
Heat Pipe ◽  
Integrated Circuit ◽  
Hot Spots ◽  
Hot Spot ◽  
The United States ◽  
High Heat ◽  
Heat Fluxes ◽  
Thermoelectric Cooler ◽  
Silicon Chips ◽  
Micro Heat Pipe

Due to localized high heat fluxes, hot-spots are created in silicon chips. Cooling of the hot-spots is one of the major thermal challenges in today’s integrated circuit (IC) industry. Many researches have been conducted to find ways to cool hot-spots using different techniques as uniform heating is highly desired. This paper focuses on cooling of hot-spot using conventional thermoelectric cooler (Melcor_CP1.0-31-05L.1) and a micro heat pipe. A chip package with conventional integrated heat spreader and heat sink was designed. Hot-spot was created at the center of the silicon die with background heat at rest of the area. The heat flux on the hot-spot was much greater than rest of the area. Forced convection was used to cool IC package, temperature was observed at active side of the silicon die. After that a copper conductor was used to take away heat directly from the hot-spot of the silicon die to the other end of the conductor which was cooled using the thermoelectric cooler. Finally the conductor was replaced by a heat pipe and a comparison between three cases was done to study the cooling performance using the commercial software, ANSYS Icepak. The effect of trench on silicon die was also studied. In this paper the United States Patent, Patent No. US 6,581,388 B2, Jun. 24 2000 [8] as shown in Fig. 1 (b) was modified by replacing the conductor with a micro heat pipe to solve the hot-spots problem in electronic packaging.

Adaptive Hot-Spot Cooling of Integrated Circuits Using Digital Microfluidics

2005 ◽  
Author(s):  
Phil Paik ◽  
Vamsee K. Pamula ◽  
Krishnendu Chakrabarty
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Hot Spots ◽  
High Performance ◽  
Cooling System ◽  
Hot Spot ◽  
Digital Microfluidics ◽  
Ic Design ◽  
Spot Cooling ◽  
Digital Microfluidic

Thermal management is becoming an increasingly important issue in integrated circuit (IC) design. The ability to cool ICs is quickly reaching a limit with today’s package-level solutions. While a number of novel cooling methods have been introduced, many of which are microfluidic approaches, these methods are unable to adaptively address the uneven thermal profiles and hot-spots generated in high performance ICs. In this paper, we present a droplet-based digital microfluidic cooling system for ICs that can adaptively cool hot-spots through real-time reprogrammable flow. This paper characterizes the effectiveness of microliter-sized droplets for cooling by determining the heat transfer coefficient of a droplet shuttling back and forth in an open system over a hot-spot at various speeds. Cooling is found to be significantly enhanced at higher flow rates of droplets. In order to further enhance cooling, the effect of varying droplet aspect ratio (width/height) in a confined system was also studied.

DHODH hot spots: an underexplored source to guide drug development efforts

2021 ◽  
Vol 21 ◽  
Author(s):  
Thamires Quadros Froes ◽  
Maria Cristina Nonato ◽  
Marcelo Santos Castilho ◽  
Luana Carlos Campisano Zapata ◽  
Juliana Sayuri Akamine
Keyword(s):  
Drug Development ◽  
Hot Spots ◽  
Hot Spot ◽  
Functional Characterization ◽  
Protein Structures ◽  
Docking Studies ◽  
Dihydroorotate Dehydrogenase ◽  
Review Reports ◽  
First Time

Background: Dihydroorotate dehydrogenase (DHODH) has long been recognized as an important drug target for proliferative and parasitic diseases, including compounds that exhibit trypanocidal action and broad-spectrum antiviral activity. Despite numerous and successful efforts in structural and functional characterization of DHODHs, as well as in the development of inhibitors, DHODH hot spots remain largely unmapped and underexplored. Objective: This review describes the tools that are currently available for the identification and characterization of hot spots in protein structures and how freely available webservers can be exploited to predict DHODH hot spots. Moreover, it provides for the first time a review of the antiviral properties of DHODH inhibitors. Method: X-ray structures from human (HsDHODH) and Trypanosoma cruzi DHODH (TcDHODH) had their hot spots predicted by both FTMap and Fragment Hotspot Maps web servers. Result: FTMap showed that hot spot occupancy in HsDHODH is correlated with the ligand efficiency (LE) of its known inhibitors, and Fragment Hotspot Maps pointed out the contribution of selected moieties to the overall LE. The conformational flexibility of the active site loop in TcDHODH was found to have a major impact on the druggability of the orotate binding site. In addition, both FTMap and Fragment Hotspot Maps servers predict a novel pocket in TcDHODH dimer interface (S6 site). Conclusion: This review reports how hot spots can be exploited during hit-to-lead steps, docking studies or even to improve inhibitor binding profile and by doing so using DHODH as a model, points to new drug development opportunities.

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