InP-HBT ICs FOR 40 Gb/s OPTICAL LINKS

1998 ◽  
Vol 09 (02) ◽  
pp. 595-630
Author(s):  
MEHRAN MOKHTARI ◽  
URBAN WESTERGREN ◽  
BO WILLÉN ◽  
THOMAS SWAHN ◽  
ROBERT WALDEN

InP-based HBT technology has proven to be a strong candidate for ultra high speed electronic as well as optoelectronic integrated circuits. The cut-offs frequencies of the available devices exceed 100 GHz. To challenge the technology, a variety of circuits, suitable for a demonstrator for the 40 Gb/s fiber optical transmission system have been designed, fabricated, and tested. All the circuits show potential for 40 Gb/s applications. The electrical parts have been implemented in MSI/LSI AlInAs/InGaAs-HBT technology, while the monolithic optoelectronic receivers were realized in SSI- InP/InGaAs HBT technology. The verification of performance of the circuits have been mainly limited by available measurement equipment. All the electronic parts were operational with 3 volt supply voltage. All the circuits were fully functional after the first processing round. No redesign was necessary.

2017 ◽  
Vol 3 (1) ◽  
pp. 1700196 ◽  
Author(s):  
Evgeniy Panchenko ◽  
Jasper J. Cadusch ◽  
Ori Avayu ◽  
Tal Ellenbogen ◽  
Timothy D. James ◽  
...  

2021 ◽  
Author(s):  
Xiaozhu Wei ◽  
Shohei Kumagai ◽  
Tatsuyuki Makita ◽  
Kotaro Tsuzuku ◽  
Akifumi Yamamura ◽  
...  

Abstract Printed electronics offer a cost-efficient way to realise flexible electronic devices. The combined use of p-type and n-type semiconductors would yield silicon-like integrated circuits with low power consumption and stability. However, printing complementary circuits is challenging due to a lack of suitable material systems. To counter this, we employed a hybrid system to integrate p-type organic semiconductors (OSCs) and n-type amorphous metal oxide semiconductors (MOSs). These damage-free patterned OSC- and MOS-based thin-film transistors with improved process durability allowed the fabrication of hybrid complementary circuits on flexible substrates. These inverters functioned well even after exposure to air for 5 months. A large noise margin and power gain of 38 were realised with a supply voltage as low as 7 V. Furthermore, a five-stage ring oscillator with a stage propagation delay of 1.3 µs was achieved, which is the fastest operation ever reported for printed, flexible complementary inverters.


1986 ◽  
Vol 25 (10) ◽  
Author(s):  
M. K. Kilcoyne ◽  
S. Beccue ◽  
K. D. Pedrotti ◽  
R. Asatourian ◽  
R. Anderson

Author(s):  
E.D. Wolf

Most microelectronics devices and circuits operate faster, consume less power, execute more functions and cost less per circuit function when the feature-sizes internal to the devices and circuits are made smaller. This is part of the stimulus for the Very High-Speed Integrated Circuits (VHSIC) program. There is also a need for smaller, more sensitive sensors in a wide range of disciplines that includes electrochemistry, neurophysiology and ultra-high pressure solid state research. There is often fundamental new science (and sometimes new technology) to be revealed (and used) when a basic parameter such as size is extended to new dimensions, as is evident at the two extremes of smallness and largeness, high energy particle physics and cosmology, respectively. However, there is also a very important intermediate domain of size that spans from the diameter of a small cluster of atoms up to near one micrometer which may also have just as profound effects on society as “big” physics.


Author(s):  
C. O. Jung ◽  
S. J. Krause ◽  
S.R. Wilson

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.


Author(s):  
N. David Theodore ◽  
Donald Y.C Lie ◽  
J. H. Song ◽  
Peter Crozier

SiGe is being extensively investigated for use in heterojunction bipolar-transistors (HBT) and high-speed integrated circuits. The material offers adjustable bandgaps, improved carrier mobilities over Si homostructures, and compatibility with Si-based integrated-circuit manufacturing. SiGe HBT performance can be improved by increasing the base-doping or by widening the base link-region by ion implantation. A problem that arises however is that implantation can enhance strain-relaxation of SiGe/Si.Furthermore, once misfit or threading dislocations result, the defects can give rise to recombination-generation in depletion regions of semiconductor devices. It is of relevance therefore to study the damage and anneal behavior of implanted SiGe layers. The present study investigates the microstructural behavior of phosphorus implanted pseudomorphic metastable Si0.88Ge0.12 films on silicon, exposed to various anneals.Metastable pseudomorphic Si0.88Ge0.12 films were grown ~265 nm thick on a silicon wafer by molecular-beam epitaxy. Pieces of this wafer were then implanted at room temperature with 100 keV phosphorus ions to a dose of 1.5×1015 cm-2.


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