VLSI IMPLEMENTATION OF AN EFFICIENT ASIC ARCHITECTURE FOR REAL-TIME ROTATION OF DIGITAL IMAGES

1995 ◽  
Vol 09 (02) ◽  
pp. 449-462 ◽  
Author(s):  
INDRADEEP GHOSH ◽  
BANDANA MAJUMDAR
Keyword(s):  
Real Time ◽  
Architectural Design ◽  
Vlsi Implementation ◽  
Gray Level ◽  
Clock Frequency ◽  
Design Rules ◽  
Silicon Area ◽  
Vlsi Technology ◽  
Processing Techniques ◽  
High Processing

This paper describes the design and the VLSI implementation of a novel architecture that performs image rotation in real time. In order to improve throughput, we divide an image-frame into a number of windows. The rotation of each window-center as well as the final displacement of individual pixels within a window is then calculated. A CORDIC-based scheme is used to compute the displacement of a pixel. Our architectural design is incorporated into a chip that has been laid out using VTI (VLSI Technology Inc.) tools obeying the 1.5 μm SCMOS design rules. The chip owes its high processing capability to a combination of pipelining and parallel-processing techniques. For a clock frequency greater than 10.6 MHz, we can perform the rotation of a 512×512 gray-level digital image at the rate of 30 frames per second. The chip utilizes around 35,000 transistors and has an estimated silicon area of 211 mils×276 mils.

A NOVEL DECOMPOSITION APPROACH AND VLSI IMPLEMENTATION OF CHROMA INTERPOLATOR FOR H.264 ENCODERS

2013 ◽  
Vol 22 (10) ◽  
pp. 1340025
Author(s):  
TENG WANG ◽  
LEI ZHAO ◽  
ZI-YI HU ◽  
ZHENG XIE ◽  
XIN-AN WANG
Keyword(s):  
Power Consumption ◽  
Real Time ◽  
Hardware Design ◽  
Cmos Technology ◽  
Vlsi Implementation ◽  
Clock Frequency ◽  
Hardware Cost ◽  
Decomposition Approach ◽  
Lower Power ◽  
Decomposition Scheme

In this paper, a novel decomposition approach and VLSI implementation of the chroma interpolator with great hardware reuse and no multipliers for H.264 encoders are proposed. First, the characteristic of the chroma interpolation is analyzed to obtain an optimized decomposition scheme, with which the chroma interpolation can be realized with arithmetic elements (AEs) which are comprised of only adders. Four types of AEs are developed and a pipelining hardware design is proposed to conduct the chroma interpolation with great hardware reuse. The proposed design was prototyped within a Xilinx Virtex6 XC6VLX240T FPGA with a clock frequency as high as 245 MHz. The proposed design was also synthesized with SMIC 130 nm CMOS technology with a clock frequency of 200 MHz, which could support a real-time HDTV application with less hardware cost and lower power consumption.

HIGH-SPEED PARALLEL VLSI ARCHITECTURES FOR IMAGE DECORRELATION

1995 ◽  
Vol 09 (02) ◽  
pp. 343-365
Author(s):  
TINKU ACHARYA ◽  
AMAR MUKHERJEE
Keyword(s):  
Image Compression ◽  
Real Time ◽  
High Speed ◽  
State Of The Art ◽  
Parallel Architecture ◽  
Vlsi Implementation ◽  
Compression Rate ◽  
Vlsi Architectures ◽  
Vlsi Chip ◽  
Vlsi Technology

We present a new high speed parallel architecture and its VLSI implementation to design a special purpose hardware for real-time lossless image compression/ decompression using a decorrelation scheme. The proposed architecture can easily be implemented using state-of-the-art VLSI technology. The hardware yields a high compression rate. A prototype 1-micron VLSI chip based on this architectural idea has been designed. The scheme is favourably comparable to the lossless JPEG standard image compression schemes. We also discuss the parallelization issues of the lossless JPEG standard still compression schemes and their difficulties.

scholarly journals Nanozymes for Environmental Pollutant Monitoring and Remediation

Sensors ◽  
2021 ◽  
Vol 21 (2) ◽  
pp. 408
Author(s):  
Elicia L. S. Wong ◽  
Khuong Q. Vuong ◽  
Edith Chow
Keyword(s):  
Real Time ◽  
Organic Pollutants ◽  
Architectural Design ◽  
Electrochemical Techniques ◽  
Environmental Pollutant ◽  
Field Application ◽  
Optical Methods ◽  
Enzyme Mimicking ◽  
Active Metal ◽  
Recent Developments

Nanozymes are advanced nanomaterials which mimic natural enzymes by exhibiting enzyme-like properties. As nanozymes offer better structural stability over their respective natural enzymes, they are ideal candidates for real-time and/or remote environmental pollutant monitoring and remediation. In this review, we classify nanozymes into four types depending on their enzyme-mimicking behaviour (active metal centre mimic, functional mimic, nanocomposite or 3D structural mimic) and offer mechanistic insights into the nature of their catalytic activity. Following this, we discuss the current environmental translation of nanozymes into a powerful sensing or remediation tool through inventive nano-architectural design of nanozymes and their transduction methodologies. Here, we focus on recent developments in nanozymes for the detection of heavy metal ions, pesticides and other organic pollutants, emphasising optical methods and a few electrochemical techniques. Strategies to remediate persistent organic pollutants such as pesticides, phenols, antibiotics and textile dyes are included. We conclude with a discussion on the practical deployment of these nanozymes in terms of their effectiveness, reusability, real-time in-field application, commercial production and regulatory considerations.

Preparation of integrated chemical sensors using commercial VLSI technology

1987 ◽  
Vol 65 (5) ◽  
pp. 1072-1078 ◽  
Author(s):  
Paul G. Glavina ◽  
D. Jed Harrison
Keyword(s):  
Chemical Sensors ◽  
Linear Response ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Microelectrode Arrays ◽  
Drain Current ◽  
Cyclic Voltammetric ◽  
Design Rules ◽  
Vlsi Technology ◽  
Commercial Technology

The fabrication of ion sensitive field effect transistors (ISFET) and microelectrode arrays for use as chemical sensors using a commercial CMOS fabrication process is described. The commercial technology is readily available through the Canadian Microelectronics Corporation; however, several of the recommended design rules must be ignored in preparing chemical sensors using this process. The ISFET devices show near theoretical response to K+ in aqueous solution (55 mV slope) when coated with a K+ sensitive membrane. An extended gate ion sensitive device is presented which offers advantages in encapsulation of ISFET sensors. The source-drain current of both devices show a linear response to log [Formula: see text] in contrast to ISFETs previously reported that have high internal lead resistances. Al and poly-Si microelectrode arrays are fabricated commercially and then Pt is electrodeposited on the microelectrodes. The resulting arrays show good cyclic voltammetric response to Fe(CN)64− and Ru(NH3)63+ and are relatively durable.

scholarly journals The CoRisk-Index: Measuring economic risks related to COVID-19 in real time

2021 ◽  
Author(s):  
Fabian Braesemann ◽  
Fabian Stephany ◽  
Leonie Neuhäuser ◽  
Niklas Stoehr ◽  
Philipp Darius ◽  
...  
Keyword(s):  
Stock Market ◽  
Real Time ◽  
Language Processing ◽  
Economic Indicator ◽  
Economic Consequences ◽  
Economic Downturn ◽  
Related Risk ◽  
Unemployment Data ◽  
Using Data ◽  
Processing Techniques

Abstract The global spread of Covid-19 has caused major economic disruptions. Governments around the world provide considerable financial support to mitigate the economic downturn. However, effective policy responses require reliable data on the economic consequences of the corona pandemic. We propose the CoRisk-Index: a real-time economic indicator of Covid-19 related risk assessments by industry. Using data mining, we analyse all reports from US companies filed since January 2020, representing more than a third of all US employees. We construct two measures - the number of 'corona' words in each report and the average text negativity of the sentences mentioning corona in each industry - that are aggregated in the CoRisk-Index. The index correlates with U.S. unemployment data and preempts stock market losses of February 2020. Moreover, thanks to topic modelling and natural language processing techniques, the CoRisk data provides unique granularity with regards to the particular contexts of the crisis and the concerns of individual industries about them. The data presented here help researchers and decision makers to measure, the previously unobserved, risk awareness of industries with regard to Covid-19, bridging the quantification gap between highly volatile stock market dynamics and long-term macro-economic figures. For immediate access to the data, we provide all findings and raw data on an interactive online dashboard in real time.

scholarly journals Performance Improvement of Electro Optic Search and Track System for Maritime Surveillance

2020 ◽  
Vol 70 (1) ◽  
pp. 66-71 ◽  
Author(s):  
Manvendra Singh ◽  
Sudhir Khare ◽  
Brajesh Kumar Kaushik
Keyword(s):  
Real Time ◽  
Marine Environment ◽  
Selection Criterion ◽  
Vital Role ◽  
Maritime Surveillance ◽  
Detection And Tracking ◽  
Track System ◽  
Electro Optic ◽  
Video Processor ◽  
Processing Techniques

Surveillance of maritime domain is absolutely vital to ensure an appropriate response against any adverse situation relating to maritime safety or security. Electro-optic search and track (EOST) system plays a vital role by providing independent search and track of potential targets in marine environment. EOST provides real-time images of objects with details, required to neutralise threats. At long range, detection and tracking capability of EOST degrades due to uncertainty in target signatures under cluttered scenario. Image quality can be improved by using suitable sensors and enhancement using the target/background signature knowledge. Robust tracking of object can be achieved by optimising the performance parameters of tracker. In the present work, improvement in the performance of EOST subsystems such as sensor, video processor and video tracker are discussed. To improve EOST performance in terms of detection and tracking, sensor selection criterion and various real time image processing techniques and their selection criteria for maritime applications have been also discussed. Resultant improvement in the quality of image recorded under marine environment has been presented.

scholarly journals Digital matter as interdisciplinary commodity

2017 ◽  
Vol 2 (3) ◽  
pp. 103
Author(s):  
Uwe Rieger
Keyword(s):  
Real Time ◽  
Spatial Data ◽  
Architectural Design ◽  
Large Scale ◽  
Mixed Reality ◽  
Digital Fabrication ◽  
Digital Information ◽  
Design Environment ◽  
Digital World ◽  
Starting Point

<p>With the current exponential growth in the sector of Spatial Data Technology and Mixed Reality display devises we experience an increasing overlap of the physical and digital world. Next to making data spatially visible the attempt is to connect digital information with physical properties. Over the past years a number of research institutions have been laying the ground for these developments. In contemporary architecture architectural design the dominant application of data technology is connected to graphical presentation, form finding and digital fabrication.<br />The <em>arc/sec Lab for Digital Spatial Operations </em>at the University of Auckland takes a further step. The Lab explores concepts for a new condition of buildings and urban patterns in which digital information is connected with spatial appearance and linked to material properties. The approach focuses on the step beyond digital re-presentation and digital fabrication, where data is re-connected to the multi-sensory human perceptions and physical skills. The work at the Lab is conducted in a cross disciplinary design environment and based on experiential investigations. The arc/sec Lab utilizes large-scale interactive installations as the driving vehicle for the exploration and communication of new dimensions in architectural space. The experiments are aiming to make data “touchable” and to demonstrate real time responsive environments. In parallel they are the starting point for both the development of practice oriented applications and speculation on how our cities and buildings might change in the future.<br />The article gives an overview of the current experiments being undertaken at the arc/sec Lab. It discusses how digital technologies allow for innovation between the disciplines by introducing real time adaptive behaviours to our build environment and it speculates on the type of spaces we can construct when <em>digital matter </em>is used as a new dynamic building material.</p>

Application of an Alternative Teaching Model in a Virtual Architectural Design Studio: Impacts and Constraints

2006 ◽  
Vol 31 (3) ◽  
pp. 77-84
Author(s):  
Rabee M. Reffat
Keyword(s):  
Real Time ◽  
Virtual Environment ◽  
Architectural Design ◽  
Shared Responsibility ◽  
Design Studio ◽  
Teaching Model ◽  
Virtual Design ◽  
Alternative Teaching ◽  
3D Virtual Environment ◽  
Architectural Design Studio

This paper introduces an alternative teaching model in a virtual architectural design studio, its application, impacts and constraints. This model aims for achieving collaborative learning through facilitating students to Inhabit, Design, Construct and Evaluate (IDCE) their designs collaboratively in a multi-user real-time 3D virtual environment platform (Activeworlds). The application of this model in virtual design studio (VDS) teaching has favorably impacted students' motivation for active, creative and explorative learning, social dynamics between studio participants. It also fostered learning electronic communication, collaboration techniques and etiquette in addition to design technology. The model assisted in developing collaborative experience and shared responsibility. However, there are some drawbacks of the virtual environment platform that hindered having a responsive design environment to users' needs with especially in modeling and rate of viewing. The advantages and constraints of applying the IDCE teaching model in a multi-user real-time 3D virtual environment for first year students at the University of Sydney are addressed in this paper.

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