scholarly journals Integrated Polypyrrole Flexible Conductors for Biochips and MEMS Applications

2012 ◽  
Vol 2012 ◽  
pp. 1-5 ◽  
Author(s):  
Rakefet Ofek Almog ◽  
Hadar Ben-Yoav ◽  
Yelena Sverdlov ◽  
Tsvi Shmilovich ◽  
Slava Krylov ◽  
...  
Keyword(s):  
Cyclic Voltammetry ◽  
Aspect Ratio ◽  
Seed Layer ◽  
Conductive Polymer ◽  
Sensors And Actuators ◽  
Flexible Sensors ◽  
Planar Structures ◽  
Polymeric Substrates ◽  
Seed Layers ◽  
Structural Polymers

Integrated polypyrrole, a conductive polymer, interconnects on polymeric substrates were microfabricated for flexible sensors and actuators applications. It allows manufacturing of moving polymeric microcomponents suitable, for example, for micro-optical-electromechanical (MOEMS) systems or implanted sensors. This generic technology allows producing “all polymer” components where the polymers serve as both the structural and the actuating materials. In this paper we present two possible novel architectures that integrate polypyrrole conductors with other structural polymers: (a) polypyrrole embedded into flexible polydimethylsiloxane (PDMS) matrix forming high aspect ratio electrodes and (b) polypyrrole deposited on planar structures. Self-aligned polypyrrole electropolymerization was developed and demonstrated for conducting polymer lines on either gold or copper seed layers. The electropolymerization process, using cyclic voltammetry from an electrolyte containing the monomer, is described, as well as the devices’ characteristics. Finally, we discuss the effect of integrating conducting polymers with metal seed layer, thus enhancing the device durability and reliability.

Barrier and Seed Layers Deposition in TSV Using Magnetron Sputtering

2014 ◽  
Vol 543-547 ◽  
pp. 3951-3954
Author(s):  
Rui Dong Wang ◽  
Cong Chun Zhang ◽  
Gui Fu Ding ◽  
Yang Gao
Keyword(s):  
Thin Film ◽  
Aspect Ratio ◽  
Magnetron Sputtering ◽  
Seed Layer ◽  
Low Cost ◽  
Barrier Layers ◽  
Continuous Coverage ◽  
The Impact ◽  
3D Package ◽  
Seed Layers

This paper demonstrates the deposition of barrier layers and seed layers in TSV for 3D package. The high aspect ratio through silicon via sputtering process uses the magnetron-sputtering of Au. In order to achieve the continuous coverage of thin film on the sidewall and bottom of vertical microvias, the sputtering and anti-sputtering process was optimized. The impact of thickness of the seed layer and the gas pressure of the chamber on the coverage of the seed layers are discussed. The continuous seed layers and barrier layers on in the micro-vias with aspect ratio 3.5 can be achieved at low cost.

Multiwall carbon nanotubes: A review on synthesis and applications

2021 ◽  
Vol 11 ◽  
Author(s):  
Manisha Vijay Makwana ◽  
Ajay M Patel
Keyword(s):  
Carbon Nanotubes ◽  
Aspect Ratio ◽  
Arc Discharge ◽  
Multiwall Carbon Nanotubes ◽  
High Strength ◽  
Energy Storage And Conversion ◽  
Synthesis Methods ◽  
Mechanical And Thermal Properties ◽  
Nano Materials ◽  
Flexible Sensors

: MWCNTs are elongated cylindrical nanoobjects made of sp2 carbon. They have a diameter of 3–30 nm and can grow to be several centimetres long. Therefore, their aspect ratio can range between 10 to 10 million. Carbon nanotubes are the foundation of nanotechnology. It is an exceptionally fascinating material. CNTs possess excellent properties such as mechanical, electrical, thermal, high adsorption, outstanding stiffness, high strength and low density with a high aspect ratio. These properties can be useful in the fabrication of revolutionary smart nano materials. Demand for lighter and more robust nano materials in different applications of nanotechnology is increasing every day. Various synthesis techniques for the fabrication of MWCNTs, such as CVD, Arc discharge, flame synthesis, laser ablation, and spray pyrolysis, are discussed in this review article, as are their recent applications in a variety of significant fields. The first section presents a brief introduction of CNTs, then the descriptions of synthesis methods and various applications of MWCNTs in the field of energy storage and conversion, biomedical, water treatment, drug delivery, biosensors, bucky papers and resonance-based biosensors are introduced in the second section. Due to their improved electrical, mechanical, and thermal properties, MWCNTs have been extensively used in the manufacturing and deployment of flexible sensors.

Advanced barrier and seed layer deposition enabling multiple type of TSVs integration

2019 ◽  
Vol 2019 (DPC) ◽  
pp. 000077-000103
Author(s):  
Thierry Mourier ◽  
Mathilde Gottardi ◽  
Pierre-Emile Philip ◽  
Sophie Verrun ◽  
Gilles Romero ◽  
...  
Keyword(s):  
Aspect Ratio ◽  
Seed Layer ◽  
Process Development ◽  
High Density ◽  
Process Equipment ◽  
Integration Schemes ◽  
Step Coverage ◽  
Wide Range ◽  
Silicon Thickness ◽  
Very High

TSV integration is a key technology allowing heterogeneous devices 3D integration. However, depending on the targeted application, various TSV sizes and integration schemes exist, all requesting very high aspect ratio. The most common integration is the Mid-process TSV for which aspect ratio is required to be higher than 10:1 whatever application. In the case of large interposers, silicon thickness has to be increased to limit the deformation of the substrate due to highly stressed devices. Same requirements are made by photonic interposers which use thick SOI substrate leading to high warpage during integration. In the opposite, imagers requires to save silicon surface thus reduce TSV size and keep out zone. Silicon thickness has to be kept in the 100 μm range leading then the aspect ratio of the TSV to increase. Recently, Hybrid bonding progresses allowed a new type of TSV to be introduced : High Density TSVs for imagers. In this application, micrometer range TSV have to be filled with a Silicon thickness reduction limited to 10 μm by grinding process control. In order to allow the metal filling of all those type of structures, we have developed a highly conformal barrier and seed layer processes using standard materials for easier integration. The process is based on the use of MOCVD TiN as a barrier. This material is deposited using TDMAT precursor which allows low temperature deposition (200 °C)[1] which extends also the polyvalence of the process toward polymer bonded integrations. The very high step coverage of this process, reported at more than 30% in 20:1 aspect ratio coupled to high resistance to copper diffusion allows as thin as 20 nm barrier thickness which appears relevant economically (for deposition and CMP) and for stress consideration, compared to the well known but thicker PVD TaN process. Considering seed layer, the eG3D process[2] was brought to a high maturity allowing it to be integrated in an applied material raider tool coupled to TSV filling reactors. This process, based on electrografting of copper has already proved a step coverage of more than 50% in 12:1 aspect ratio structures. The presented work shows that the same process requires only deposition parameters change to be able to fully cover 10×150 μm Mid-process TSV as well as 1×10 μm High density ones. The excellent step coverage of this process allowed as thin as 200 nm (for 10×120 μm TSVs) and 100 nm (for (1×10 μm ones) deposited thicknesses to ensure perfect coverage of the structures. eG3D process also has the ability to be used as a repair process for non-continuous widely used PVD Cu seed layers but also be deposited directly on the barrier material. These 2 layers were evaluated together in a 300mm TSV integration schemes of both 10×120 mid process and 1×10 μm High Density structures and qualified electrically. The paper will discuss the deposition process development leading to simultaneously allow copper filling of the very wide range of TSVs on the same process equipment and using the same chemicals. We will then present integration results as well as electrical test of TSV daisy chains of both mid and High density TSVs showing excellent yield for all TSV size and integration schemes.

Thickness effect of sputtered ZnO seed layer on the fabrication of ZnO nanorods on flexible polyimide films and their ethanol gas sensing properties

2011 ◽  
Vol 1303 ◽  
Author(s):  
Hosang Ahn ◽  
Seon-Bae Kim ◽  
Dong-Joo Kim
Keyword(s):  
Seed Layer ◽  
Flexible Substrate ◽  
Zno Nanorods ◽  
Debye Length ◽  
Morphological Characteristics ◽  
Gas Absorption ◽  
Thickness Effect ◽  
Nitrate Hexahydrate ◽  
Zno Nanostructures ◽  
Seed Layers

ABSTRACTControlled ZnO nanostructures were grown on a flexible substrate for the future development of smart sensing tags. Thermolysis-assisted chemical solution deposition was used to grow ZnO nanorods at 85°C from 0.01mol of Zinc nitrate hexahydrate and HMT (Hexamethyltetramine) solution. To promote and modulate the ZnO nanorods, R.F. sputtered ZnO seed layers were deposited on polyimide substrates at various film thicknesses in the range of 8 to 160 nm. The optimum processing conditions to fabricate ZnO nanostructures have been investigated to examine the growth behaviors and to correlate the process parameters with the morphological characteristics. When the ethanol gas sensitivities were measured at different thickness of ZnO seed layers before growing ZnO nanorods, the highest sensitivity was obtained at 40 nm thick ZnO film at 300°C where the film thickness is similar to the Debye length. When ZnO nanorods were grown on such a ZnO seed layer, the sensitivities were more heavily influenced by the ZnO nanostructures rather than the thickness of the seed layer probably due to the dominant proportion of carrier density involved with the gas absorption.

scholarly journals Seedless Hydrothermal Growth of ZnO Nanorods as a Promising Route for Flexible Tactile Sensors

Nanomaterials ◽  
2020 ◽  
Vol 10 (5) ◽  
pp. 977
Author(s):  
Ilaria Cesini ◽  
Magdalena Kowalczyk ◽  
Alessandro Lucantonio ◽  
Giacomo D’Alesio ◽  
Pramod Kumar ◽  
...  
Keyword(s):  
Finite Element ◽  
Aspect Ratio ◽  
Growth Temperature ◽  
Zno Nanorods ◽  
Tactile Sensor ◽  
Hydrothermal Growth ◽  
Tactile Sensors ◽  
Polyimide Substrate ◽  
Vertically Aligned ◽  
Seed Layers

Hydrothermal growth of ZnO nanorods has been widely used for the development of tactile sensors, with the aid of ZnO seed layers, favoring the growth of dense and vertically aligned nanorods. However, seed layers represent an additional fabrication step in the sensor design. In this study, a seedless hydrothermal growth of ZnO nanorods was carried out on Au-coated Si and polyimide substrates. The effects of both the Au morphology and the growth temperature on the characteristics of the nanorods were investigated, finding that smaller Au grains produced tilted rods, while larger grains provided vertical rods. Highly dense and high-aspect-ratio nanorods with hexagonal prismatic shape were obtained at 75 °C and 85 °C, while pyramid-like rods were grown when the temperature was set to 95 °C. Finite-element simulations demonstrated that prismatic rods produce higher voltage responses than the pyramid-shaped ones. A tactile sensor, with an active area of 1 cm2, was fabricated on flexible polyimide substrate and embedding the nanorods forest in a polydimethylsiloxane matrix as a separation layer between the bottom and the top Au electrodes. The prototype showed clear responses upon applied loads of 2–4 N and vibrations over frequencies in the range of 20–800 Hz.

Effect of Hydrothermal Solutions on Optical and Electrical Properties of ZnO Nanowires Grown on a ZnO:Al Seed Layer for Improved Mechanical Performance

2020 ◽  
Vol 15 (3) ◽  
pp. 307-315
Author(s):  
H. Tugral Arslan ◽  
Cuneyt Arslan ◽  
N. Baydogan
Keyword(s):  
Seed Layer ◽  
Mechanical Performance ◽  
Sol Gel ◽  
Soda Lime ◽  
Zinc Nitrate ◽  
Zno Nanowires ◽  
Hydrothermal Growth ◽  
Optimal Size ◽  
Zno Nanowire ◽  
Seed Layers

ZnO nanowire arrays were fabricated by hydrothermal growth on Al-doped ZnO (ZnO:Al) seed layers coated on soda-lime silicate glass by sol–gel coating. The properties of the ZnO:Al seed layer were evaluated to obtain ZnO nanowires with the optimal size and length and to realize suitable adhesion of the ZnO:Al grains to the substrate. The optimal mechanical performance (adhesion and abrasion resistance) of the ZnO:Al seed layer was obtained at Al 1 at.%. The seed layers annealed between 400 and 500 C exhibited enhanced ZnO nanowire growth. Increasing the annealing temperature within this range improved the electrical and optical properties of the nanowires. Additionally, two chemical compounds, zinc acetate (ZA) and zinc nitrate (ZN), were used to compare the effects of the solution type on the hydrothermal growth. The nanowires grown in the ZA solution were thicker and had higher electrical conductivity compared to the ZN solution. The gamma transmission technique was used to determine the agglomeration of ZnO:Al nanospheres and to examine the crystallite size and density of the ZnO:Al seed layers.

Through-Silicon-Via Copper Deposition for Vertical Chip Integration

2006 ◽  
Vol 970 ◽  
Author(s):  
Bioh Kim
Keyword(s):  
Aspect Ratio ◽  
High Aspect Ratio ◽  
Seed Layer ◽  
Copper Deposition ◽  
Process Conditions ◽  
Through Silicon Via ◽  
3D Packaging ◽  
Wafer Thinning ◽  
The Impact ◽  
Deposition Conditions

ABSTRACTConsumers are demanding smaller, lighter electronic devices with higher performance and more features. The continuous pressure to reduce size, weight, and cost, while increasing the functionality of portable products, has created innovative, cost-effective 3D packaging concepts. Among all kinds of 3D packaging techniques, through-silicon-via (TSV) electrodes can provide vertical connections that are the shortest and most plentiful with several benefits (1). Connection lengths can be as short as the thickness of a chip. High density, high aspect ratio connections are available. TSV interconnections also overcome the RC delays and reduce power consumption by bringing out-of-plane logic blocks much closer electrically.The technologies engaged with TSV chip connection include TSV formation, insulator/barrier/seed deposition, via filling, surface copper removal, wafer thinning, bonding/stacking, inspection, test, etc. Process robustness and speed of copper deposition are among the most important technologies to realize TSV chip integration. There are generally three types of via filling processes; lining along the sidewall of vias, full filling within vias, and full filling with stud formation above the via. Here, the stud works as a mini-bump for solder bonding. Two methodologies have been generally adopted for via filling process; (a) via-first approach : blind-via filling with 3-dimensional seed layer, followed by wafer thinning and (b) thinning-first approach : through-via filling with 2-dimensional seed layer at the wafer bottom after wafer thinning. Currently, the first approach is more popular than the second approach due to difficulty in handling and plating thinned wafers (2).We examined the impact of varying deposition conditions on the overall filling capability within high aspect ratio, deep, blind vias. We tested the impacts of seed layer conformality, surface wettablity, bath composition (organic and inorganic components), waveform (direct current, pulse current, and pulse reverse current), current density, flow conditions, etc. Most deposition conditions affected the filling capability and profile to some extent. We found that reducing current crowding at the via mouth and mass transfer limitation at the via bottom is critical in achieving a super-conformal filling profile. This condition can be only achieved with a proper combination of aforementioned process conditions. With optimized conditions, we can repeatedly achieve void-free, bottom-up filling with various via sizes (5-40μm in width and 25-150μm in depth).

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