scholarly journals -81dB PSRR regulated cascode fully MOS bandgap reference for power management in RF energy harvesting systems

2019 ◽  
Vol 14 (2) ◽  
pp. 706
Author(s):  
M. K.Zulkalnain ◽  
N. A.Kamsani ◽  
R. M.Sidek ◽  
F. Z.Rokhani ◽  
S. J.Hashim ◽  
...  
Keyword(s):  
Power Management ◽  
Clean Energy ◽  
Cmos Technology ◽  
Low Noise ◽  
Noise Power ◽  
Threshold Region ◽  
Bandgap Reference ◽  
Main Challenge ◽  
Harvesting Systems ◽  
Iot Devices

In the midst of technological advance where everything is connected via the internet, IoT is emerging as a potential solution to everything, ranging from health wearables to smart city. An RFEH power management system has promising benefits that could further improve the powering of IoT devices as it has potential for clean energy as well as other advantages which consists of a rectifier, bandgap reference and LDO as the main core. However, the main challenge is supplying clean and low noise power to sensitive circuits such as low power sensors, VCOs and PLLs. A high PSRR bandgap reference that rejects noise at the power supply is needed so that the circuitry powered by RFEH systems would be able to function properly. This paper presents a bandgap with MOS PTAT and CTAT extraction achieving a PSRR of -81dB at a V<sub>ref</sub> of 0.415V was designed on 130nm CMOS technology targeting IoT RFEH devices that operate at sub-threshold and near-threshold region that exhibits improvement over the base design.

scholarly journals Noise Efficient Integrated Amplifier Designs for Biomedical Applications

Electronics ◽  
2021 ◽  
Vol 10 (13) ◽  
pp. 1522
Author(s):  
Sebastian Simmich ◽  
Andreas Bahr ◽  
Robert Rieger
Keyword(s):  
Cmos Technology ◽  
Low Noise ◽  
Noise Power ◽  
Neural Signals ◽  
Monolithically Integrated ◽  
Noise Current ◽  
Current Consumption ◽  
Recent Developments ◽  
Amplifier Design ◽  
Commercial Applications

The recording of neural signals with small monolithically integrated amplifiers is of high interest in research as well as in commercial applications, where it is common to acquire 100 or more channels in parallel. This paper reviews the recent developments in low-noise biomedical amplifier design based on CMOS technology, including lateral bipolar devices. Seven major circuit topology categories are identified and analyzed on a per-channel basis in terms of their noise-efficiency factor (NEF), input-referred absolute noise, current consumption, and area. A historical trend towards lower NEF is observed whilst absolute noise power and current consumption exhibit a widespread over more than five orders of magnitude. The performance of lateral bipolar transistors as amplifier input devices is examined by transistor-level simulations and measurements from five different prototype designs fabricated in 180 nm and 350 nm CMOS technology. The lowest measured noise floor is 9.9 nV/√Hz with a 10 µA bias current, which results in a NEF of 1.2.

A low power bandgap reference with buffer working in the sub-threshold region for energy harvesting systems

2009 ◽  
Vol 30 (7) ◽  
pp. 075014 ◽  
Author(s):  
Jia Chen ◽  
Hao Wenhan ◽  
Chen Hong ◽  
Zhang Chun ◽  
Wang Zhihua
Keyword(s):  
Energy Harvesting ◽  
Low Power ◽  
Threshold Region ◽  
Bandgap Reference ◽  
Harvesting Systems

scholarly journals An 8–12.5-GHz LC PLL with Dual VCO and Noise-Reduced LDO Regulator for Multilane Multiprotocol SerDes in 28-nm CMOS Technology

Electronics ◽  
2021 ◽  
Vol 10 (14) ◽  
pp. 1686
Author(s):  
Jian Chen ◽  
Wei Zhang ◽  
Qingqing Sun ◽  
Lizheng Liu
Keyword(s):  
Tuning Range ◽  
Frequency Tuning ◽  
Cmos Technology ◽  
Low Noise ◽  
Oxide Semiconductor ◽  
Noise Power ◽  
Voltage Controlled Oscillator ◽  
Serial Link ◽  
Ldo Regulator ◽  
28 Nm

This study presents an inductance capacitance (LC) phase-locked loop (PLL) with a dual voltage-controlled oscillator (VCO) and a noise-reduced low-dropout (LDO) regulator, which was used in four-lane multiprotocol serial link applications. The dual VCO architecture can increase the total frequency-tuning range to ensure that the LC PLL achieves multiprotocol serial link coverage from 8 to 12.5 Gbps. Two switch capacitor array-based LC VCOs have a large frequency-tuning range and small VCO gain. The noise-reduced LDO regulator provides a very low-noise power supply to the VCO. The active area occupied by the proposed LC PLL in UMC 28-nm 1P10M complementary metal–oxide–semiconductor (CMOS) technology is 0.25 mm2. The phase noise of the VCO at 1 MHz is −108.1 dBc/Hz. The power consumption of the LC PLL with a 1.8-V supply is 16.5 mW.

A 0.55 V Bandgap Reference with a 59 ppm/°C Temperature Coefficient

2019 ◽  
Vol 28 (07) ◽  
pp. 1950120 ◽  
Author(s):  
R. Nagulapalli ◽  
K. Hayatleh ◽  
S. Barker ◽  
A. A. Tammam ◽  
P. Georgiou ◽  
...  
Keyword(s):  
Temperature Coefficient ◽  
Low Voltage ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Absolute Temperature ◽  
Threshold Region ◽  
Bandgap Reference ◽  
Na Current ◽  
Mos Transistor ◽  
Self Bias

This paper presents a novel low power, low voltage CMOS bandgap reference (BGR) that overcomes the problems with the existing BJT-based reference circuits by using a MOS transistor operating in sub-threshold region. A proportional to absolute temperature (PTAT) voltage is generated by exploiting the self-bias cascode branch, while a Complementary to Absolute Temperature (CTAT) voltage is generated by using the threshold voltage of the transistor. The proposed circuit is implemented in 65[Formula: see text]nm CMOS technology. Post-layout simulation results show that the proposed circuit works with a supply voltage of 0.55[Formula: see text]V, and generates a 286[Formula: see text]mV reference voltage with a temperature coefficient of 59[Formula: see text]ppm/∘C. The circuit takes 413[Formula: see text]nA current from 0.55[Formula: see text]V supply and occupies 0.00986[Formula: see text]mm2 of active area.

Information and Communication Technologies (ICTs) for Inclusive Human Development: A Review

2017 ◽  
Vol 6 (10) ◽  
pp. 130 ◽  
Author(s):  
Rakesh Kumar Gulati ◽  
Manveen Kaur
Keyword(s):  
Human Development ◽  
Information And Communication Technologies ◽  
Rural Areas ◽  
New Technologies ◽  
Clean Energy ◽  
Geographic Area ◽  
Cognitive Responses ◽  
Information And Communications Technologies ◽  
Main Challenge ◽  
Work Family

Information and Communications Technologies (ICTs) adoption is increasing globally for human development because of its potential affect in many aspects of economic and societal activities such as GDP growth, employment, productivity, poverty alleviation, quality of life, education, clean water and sanitation, clean energy, and healthcare. Adoption of new technologies has been the main challenge in rural areas and is the main reason for the growing gap between rural and urban economy. The work related ICT use have also yielded mixed results; some studies show the individual’s perceived work-family conflict, negative cognitive responses e.g. techno stress while others show increased productivity, improved job satisfaction and work-family balance due to flexible work timings. This paper attempts to understand the role of ICT in human development areas of health, education and citizen empowerment taking into consideration of digital divide which exists in geographic area and within the communities through literature review.

scholarly journals Spectrum Based Power Management for Congested IoT Networks

Sensors ◽  
2021 ◽  
Vol 21 (8) ◽  
pp. 2681
Author(s):  
Kedir Mamo Besher ◽  
Juan Ivan Nieto-Hipolito ◽  
Raymundo Buenrostro-Mariscal ◽  
Mohammed Zamshed Ali
Keyword(s):  
Power Management ◽  
Network Performance ◽  
Channel Allocation ◽  
Battery Life ◽  
Packet Routing ◽  
Data Packets ◽  
Increasing Demand ◽  
Iot Devices ◽  
Set Up

With constantly increasing demand in connected society Internet of Things (IoT) network is frequently becoming congested. IoT sensor devices lose more power while transmitting data through congested IoT networks. Currently, in most scenarios, the distributed IoT devices in use have no effective spectrum based power management, and have no guarantee of a long term battery life while transmitting data through congested IoT networks. This puts user information at risk, which could lead to loss of important information in communication. In this paper, we studied the extra power consumed due to retransmission of IoT data packet and bad communication channel management in a congested IoT network. We propose a spectrum based power management solution that scans channel conditions when needed and utilizes the lowest congested channel for IoT packet routing. It also effectively measured power consumed in idle, connected, paging and synchronization status of a standard IoT device in a congested IoT network. In our proposed solution, a Freescale Freedom Development Board (FREDEVPLA) is used for managing channel related parameters. While supervising the congestion level and coordinating channel allocation at the FREDEVPLA level, our system configures MAC and Physical layer of IoT devices such that it provides the outstanding power utilization based on the operating network in connected mode compared to the basic IoT standard. A model has been set up and tested using freescale launchpads. Test data show that battery life of IoT devices using proposed spectrum based power management increases by at least 30% more than non-spectrum based power management methods embedded within IoT devices itself. Finally, we compared our results with the basic IoT standard, IEEE802.15.4. Furthermore, the proposed system saves lot of memory for IoT devices, improves overall IoT network performance, and above all, decrease the risk of losing data packets in communication. The detail analysis in this paper also opens up multiple avenues for further research in future use of channel scanning by FREDEVPLA board.

60 GHz-Band Low-Noise Amplifier

2017 ◽  
Vol 26 (05) ◽  
pp. 1750075 ◽  
Author(s):  
Najam Muhammad Amin ◽  
Lianfeng Shen ◽  
Zhi-Gong Wang ◽  
Muhammad Ovais Akhter ◽  
Muhammad Tariq Afridi
Keyword(s):  
Transmission Line ◽  
Quality Factor ◽  
Noise Figure ◽  
Cmos Technology ◽  
Low Noise ◽  
Constant Current ◽  
60 Ghz ◽  
Frequency Range ◽  
Constant Current Density ◽  
Chip Area

This paper presents the design of a 60[Formula: see text]GHz-band LNA intended for the 63.72–65.88[Formula: see text]GHz frequency range (channel-4 of the 60[Formula: see text]GHz band). The LNA is designed in a 65-nm CMOS technology and the design methodology is based on a constant-current-density biasing scheme. Prior to designing the LNA, a detailed investigation into the transistor and passives performances at millimeter-wave (MMW) frequencies is carried out. It is shown that biasing the transistors for an optimum noise figure performance does not degrade their power gain significantly. Furthermore, three potential inductive transmission line candidates, based on coplanar waveguide (CPW) and microstrip line (MSL) structures, have been considered to realize the MMW interconnects. Electromagnetic (EM) simulations have been performed to design and compare the performances of these inductive lines. It is shown that the inductive quality factor of a CPW-based inductive transmission line ([Formula: see text] is more than 3.4 times higher than its MSL counterpart @ 65[Formula: see text]GHz. A CPW structure, with an optimized ground-equalizing metal strip density to achieve the highest inductive quality factor, is therefore a preferred choice for the design of MMW interconnects, compared to an MSL. The LNA achieves a measured forward gain of [Formula: see text][Formula: see text]dB with good input and output impedance matching of better than [Formula: see text][Formula: see text]dB in the desired frequency range. Covering a chip area of 1256[Formula: see text][Formula: see text]m[Formula: see text]m including the pads, the LNA dissipates a power of only 16.2[Formula: see text]mW.

scholarly journals Design of an Ultra-Low Voltage Bias Current Generator Highly Immune to Electromagnetic Interference

2021 ◽  
Vol 11 (1) ◽  
pp. 6
Author(s):  
Orazio Aiello
Keyword(s):  
Integrated Circuits ◽  
Electromagnetic Interference ◽  
Low Voltage ◽  
Current Source ◽  
Building Blocks ◽  
Cmos Technology ◽  
Threshold Region ◽  
Output Current ◽  
Current Generator ◽  
Technology Process

The paper deals with the immunity to Electromagnetic Interference (EMI) of the current source for Ultra-Low-Voltage Integrated Circuits (ICs). Based on the properties of IC building blocks, such as the current-splitter and current correlator, a novel current generator is conceived. The proposed solution is suitable to provide currents to ICs operating in the sub-threshold region even in the presence of an electromagnetic polluted environment. The immunity to EMI of the proposed solution is compared with that of a conventional current mirror and evaluated by analytic means and with reference to the 180 nm CMOS technology process. The analysis highlights how the proposed solution generates currents down to nano-ampere intrinsically robust to the Radio Frequency (RF) interference affecting the input of the current generator, differently to what happens to the output current of a conventional mirror under the same conditions.

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