Spin-on Gate Dielectric Materials for Next Generation Display Systems

2006 ◽  
Vol 936 ◽  
Author(s):  
Jinghong Chen ◽  
Mehari Stifanos ◽  
Jan Nedbal ◽  
Ahila Krishnamoorthy ◽  
Emma Brouk ◽  
...  

ABSTRACTWe present recent advances on spin-on polymers as gate dielectric for thin film transistors. We have developed film type I with significantly improved dielectric properties. At a curing temperature of 250 °C, the dielectric constant is 3.46, the breakdown voltage is 4.10 MV/cm at 1 μA/cm2, the leakage current is 4.9 × 10−8 A/cm2 at 2.5 MV/cm, and the CV hysteresis is 3.4 V. At a curing temperature of 425 °C, the dielectric constant, the breakdown voltage, the leakage current, and the CV hysteresis are 3.2, 4.73 MV/cm, 2.6 × 10−8 A/cm2, and 0.44 V respectively.

RSC Advances ◽  
2017 ◽  
Vol 7 (78) ◽  
pp. 49353-49360 ◽  
Author(s):  
Jenner H. L. Ngai ◽  
Johnny K. W. Ho ◽  
Rocky K. H. Chan ◽  
S. H. Cheung ◽  
Louis M. Leung ◽  
...  

Micron-size organolead perovskite crystals grown on insulating polymeric surfaces as gate dielectric materials for high performance thin film transistors.


2007 ◽  
Vol 989 ◽  
Author(s):  
Maryam Moradi ◽  
D. Striakhilev ◽  
I. Chan ◽  
A. Nathan ◽  
N. I. Cho ◽  
...  

AbstractIn this work, we have conducted a systematic investigation of leakage current and electrical breakdown of plasma enhanced chemical vapor deposited (PECVD) silicon nitride, both for planar films and deposited films on the vertical sidewall for the application of the vertical thin film transistors. The thickness evolution of physical properties and electrical characteristics of silicon nitride films in the range of 50 to 300 nm are investigated. Electrical breakdown strength for 150-300nm thick films was approximately 7 MV/cm, whereas the value dropped to ~3MV/cm for 50nm thick films deposited under the same process conditions. It is shown that the early failure of the thin nitride is accompanied by the increase of the pinholes number. For the vertical thin film transistors, the experimental result shows the reliability and leakage current of the gate dielectric depends on the step coverage of the silicon nitride film on the vertical sidewall.


2012 ◽  
Vol 1467 ◽  
Author(s):  
James G. Grote ◽  
Fahima Ouchen ◽  
Donna M. Joyce ◽  
Kristi M. Singh ◽  
Narayanan Venkat ◽  
...  

ABSTRACTThe potential of bio-dielectrics for thin film transistor applications was explored via the incorporation of titanium dioxide (TiO2) nanoparticles, rutile form, a high dielectric constant (ε) ceramic, in the deoxyribonucleic acid (DNA) bio-polymer. The DNA-ceramic hybrid films were fabricated from stable suspensions of the TiO2 nanoparticles in viscous, aqueous DNA solutions. Dielectric characterization revealed that the incorporation of TiO2 in DNA resulted in enhanced dielectric constant (14.3 at 1 kHz for 40 wt % TiO2) relative to that of DNA in the entire frequency range of 1 kHz-1 MHz. Variable temperature dielectric measurements, in the 20-80°C range, of the DNA-TiO2 films revealed that the ceramic additive stabilizes DNA against large temperature dependent variations in both ε and the dielectric loss factor tan δ. The bulk resistivity of the DNA-TiO2 hybrid films was measured to be two to three orders of magnitude higher than that of the control DNA films, indicating their potential for utilization as insulating dielectrics in transistor and capacitor applications.


2011 ◽  
Vol 58 (3) ◽  
pp. 487-491 ◽  
Author(s):  
Eui-Jung Yun ◽  
Young-Wook Song ◽  
Hyoung G. Nam ◽  
Nam-Ihn Cho ◽  
Myunghee Jung

RSC Advances ◽  
2019 ◽  
Vol 9 (46) ◽  
pp. 27117-27124
Author(s):  
Zhuo Chen ◽  
Linfeng Lan ◽  
Junbiao Peng

Low-temperature giant-dielectric-constant thin films (In0.0025Nb0.0025Ti0.995O2) fabricated with RF sputtering are employed as the dielectrics for IZO-TFTs.


2011 ◽  
Vol 20 (01) ◽  
pp. 171-182 ◽  
Author(s):  
BURHAN BAYRAKTAROGLU ◽  
KEVIN LEEDY ◽  
ROBERT NEIDHARD

In this study, nc - ZnO films deposited in a Pulsed Laser Deposition (PLD) system at various temperatures were used to fabricate high performance transistors. As determined by Transmission Electron Microscope (TEM) images, nc - ZnO films deposited at a temperature range of 25°C to 400°C were made of closely packed nanocolums showing strong orientation. The influences of film growth temperature and post growth annealing on device performance were investigated. Various gate dielectric materials, including SiO 2, Al 2 O 3, and HfO 2 were shown to be suitable for high performance device applications. Bottom-gate FETs fabricated on high resistivity (>2000 ohm-cm) Si substrates demonstrated record DC and high speed performance of any thin film transistors. Drain current on/off ratios better than 1012 and sub-threshold voltage swing values of less than 100mV/decade could be obtained. Devices with 2μm gate lengths produced exceptionally high current densities of >750mA/mm. Shorter gate length devices (LG=1.2μm) had current and power gain cut-off frequencies, f T and f max , of 2.9GHz and 10GHz, respectively.


Coatings ◽  
2020 ◽  
Vol 10 (7) ◽  
pp. 698
Author(s):  
Junan Xie ◽  
Zhennan Zhu ◽  
Hong Tao ◽  
Shangxiong Zhou ◽  
Zhihao Liang ◽  
...  

The high dielectric constant ZrO2, as one of the most promising gate dielectric materials for next generation semiconductor device, is expected to be introduced as a new high k dielectric layer to replace the traditional SiO2 gate dielectric. The electrical properties of ZrO2 films prepared by various deposition methods and the main methods to improve their electrical properties are introduced, including doping of nonmetal elements, metal doping design of pseudo-binary alloy system, new stacking structure, coupling with organic materials and utilization of crystalline ZrO2 as well as optimization of low-temperature solution process. The applications of ZrO2 and its composite thin film materials in metal oxide semiconductor field effect transistor (MOSFET) and thin film transistors (TFTs) with low power consumption and high performance are prospected.


2015 ◽  
Vol 2015 ◽  
pp. 1-6 ◽  
Author(s):  
Yu-Hsien Lin ◽  
Jay-Chi Chou

We investigated amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs) using different high-k gate dielectric materials such as silicon nitride (Si3N4) and aluminum oxide (Al2O3) at low temperature process (<300°C) and compared them with low temperature silicon dioxide (SiO2). The IGZO device with high-k gate dielectric material will expect to get high gate capacitance density to induce large amount of channel carrier and generate the higher drive current. In addition, for the integrating process of integrating IGZO device, postannealing treatment is an essential process for completing the process. The chemical reaction of the high-k/IGZO interface due to heat formation in high-k/IGZO materials results in reliability issue. We also used the voltage stress for testing the reliability for the device with different high-k gate dielectric materials and explained the interface effect by charge band diagram.


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