Techniques for Localization of IC Interconnection Defects

2002 ◽  
Vol 716 ◽  
Author(s):  
Edward I. Cole
Keyword(s):  
Integrated Circuit ◽  
Constant Current ◽  
Induced Voltage ◽  
Contrast Imaging ◽  
Thermally Induced ◽  
Imaging Results ◽  
Starting Point ◽  
Site Localization ◽  
Scanning Optical Microscopy ◽  
Failure Site

AbstractThe advances in integrated circuit technology has made failure site localization extremely challenging. Charge-Induced Voltage Alteration (CIVA), Low Energy CIVA (LECIVA), Light-Induced Voltage Alteration (LIVA), Seebeck Effect Imaging (SEI) and Thermally-Induced Voltage Alteration (TIVA) are five recently developed failure analysis techniques which meet the challenge by rapidly and non-destructively localizing interconnection defects on ICs. The techniques take advantage of voltage fluctuations in a constant current power supply as an electron or photon beam is scanned across an IC. CIVA and LECIVA are scanning electron microscopy (SEM) techniques that yield rapid localization of open interconnections. LIVA is a scanning optical microscopy (SOM) method that yields quick identification of damaged semiconductor junctions and determines transistor logic states. SEI and TIVA are SOM techniques that rapidly localize open interconnections and shorts respectively. LIVA, SEI, and TIVA can be performed from the backside of ICs by using the proper photon wavelength. CIVA, LECIVA, LIVA, TIVA, and SEI techniques in terms of the physics of signal generation, data acquisition system required, and imaging results displaying the utility of each technique for localizing interconnection defects. In addition to the techniques listed above, the Resistive Contrast Imaging (RCI) for localizing opens on metal test patterns will be described as a starting point for the “IVA” technologies.

Scanning Optical Microscopy Application in Micron® Memory Devices

2005 ◽  
Author(s):  
Wong Yaw Yuan ◽  
T.L. Edmund Poh ◽  
David Lam
Keyword(s):  
Failure Analysis ◽  
Integrated Circuit ◽  
Semiconductor Industry ◽  
Fault Isolation ◽  
Memory Devices ◽  
Back Side ◽  
Induced Voltage ◽  
Scanning Optical Microscopy ◽  
Side Emission ◽  
Complex Circuits

Abstract The migration to smaller geometries has translated to an increase in the number of transistors possible in each integrated circuit. Failure analysis of such complex circuits presents a major challenge to the semiconductor industry and is a driving force behind the considerable interest in nondestructive, cost-efficient, “shortcut” fault isolation techniques. In this paper, we present the application of thermal-induced voltage alteration (TIVA) for failure analysis of 0.11µm technology memory devices and demonstrate the key aspects of this technique. The back side TIVA results are compared with analysis performed using back side emission microscopy (EMMI), and the limitations of EMMI are highlighted. The advantages and limitations of the TIVA technique are also discussed.

Laser Based Defect Localization for the Failure Analysis of Advanced Product

2006 ◽  
Author(s):  
W.Y. Cheng ◽  
T.Y. Chiu ◽  
Jon C. Lee ◽  
J.Y. Chiou
Keyword(s):  
Failure Analysis ◽  
Laser Scanning ◽  
Failure Modes ◽  
Induced Voltage ◽  
Resistance Change ◽  
Thermally Induced ◽  
Defect Localization ◽  
Defect Isolation ◽  
Site Localization ◽  
Selection Of

Abstract Emission microscopy have been used for failure analysis (FA) defect isolation. But for advanced products, the working voltage of chip is getting smaller, thus many emission spots from normal transistors will be observed, which indeed affects the judgment on the emission spots from killer defects and increases the FA difficulty. Laser scanning microscope (LSM)-based techniques have been powerful defect isolation methods for many years. In this study, Checkpoint Infrascan 200TD, a laser-based tool, is used to perform defect localization. Here, thermally induced voltage alteration and optical beam induced resistance change are used to get defect locations. The study demonstrates three FA cases with 80nm/90nm technologies; metal direct short, poly leakage, and contact high resistance are also found in these cases. It is concluded that, by the selection of control parameters, Infrascan 200TD provides several capabilities of failure site localization and can be applied to different failure modes.

scholarly journals Application of TIVA in Design Debug

2000 ◽  
Author(s):  
Siva Kolachina ◽  
Bill Taylor ◽  
Kendall Scott Wills ◽  
Edward I. Cole
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Ion Beam ◽  
Ring Oscillator ◽  
Induced Voltage ◽  
Thermally Induced ◽  
Isolation Techniques ◽  
Limited Success ◽  
Focussed Ion Beam ◽  
Design Debugging

Abstract Thermally-Induced Voltage Alteration (TIVA) is a relatively new technique for locating electrical defects in integrated circuits [1,2]. This paper describes a novel application of TIVA, to locate design anomalies. A newly designed integrated circuit with high and inconsistent Quiescent Power Supply Current (IDDQ) was initially diagnosed with limited success using various failsite isolation techniques. The TIVA technique was successful in accurately locating design anomalies. Results from TIVA identified a spurious ring oscillator in the design. Design modifications carried out using a focussed ion beam (FIB), verified the accuracy of the results from TIVA. This study clearly extends the use of TIVA beyond that of locating electrical defects and anomalies into the realm of design debugging.

scholarly journals New Current-Mode Integrated Ternary Min/Max Circuits without Constant Independent Current Sources

2015 ◽  
Vol 2015 ◽  
pp. 1-11 ◽  
Author(s):  
Mona Moradi ◽  
Reza Faghih Mirzaee ◽  
Keivan Navi
Keyword(s):  
Integrated Circuit ◽  
Power Dissipation ◽  
Field Effect Transistors ◽  
Current Source ◽  
Integrated Design ◽  
Current Mode ◽  
Constant Current ◽  
Constant Current Source ◽  
Static Power ◽  
Current Flows

Novel designs of current-mode Ternary minimum (AND) and maximum (OR) are proposed in this paper based on Carbon NanoTube Field Effect Transistors (CNTFET). First, these Ternary operators are designed separately. Then, they are combined together in order to generate both outputs concurrently in an integrated design. This integration results in the elimination of common parts when both functions are required at the same time. The third proposed current-mode integrated circuit generates both ternary operators with the usage of only 30 transistors. The new designs are composed of three main parts: (1) the part which converts current to voltage; (2) threshold detectors; and (3) the parallel paths through which the output current flows. Unlike the previously presented structure, there is no need for any constant current source within the new designs. This elimination leads to less static power dissipation. The second proposed current-mode segregated Ternary minimum operates 43% faster and consumes 40% less power in comparison with a previously presented structure.

Thermal fluid-structure interaction of PCB configurations during the wave soldering process

2015 ◽  
Vol 27 (1) ◽  
pp. 31-44 ◽  
Author(s):  
M.S. Abdul Aziz ◽  
M.Z. Abdullah ◽  
C.Y. Khor
Keyword(s):  
Integrated Circuit ◽  
Printed Circuit Boards ◽  
Molten Solder ◽  
Circuit Boards ◽  
Fluid Structure ◽  
Content Type ◽  
Thermally Induced ◽  
C Language ◽  
Soldering Process ◽  
Wave Soldering

Purpose – This paper aims to investigate the thermal fluid–structure interactions (FSIs) of printed circuit boards (PCBs) at different component configurations during the wave soldering process and experimental validation. Design/methodology/approach – The thermally induced displacement and stress on the PCB and its components are the foci of this study. Finite volume solver FLUENT and finite element solver ABAQUS, coupled with a mesh-based parallel code coupling interface, were utilized to perform the analysis. A sound card PCB (138 × 85 × 1.5 mm3), consisting of a transistor, diode, capacitor, connector and integrated circuit package, was built and meshed by using computational fluid dynamics pre-processing software. The volume of fluid technique with the second-order upwind scheme was applied to track the molten solder. C language was utilized to write the user-defined functions of the thermal profile. The structural solver analyzed the temperature distribution, displacement and stress of the PCB and its components. The predicted temperature was validated by the experimental results. Findings – Different PCB component configurations resulted in different temperature distributions, thermally induced stresses and displacements to the PCB and its components. Results show that PCB component configurations significantly influence the PCB and yield unfavorable deformation and stress. Practical implications – This study provides PCB designers with a profound understanding of the thermal FSI phenomenon of the process control during wave soldering in the microelectronics industry. Originality/value – This study provides useful guidelines and references by extending the understanding on the thermal FSI behavior of molten solder for PCBs. This study also explores the behaviors and influences of PCB components at different configurations during the wave soldering process.

A Security UV Curing Device Based on LED Array

2014 ◽  
Vol 1037 ◽  
pp. 152-155
Author(s):  
Chuan Mei Bao ◽  
Chang Liang Liu ◽  
Chun Jun Li ◽  
Gu Chang Wang ◽  
Fei Gao ◽  
...  
Keyword(s):  
Signal Processing ◽  
Human Body ◽  
Integrated Circuit ◽  
Uv Curing ◽  
Constant Current ◽  
Constant Voltage ◽  
Pyroelectric Sensor ◽  
Uv Led ◽  
Led Array ◽  
Processing Signal

The study mentioned a curing equipment with UV LED array based on pyroelectric sensor and AP3706, which is based on the primary side control circuit so that it can complete the LED array constant voltage constant current output.the light source drive can output the constant voltage and constant current. The sensing signal processing signal integrated circuit BISS0001 as the pyroelectric sensor amplifier circuit as core, with relay making up the protection module of curing device. The experimental results show that, the curing equipment can realize the stable and homogeneous UV output, and when a human body in front of LED, the array will disabled to keep the human body away from damage UV induced.

Annular Illumination and Collection in Solid Immersion

2009 ◽  
Author(s):  
Stephen Bradley Ippolito ◽  
Hirotoshi Terada
Keyword(s):  
Optical Microscopy ◽  
Integrated Circuit ◽  
Angular Spectrum ◽  
Optical Microscope ◽  
Circuit Analysis ◽  
Confocal Scanning ◽  
Scanning Optical Microscopy

Abstract Tailoring the angular spectrum with annular illumination and collection can significantly improve integrated circuit analysis with an optical microscope, when combined with solid immersion. We present the development, testing, and optimization of a simple and compact apparatus to implement annular illumination and collection in a Hamamatsu iPHEMOS system. We demonstrated improved imaging of an IBM 45nm silicon-oninsulator circuit, with annular illumination and collection in confocal scanning optical microscopy and widefield microscopy with an InGaAs camera.

Near-Field Scanning Optical Microscopy for Through-Silicon Imaging and Fault Isolation of Integrated Circuits

2014 ◽  
Author(s):  
R. Giridharagopal ◽  
T.M. Eiles ◽  
B. Niu
Keyword(s):  
Optical Microscopy ◽  
Integrated Circuit ◽  
Near Field ◽  
Diffraction Limit ◽  
Fault Isolation ◽  
Lateral Resolution ◽  
Excitation Wavelength ◽  
Process Technology ◽  
Scanning Optical Microscopy ◽  
Near Field Scanning

Abstract We present the first known images acquired using near-field scanning optical microscopy (NSOM) through backside silicon on functional integrated circuit samples with higher resolution than conventional fault isolation (FI) tools. NSOM offers the possibility of substantially-improved lateral resolution independent of excitation wavelength. Current FI techniques have challenged the resolution limits of conventional optics technology, even in the best solid immersion lens (SIL) to date. This poses a problem for future process technology nodes. This resolution barrier is a by-product of the diffraction limit. In Fourier terms, a conventional lens filters out highfrequency information and thus limits the resolution. In NSOM, by placing a tip with an aperture in extreme proximity to the surface it is possible to capture the near-field light that contains high-frequency information, thereby circumventing the diffraction limit. The tangible benefit is that the resolution is substantially improved. We show that NSOM can be used in backside subsurface imaging of silicon, mirroring the paradigm used in typical optical FI. We present optical reflectance data through ~100 nm of remaining backside Si on functional 22 nm CMOS IC parts with lateral resolution approaching 100 nm. We then discuss potential methods for using NSOM in practical backside fault isolation applications and for improving signal-to-noise ratio (SNR).

An Analytical Technique to Assess the Risk of Laser Damage to Encapsulated Integrated Circuits during Package Laser Marking

2008 ◽  
Author(s):  
Joseph Patterson ◽  
Cliff Schuring
Keyword(s):  
Integrated Circuits ◽  
Optical Beam ◽  
Laser Damage ◽  
Induced Current ◽  
Induced Voltage ◽  
Laser Marking ◽  
Thermally Induced ◽  
Analytical Technique ◽  
Optical Beam Induced Current

Abstract Damage to encapsulated integrated circuits has recently been reported due to Laser marking of the package. A method to assess the risk of such damage is presented. The method is an analytical technique using Thermally Induced Voltage Alteration (XIVA) and Optical Beam Induced Current (OBIC) imaging.

Ambient noise waveform imaging of Yellowstone's magmatic system

2021 ◽  
Author(s):  
Ross Maguire ◽  
Min Chen ◽  
Brandon Schmandt ◽  
Chengxin Jiang ◽  
Justin Wilgus ◽  
...  
Keyword(s):  
Ambient Noise ◽  
Wave Speed ◽  
Asymptotic Methods ◽  
Magmatic System ◽  
Tomographic Images ◽  
Shear Wave Speed ◽  
Seismic Waveforms ◽  
Adjoint Tomography ◽  
Imaging Results ◽  
Starting Point

<p>Understanding important characteristics of Yellowstone's magmatic system such as the melt fraction, composition, and geometric organization of melt are critical for improving our knowledge of volcanic processes and assessing the potential for future eruptions.  While previous tomographic images have provided much insight into the magmatic system, imaging results are complicated by an incomplete understanding of how large crustal magmatic systems affect seismic waveforms. In particular, tomographic studies based on asymptotic methods may underestimate the seismic wave speed anomaly of the magma reservoir because first arriving energy may be diffracted around strong low wave speed anomalies. Here, we present a high-resolution shear wave speed model of Yellowstone’s crust and uppermost mantle structure, based on the most up to date dataset of ambient noise correlation functions from broadband stations deployed in the Yellowstone region over the past two decades. This model serves as the starting point for an adjoint inversion, which has potential to improve resolution by incorporating more accurate sensitivity kernels based on realistic wave propagation physics. We discuss our adjoint tomography methodology and present the first model iterations. Continued iterations promise to sharpen features in the model which can provide new inferences into the present state of Yellowstone’s magmatic system.</p>

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