A Simple FIB Method for Constructing Electrically Isolated Microprobe Pads for the Electrical Analysis of Failing 0.12μm Technology SRAM Bit Cells

2004 ◽  
Author(s):  
Randal Mulder
Keyword(s):  
Failure Analysis ◽  
Success Rate ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
High Success Rate ◽  
Minimal Amount ◽  
Physical Analysis ◽  
Simple Method ◽  
Defect Type ◽  
Electrical Analysis

Abstract This paper provides failure analysis engineers a simple method for constructing probe pads on failing 0.12um SRAM bit cells using the FEI 820 Focused Ion Beam (FIB) tool. This method allows for the easy location of the failing bit cell, results in good electrical isolation, and only takes a minimal amount of FIB time (2 hours for 6 pads). The method is effective for all technologies 0.12um or greater with a high success rate once the analyst is proficient in its use. Once probe pads have been constructed, it is then relatively easy for an analyst to perform electrical analysis to identify the defect type and location causing the bit cell failure before the physical analysis is performed.

Improved SRAM 6T Bit Cell Failure Analysis Using MCSpice Bit Cell Defect Modeling

2003 ◽  
Author(s):  
Randal Mulder ◽  
Sam Subramanian ◽  
Ed Widener ◽  
Tony Chrastecky
Keyword(s):  
Failure Analysis ◽  
Success Rate ◽  
Case Studies ◽  
Failure Mode ◽  
Failure Mechanisms ◽  
Physical Analysis ◽  
Certification Programs ◽  
Current Voltage ◽  
Electrical Analysis ◽  
Cell Defect

Abstract Single bit failures are the dominant failure mode for SRAM 6T bit cell memory devices. The analysis of failing single bits is aided by the fact that the mechanism is localized to the failing 6T bit cell. After electrically analyzing numerous failing bits, it was observed that failing bit cells were consistently producing specific electrical signatures (current-voltage curves). To help identify subtle bit cell failure mechanisms, this paper discusses an MCSpice program which was needed to simulate a 6T SRAM bit cell and the electrical analysis. It presents four case studies that show how MCSpice modeling of defective 6T SRAM bit cells was successfully used to identify subtle defect types (opens or shorts) and locations within the failing cell. The use of an MCSpice simulation and the appropriate physical analysis of defective bit cells resulted in a >90% success rate for finding failure mechanisms on yield and process certification programs.

Failure Analysis of Tungsten Stud Defect from the CMP Process

2000 ◽  
Author(s):  
K. Takagi ◽  
Y. Kohno ◽  
S. Nukii
Keyword(s):  
Electron Microscopy ◽  
Failure Analysis ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Electrical Characterization ◽  
Open Circuit ◽  
Physical Analysis ◽  
Metal Line ◽  
Cross Sectional ◽  
Defect Isolation

Abstract This paper describes a failure analysis that effectively combined multiple analytic techniques to find the cause of I/O leakage in a flawed chip produced for an OEM (Original Equipment Manufacturer) product. Internal probing was initially used for defect isolation and a Tungsten (W) stud open circuit flaw was isolated by electrical characterization with internal probing. SEM (Scanning Electron Microscopy), TEM (Transmission Electron Microscopy, and FE-AES (Field Emission Auger Electron Spectroscopy) analysis with FIB (Focused Ion Beam) preparation were used for physical analysis. Cross-sectional SEM and TEM observations showed a gap with foreign material (FM) between the bottom of the metal line and the top of the W stud, possibly from the W CMP (chemical mechanical polish) process. FE-AES is effective for the analysis of light materials and their chemical composition, so a flat milling FIB process was used to prepare a cross-section for FE-AES analysis of the FM and the interfaces of the open defect. The spectra showed that the FM was traceable to the W CMP process. From these analytical results and problem reproduction experiments in the W CMP process on the manufacturing line, the failure mechanism was identified.

Failure Analysis of DRAM Storage Node Trench Capacitors for 0.35-Micron and Follow-On Technologies Using the Focused Ion Beam for Electrical and Physical Analysis

1996 ◽  
Author(s):  
G. Benstetter ◽  
G. Bomberger ◽  
P. Coutu ◽  
R. Danyew ◽  
R. Douse
Keyword(s):  
High Resolution ◽  
Failure Analysis ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Substrate Material ◽  
Mechanical Polishing ◽  
Physical Analysis ◽  
Storage Node ◽  
Wet Chemical ◽  
Voltage Contrast

Abstract Reducing the cell size of DRAMs in 0.35 micron and follow-on technologies requires failure analysis techniques that can analyze single storage node trench capacitors on both test sites and actual product. A combination of electrical microprobing, probeless voltage contrast and physical delayering procedures, all based on focused- ion-beam (FIB) techniques, are described. Because of precise fail localization, high resolution scanning electron microscope (SEM) imaging enables the distinction between process defects and intrinsic breakdowns of node dielectric defects. Isolated storage cells can be electrically characterized by depositing small probe pads, using FIB for contact hole milling and probe-pad deposition. To localize trench capacitors with a leakage path to the surrounding substrate, the trenches are isolated by mechanical polishing and probeless voltage contrast in the FIB tool. Failing trench capacitors can be marked in the FIB tool. Physical isolation of leaking trench capacitors can be achieved by recessing the adjacent trench capacitors, with the FIB used for milling and a subsequent wet chemical removal added for the remaining substrate material. Alternatively, trench capacitors can be inspected from the backside when stabilized by a quartz deposition on top, followed by mechanical polishing from the side and a wet chemical etching of the remaining substrate material. In both cases, the dielectric of the node trench capacitors can be inspected by high resolution SEMs and the defect areas precisely analyzed.

Direct Plan View FIB Liftout for Near-Surface Defect Analysis in TEM

2013 ◽  
Author(s):  
Max L. Lifson ◽  
Carla M. Chapman ◽  
D. Philip Pokrinchak ◽  
Phyllis J. Campbell ◽  
Greg S. Chrisman ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Silicon Germanium ◽  
Focused Ion Beam ◽  
Surface Defects ◽  
Ion Beam ◽  
Misfit Dislocations ◽  
Tem Analysis ◽  
Plan View ◽  
Near Surface ◽  
Straightforward Method

Abstract Plan view TEM imaging is a powerful technique for failure analysis and semiconductor process characterization. Sample preparation for near-surface defects requires additional care, as the surface of the sample needs to be protected to avoid unintentionally induced damage. This paper demonstrates a straightforward method to create plan view samples in a dual beam focused ion beam (FIB) for TEM studies of near-surface defects, such as misfit dislocations in heteroepitaxial growths. Results show that misfit dislocations are easily imaged in bright-field TEM and STEM for silicon-germanium epitaxial growth. Since FIB tools are ubiquitous in semiconductor failure analysis labs today, the plan view method presented provides a quick to implement, fast, consistent, and straightforward method of generating samples for TEM analysis. While this technique has been optimized for near-surface defects, it can be used with any application requiring plan view TEM analysis.

Fast Turn-around Failure Analysis of Metal Interconnection Using FIB and LA ICP-MS

2010 ◽  
Author(s):  
Zixiao Pan ◽  
Wei Wei ◽  
Fuhe Li
Keyword(s):  
Failure Analysis ◽  
Inductively Coupled Plasma ◽  
Structural Damage ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Detection Sensitivity ◽  
Chemical Contamination ◽  
Inductively Coupled ◽  
Minimal Sample ◽  
Icp Ms

Abstract This paper introduces our effort in failure analysis of a 200 nm thick metal interconnection on a glass substrate and covered with a passivation layer. Structural damage in localized areas of the metal interconnections was observed with the aid of focused ion beam (FIB) cross-sectioning. Laser ablation inductively coupled plasma mass spectroscopy (LA ICP-MS) was then applied to the problematic areas on the interconnection for chemical survey. LA ICP-MS showed direct evidence of localized chemical contamination, which has likely led to corrosion (or over-etching) of the metal interconnection and the assembly failure. Due to the high detection sensitivity of LA ICP-MS and its compatibility with insulating material analysis, minimal sample preparation is required. As a result, the combination of FIB and LA ICP-MS enabled successful meso-scale failure analysis with fast turnaround and reasonable cost.

The Novel Dopant Profile Inspection Methodology by FIB

2010 ◽  
Author(s):  
Po Fu Chou ◽  
Li Ming Lu
Keyword(s):  
High Resolution ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Real Sample ◽  
Physical Analysis ◽  
The Novel ◽  
High Contrast ◽  
Dopant Profile ◽  
P Type

Abstract Dopant profile inspection is one of the focused ion beam (FIB) physical analysis applications. This paper presents a technique for characterizing P-V dopant regions in silicon by using a FIB methodology. This technique builds on published work for backside FIB navigation, in which n-well contrast is observed. The paper demonstrates that the technique can distinguish both n- and p-type dopant regions. The capability for imaging real sample dopant regions on current fabricated devices is also demonstrated. SEM DC and FIB DC are complementary methodologies for the inspection of dopants. The advantage of the SEM DC method is high resolution and the advantage of FIB DC methodology is high contrast, especially evident in a deep N-well region.

Logical-to-Physical Device Navigation using Place-and-Route Data as an Alternative to LVS

2006 ◽  
Author(s):  
Roger Nicholson
Keyword(s):  
Failure Analysis ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Traditional Methods ◽  
Navigation Data ◽  
Use Of Time ◽  
Place And Route ◽  
Physical Layout

Abstract Logical-to-physical device navigation for failure analysis is often used to drive physical probers and focused ion beam tools. Traditional methods of creating navigation data rely upon the use of time consuming Layout-versus-Schematic (LVS) based methods. By using existing place-and-route data, full cross-linked navigation between schematic and physical layout may be achieved in a fraction of the time that it takes for the LVS methods to be used. Place-and-route data offers significantly more information to the analyst than LVS based data.

Layout Overlay Techniques to Improve Failure Analysis

1998 ◽  
Author(s):  
Christian Burmer ◽  
Siegfried Görlich ◽  
Siegfried Pauthner
Keyword(s):  
Failure Analysis ◽  
Focused Ion Beam ◽  
New Technologies ◽  
Ion Beam ◽  
Image Correlation ◽  
Microelectronic Devices ◽  
Overlay Technique ◽  
Correlation Techniques ◽  
Navigation Software ◽  
Image Format

Abstract New layout overlay technique has been developed based on standard image correlation techniques to support failure analysis in modern microelectronic devices, which are critical to analyze because they are realized in new technologies using sub-ìm design rules, chemical mechanical polishing techniques (CMP) and autorouted design techniques. As the new technique is realized as an extension of a standard CAD-navigation software and as it makes use of standard image format "TIFF" for data input, which is available at all modern equipments for failure analysis, these technique can be applied to all modern failure analysis methods. Here examples are given for three areas of application: circuit modification using Focused Ion Beam (FIB), support of preparation for backside inspection and fault localization using emission microscopy.

Focused Ion Beam (FIB) Method for Reconditioning Worn Tungsten Atomic Force Probe (AFP) Tips

2005 ◽  
Author(s):  
Randal E. Mulder ◽  
Sam Subramanian ◽  
Tony Chrastecky
Keyword(s):  
Focused Ion Beam ◽  
Ion Beam ◽  
Minimal Amount ◽  
Atomic Force ◽  
Focus Ion Beam

Abstract Atomic force probing (AFP) uses very sharp tungsten tips (100nm in radius) which wear out rather quickly, even with the greater durability of tungsten as compared to silicon. This paper demonstrates how worn tips that no longer image and probe properly can be reconditioned using the focus ion beam (FIB) tool. The method works best for tips that are under approx. 750nm in diameter and are not bent. It works well for freshly manufactured tips that do not work properly due to mishandling or improper storage which allowed particulates/oxide to build up on the tip. The method also works well for fresh tips that have been worn down (or slightly bent) after several hours of scanning and probing. This method is straightforward and requires a minimal amount of time. Typically, four probe tips can be reconditioned in about 30 minutes on the FIB.

Solving the Voltage Contrast on Floating Substrate with Standard FA Toolset

2016 ◽  
Author(s):  
Julien Goxe ◽  
Béatrice Vanhuffel ◽  
Marie Castignolles ◽  
Thomas Zirilli
Keyword(s):  
Electron Microscope ◽  
Scanning Electron Microscope ◽  
Sample Preparation ◽  
Failure Analysis ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Silicon On Insulator ◽  
Mixed Signal ◽  
Voltage Contrast ◽  
Scanning Electron

Abstract Passive Voltage Contrast (PVC) in a Scanning Electron Microscope (SEM) or a Focused Ion Beam (FIB) is a key Failure Analysis (FA) technique to highlight a leaky gate. The introduction of Silicon On Insulator (SOI) substrate in our recent automotive analog mixed-signal technology highlighted a new challenge: the Bottom Oxide (BOX) layer, by isolating the Silicon Active Area from the bulk made PVC technique less effective in finding leaky MOSFET gates. A solution involving sample preparation performed with standard FA toolset is proposed to enhance PVC on SOI substrate.

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