scholarly journals HTNURL: Design of a High-Performance Low-Cost Triple-Node Upset Self-Recoverable Latch

Electronics ◽  
2021 ◽  
Vol 10 (20) ◽  
pp. 2457
Author(s):  
Hui Xu ◽  
Zehua Peng ◽  
Huaguo Liang ◽  
Zhengfeng Huang ◽  
Cong Sun ◽  
...  
Keyword(s):  
Power Consumption ◽  
High Performance ◽  
Feedback Loop ◽  
Low Cost ◽  
Low Power Consumption ◽  
Clock Gating ◽  
Single Node ◽  
Area Overhead ◽  
Power Delay Product ◽  
Reduced Power Consumption

A high-performance and low power consumption triple-node upset self-recoverable latch (HTNURL) is proposed. It can effectively tolerate single-node upset (SNU), double-node upset (DNU), and triple-node upset (TNU). This latch uses the C-element to construct a feedback loop, which reduces the delay and power consumption by fast path and clock gating techniques. Compared with the TNU-recoverable latches, HTNURL has a lower delay, reduced power consumption, and full self-recoverability. The delay, power consumption, area overhead, and area-power-delay product (APDP) of the HTNURL is reduced by 33.87%, 63.34%, 21.13%, and 81.71% on average.

Design of Velocity Measuring System of Car Based on MCU

2013 ◽  
Vol 373-375 ◽  
pp. 363-366
Author(s):  
Jing Sheng Yu ◽  
Hong Qiang Sun
Keyword(s):  
Mathematical Model ◽  
Power Consumption ◽  
Low Power ◽  
Control Systems ◽  
Basic Principle ◽  
High Performance ◽  
Low Cost ◽  
Measuring System ◽  
Low Power Consumption ◽  
Velocity Measuring

It describes the basic principle of velocity parameters measuring of car in operation, establishes the related mathematical model. It disigns an intelligent, integrated digital solutions to combination instrumentation of the car based on MC9S12DP256B. This system has advantages of high performance, high precision, low cost, low power consumption, good stability, sensitive respond and expandability. The system measures and shows online velocity parameters of the car. It has fuction such as safety alarm. The system reserves bus interface such as SCI and CAN, correspondences easily with other electronic engine control systems of the car.

Low Power Wide Fan-in Domino OR Gate Using CN-MOSFETs

2020 ◽  
Vol 10 (1) ◽  
pp. 55-62
Author(s):  
Deepika Bansal ◽  
Bal Chand Nagar ◽  
Brahamdeo Prasad Singh ◽  
Ajay Kumar
Keyword(s):  
Power Consumption ◽  
High Performance ◽  
Dynamic Logic ◽  
Clock Frequency ◽  
Charge Sharing ◽  
Benchmark Circuit ◽  
Domino Circuit ◽  
Power Delay Product ◽  
Domino Circuits ◽  
Or Gate

Background & Objective: In this paper, a modified pseudo domino configuration has been proposed to improve the leakage power consumption and Power Delay Product (PDP) of dynamic logic using Carbon Nanotube MOSFETs (CN-MOSFETs). The simulations for proposed and published domino circuits are verified by using Synopsys HSPICE simulator with 32nm CN-MOSFET technology which is provided by Stanford. Methods: The simulation results of the proposed technique are validated for improvement of wide fan-in domino OR gate as a benchmark circuit at 500 MHz clock frequency. Results: The proposed configuration is suitable for cascading of the high performance wide fan-in circuits without any charge sharing. Conclusion: The performance analysis of 8-input OR gate demonstrate that the proposed circuit provides lower static and dynamic power consumption up to 62 and 40% respectively, and PDP improvement is 60% as compared to standard domino circuit.

scholarly journals Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data

Nanophotonics ◽  
2020 ◽  
Vol 10 (2) ◽  
pp. 937-945
Author(s):  
Ruihuan Zhang ◽  
Yu He ◽  
Yong Zhang ◽  
Shaohua An ◽  
Qingming Zhu ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
High Speed ◽  
High Performance ◽  
Pulse Amplitude ◽  
Telecommunication Networks ◽  
Low Power Consumption ◽  
Power Efficient ◽  
High Speed Data ◽  
On Chip

AbstractUltracompact and low-power-consumption optical switches are desired for high-performance telecommunication networks and data centers. Here, we demonstrate an on-chip power-efficient 2 × 2 thermo-optic switch unit by using a suspended photonic crystal nanobeam structure. A submilliwatt switching power of 0.15 mW is obtained with a tuning efficiency of 7.71 nm/mW in a compact footprint of 60 μm × 16 μm. The bandwidth of the switch is properly designed for a four-level pulse amplitude modulation signal with a 124 Gb/s raw data rate. To the best of our knowledge, the proposed switch is the most power-efficient resonator-based thermo-optic switch unit with the highest tuning efficiency and data ever reported.

The Research into the Key Problem of Multi-Channel Video Acquisition and Display System Based on FPGA

2012 ◽  
Vol 433-440 ◽  
pp. 5611-5615
Author(s):  
Jian Sheng Hu
Keyword(s):  
Power Consumption ◽  
Low Cost ◽  
Time Sequence ◽  
Good Effect ◽  
Low Power Consumption ◽  
Display System ◽  
Reading And Writing ◽  
Video Acquisition ◽  
System A ◽  
Time Division

Aimed at the problem of the embedded multi-channel video acquisition and display system, a new one based on FPGA is put forward. The configuration of the system is given. The principle and key issue is analyzed. Using of the state shift mechanism, t the controlling time sequence signals of TFT-LCD are produced; The synchronization among multi-channel video acquisition is realized by using time-division multiplexing technology; The problem of conflict between reading and writing frame cache is solved through the two SRAM switch; The frames composition technology is applied to accomplish the change from interlaced scanning to progressive scanning. The result of project application shows the virtues of system, such as good effect of acquisition and display, low cost and low power consumption.

Constructing a Bioinformatics Platform with Web and Mobile Services Based on NVIDIA Jetson TK1

2015 ◽  
Vol 7 (4) ◽  
pp. 57-73 ◽  
Author(s):  
Chun-Yuan Lin ◽  
Jin Ye ◽  
Che-Lun Hung ◽  
Chung-Hung Wang ◽  
Min Su ◽  
...  
Keyword(s):  
Power Consumption ◽  
High Performance Computing ◽  
Graphics Processing Units ◽  
High Performance ◽  
Low Cost ◽  
Research Direction ◽  
Mobile Services ◽  
Performance Ratio ◽  
The Cost ◽  
Performance Computing

Current high-end graphics processing units (abbreviate to GPUs), such as NVIDIA Tesla, Fermi, Kepler series cards which contain up to thousand cores per-chip, are widely used in the high performance computing fields. These GPU cards (called desktop GPUs) should be installed in personal computers/servers with desktop CPUs; moreover, the cost and power consumption of constructing a high performance computing platform with these desktop CPUs and GPUs are high. NVIDIA releases Tegra K1, called Jetson TK1, which contains 4 ARM Cortex-A15 CPUs and 192 CUDA cores (Kepler GPU) and is an embedded board with low cost, low power consumption and high applicability advantages for embedded applications. NVIDIA Jetson TK1 becomes a new research direction. Hence, in this paper, a bioinformatics platform was constructed based on NVIDIA Jetson TK1. ClustalWtk and MCCtk tools for sequence alignment and compound comparison were designed on this platform, respectively. Moreover, the web and mobile services for these two tools with user friendly interfaces also were provided. The experimental results showed that the cost-performance ratio by NVIDIA Jetson TK1 is higher than that by Intel XEON E5-2650 CPU and NVIDIA Tesla K20m GPU card.

Layout Design and Verification of the Voltage Reference Module in the Auto Electronic Ignition Control Chip

2014 ◽  
Vol 608-609 ◽  
pp. 933-936
Author(s):  
Ying Yang ◽  
Yong Feng Zhang ◽  
Ying Ying Xiao
Keyword(s):  
Power Consumption ◽  
Low Cost ◽  
Layout Design ◽  
Low Power Consumption ◽  
Voltage Reference ◽  
Bipolar Technology ◽  
Custom Design ◽  
Input Module ◽  
Placement And Routing ◽  
Stable Performance

This article describes the layout design and verification of the input module of a auto electronic ignition chip used in the field of automotive engineering. Using standard bipolar technology, full-custom design on the input module placement and routing, and completed the back-end verification. This chip has low power consumption, low cost, and stable performance.

scholarly journals Integration of highly anisotropic multiferroic BaTiO3–Fe nanocomposite thin films on Si towards device applications

2020 ◽  
Vol 2 (9) ◽  
pp. 4172-4178
Author(s):  
Matias Kalaswad ◽  
Bruce Zhang ◽  
Xuejing Wang ◽  
Han Wang ◽  
Xingyao Gao ◽  
...  
Keyword(s):  
Thin Films ◽  
Power Consumption ◽  
Low Power ◽  
High Speed ◽  
Low Cost ◽  
Low Power Consumption ◽  
Silicon Substrates ◽  
Critical Step ◽  
Nanocomposite Thin Films ◽  
Device Applications

Integration of highly anisotropic multiferroic thin films on silicon substrates is a critical step towards low-cost devices, especially high-speed and low-power consumption memories.

Semi-Physical Simulation System for FMCW Radar

2011 ◽  
Vol 135-136 ◽  
pp. 886-892
Author(s):  
Wen Hui Chen ◽  
Xin Xi Meng ◽  
Xiao Min Liu
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Physical Simulation ◽  
Continuous Wave ◽  
Low Cost ◽  
Simulation System ◽  
Radar Signal ◽  
Low Power Consumption ◽  
Fmcw Radar ◽  
Data Process

In order to process and analyze the signal of frequency modulated continuous wave (FMCW) radar, a radar semi-physical simulation(RSPS) system based on STM32F103VE6 chip is designed in this paper. By designing the hardware and software of system, the RSPS system can process the radar signal, detect the target, verify the data process algorithm and display the result on TFT-LCD screen. In addition, the collected data can be uploaded to PC by RS-232 interfaces which improves the reliability, stability and practicability of system. The waveform and spectrum maps are utilized to show the feasibility of RSPS system in analysing FMCW radar signal. Experimental results show that this system has many advantages, such as multifunction, low power consumption and low cost.

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