scholarly journals The Study of Deep Level Traps and Their Influence on Current Characteristics of InP/InGaAs Heterostructures

Nanomaterials ◽  
2019 ◽  
Vol 9 (8) ◽  
pp. 1141
Author(s):  
Xiaohong Zhao ◽  
Hongliang Lu ◽  
Manli Zhao ◽  
Yuming Zhang ◽  
Yimen Zhang

The damage mechanism of proton irradiation in InP/InGaAs heterostructures was studied. The deep level traps were investigated in detail by deep level transient spectroscopy (DLTS), capacitance–voltage (C–V) measurements and SRIM (the stopping and range of ions in matter, Monte Carlo code) simulation for non-irradiated and 3 MeV proton-irradiated samples at a fluence of 5 × 1012 p/cm2. Compared with non-irradiated samples, a new electron trap at EC-0.37 eV was measured by DLTS in post-irradiated samples and was found to be closer to the center of the forbidden band. The trap concentration in bulk, the interface trap charge density and the electron capture cross-section were 4 × 1015 cm−3, 1.8 × 1012 cm−2, and 9.61 × 10−15 cm2, respectively. The deep level trap, acting as a recombination center, resulted in a large recombination current at a lower forward bias and made the forward current increase in InP/InGaAs heterostructures for post-irradiated samples. When the deep level trap parameters were added into the technology computer-aided design (TCAD) simulation tool, the simulation results matched the current–voltage measurements data well, which verifies the validity of the damage mechanism of proton irradiation.

Nanomaterials ◽  
2018 ◽  
Vol 8 (7) ◽  
pp. 543 ◽  
Author(s):  
Moonsang Lee ◽  
Hyunkyu Lee ◽  
Keun Song ◽  
Jaekyun Kim

We report forward tunneling characteristics of InGaN/GaN blue light emitting diodes (LEDs) on freestanding GaN detached from a Si substrate using temperature-dependent current–voltage (T-I-V) measurements. T-I-V analysis revealed that the conduction mechanism of InGaN/GaN LEDs using the homoepitaxial substrate can be distinguished by tunneling, diffusion and recombination current, and series resistance regimes. Their improved crystal quality, inherited from the nature of homoepitaxy, resulted in suppression of forward leakage current. It was also found that the tunneling via heavy holes in InGaN/GaN LEDs using the homoepitaxial substrate can be the main transport mechanism under low forward bias, consequentially leading to the improved forward leakage current characteristics.


Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 454
Author(s):  
You Wang ◽  
Yu Mao ◽  
Qizheng Ji ◽  
Ming Yang ◽  
Zhaonian Yang ◽  
...  

Gate-grounded tunnel field effect transistors (ggTFETs) are considered as basic electrostatic discharge (ESD) protection devices in TFET-integrated circuits. ESD test method of transmission line pulse is used to deeply analyze the current characteristics and working mechanism of Conventional TFET ESD impact. On this basis, a SiGe Source/Drain PNN (P+N+N+) tunnel field effect transistors (TFET) was proposed, which was simulated by Sentaurus technology computer aided design (TCAD) software. Simulation results showed that the trigger voltage of SiGe PNN TFET was 46.3% lower, and the failure current was 13.3% higher than Conventional TFET. After analyzing the simulation results, the parameters of the SiGe PNN TFET were optimized. The single current path of the SiGe PNN TFET was analyzed and explained in the case of gate grounding.


2011 ◽  
Vol 406 (15-16) ◽  
pp. 3056-3059 ◽  
Author(s):  
C. Nyamhere ◽  
A.G.M. Das ◽  
F.D. Auret ◽  
A. Chawanda ◽  
C.A. Pineda-Vargas ◽  
...  

2009 ◽  
Vol 615-617 ◽  
pp. 469-472
Author(s):  
Filippo Fabbri ◽  
Francesco Moscatelli ◽  
Antonella Poggi ◽  
Roberta Nipoti ◽  
Anna Cavallini

Capacitance versus Voltage (C-V) and Deep Level Transient Spectroscopy (DLTS) measurements of Al+ implanted p+n diodes with Al+ implanted Junction Termination Extension are here studied. These diodes present C-V characteristics like graded junction for low forward bias values, i.e. > 0.4 V , or like abrupt junctions for large reverse bias, i.e. between 0.4V and -10V. The depth range of the graded junction, computed by the capacitance values, is much larger than the simulated tail of the ion implanted Al+ profile. DLTS spectra have been measured both in injection and standard configuration and always show minority carrier traps in the temperature range 0-300K. Three are the minority carrier related peaks, one attributed to the Al acceptor and the others to the D and D1 defects. The depth distribution of these hole traps will be discussed with respect to the apparent carrier concentration, obtained by C-V analysis.


Electronics ◽  
2019 ◽  
Vol 8 (5) ◽  
pp. 538
Author(s):  
Farhad Larki ◽  
Md Shabiul Islam ◽  
Arash Dehzangi ◽  
Mohammad Tariqul Islam ◽  
Hin Yong Wong

In this paper, we investigate the effect of lateral gate design on performance of a p-type double lateral gate junctionless transistors (DGJLTs) with an air gate gap. The impact of lateral gate length, which modifies the real channel length of the device and gate gap variation down to 50 nm which have been found to be the most influential factors in the performance of the device have been comprehensively investigated. The characteristics are demonstrated and compared with a nominal DGJLTs through three-dimensional technology computer-aided design (TCAD) simulation. At constant channel geometry (thickness and width), when the lateral gate length decreases, the results show constant flatband drain current characteristics while the OFF state current (IOFF) increases significantly. On the other hand, by decreasing the air gap the subthreshold current considerably decreases while the flatband current is constant. Moreover, at a certain gate gap, the gates lose control over the channel and the device simply works as a resistor. Electric field component, carriers’ density, band edge energies, and recombination rate of the carriers inside the channel in depletion and accumulation regimes are analysed to interpret the variation of output characteristics.


1996 ◽  
Vol 438 ◽  
Author(s):  
S. Libertino ◽  
S. Coffa ◽  
V. Privitera ◽  
F. Priolo

AbstractWe used deep level transient spectroscopy to determine the concentration and depth profile of the defects introduced by MeV He and Si implants in n-type crystalline Si. We have found that only ∼ 16% of the Frenkel pairs generated by the ion escapes recombination and is stored into room temperature stable defects such as divacancies and oxygen vacancy complexes. For a light ion (He), the depth distribution of these defect complexes is strongly dependent on the O content of the substrate: it mirrors the initial distribution of I-V pairs, as calculated by TRIM (a Monte Carlo Code) when the O content is high (∼ 1018/cm3) while it can be much wider (up to 2 μm) in a highly pure (low O content) epitaxial substrate. This effect is due to a long range migration of vacancies before clustering or trapping at impurities. This migration is strongly inhibited for an ion of higher mass (such as Si) since in a denser collision cascade direct clustering is strongly favoured with respect to agglomeration of migrating defects.


2013 ◽  
Vol 103 (4) ◽  
pp. 042102 ◽  
Author(s):  
Z. Zhang ◽  
A. R. Arehart ◽  
E. Cinkilic ◽  
J. Chen ◽  
E. X. Zhang ◽  
...  

1993 ◽  
Vol 325 ◽  
Author(s):  
Z.C. Huang ◽  
C.R. Wie

AbstractDeep levels have been measured in molecular beam epitaxy grown Ga0.51In0.49P/GaAs heterostructure by double correlation deep level transient spectroscopy. Gold(Au) and Aluminum (Al) metals were used for Schottky contact. A contact-related hole trap with an activation energy of 0.50-0.75eV was observed at the A1/GaInP interface, but not at the Au/GaInP interface. To our knowledge, this contact-related trap has not been reported before. We attribute this trap to the oxygen contamination, or a vacancy-related defect, VIn or VGa. A new electron trap at 0.28eV was also observed in both Au- and Al-Schottky diodes. Its depth profile showed that it is a bulk trap in GaInP epilayer. The temperature dependent current-voltage characteristics (I-V-T) show a large interface recombination current at the GaInP surface due to the Al-contact. Concentration of the interface trap and the magnitude of recombination current are both reduced by a rapid thermal annealing at/or above 450°C after the aluminum deposition.


1997 ◽  
Vol 486 ◽  
Author(s):  
W. N. Huang ◽  
K. Y. Tong ◽  
P. W. Chan

AbstractPrevious studies on electroluminescence in porous silicon were based on crystalline wafers. In this paper, we shall report the characteristics of a LED based on porous effects in a cast polycrystalline silicon substrate. A layer of porous region was first formed on a cast polycrystalline silicon substrate by anodization, followed by the deposition of a semitransparent Au layer. Under forward bias, the LED emits stable yellowish white light (with the presence of bright spots) for currents above 20 mA/cm2. From the electroluminescence spectra measured, we suggest that the emission is due to the recombination of electron-hole pairs in a microplasma region. We propose a model where the microplasma is present in the depletion region of the heterojunction formed between the bulk polysilicon and the surface porous polysilicon. The defects and grain boundaries in a polycrystalline material facilitate the formation of such microplasma. The heterojunction model will also be used to explain the current characteristics of the LED. The effect on the LED characteristics due to indium coating on the porous substrate prior to Au deposition was studied, and the results agree with the heterojunction model. Our work shows that cast polycrystalline silicon substrates have potential for LED fabrication in cheap and large area applications.


2006 ◽  
Vol 527-529 ◽  
pp. 911-914 ◽  
Author(s):  
D.J. Ewing ◽  
Qamar-ul Wahab ◽  
Sergey P. Tumakha ◽  
Leonard J. Brillson ◽  
X.Y. Ma ◽  
...  

In this study, we performed a statistical analysis of 500 Ni Schottky diodes distributed across a 2-inch, n-type 4H-SiC wafer with an epilayer grown by chemical vapor deposition. A majority of the diodes displayed ideal thermionic emission when under forward bias, whereas some diodes showed ‘double-barrier’ characteristics with a ‘knee’ in the low-voltage log I vs. V plot. X-ray topography (XRT) and polarized light microscopy (PLM) revealed no correlations between screw dislocations and micropipes and the presence of double-barrier diodes. Depth resolved cathodoluminescence (DRCLS) indicated that certain deep-level states are associated with the observed electrical variations.


Sign in / Sign up

Export Citation Format

Share Document