scholarly journals Analog Realization of Fractional-Order Skin-Electrode Model for Tetrapolar Bio-Impedance Measurements

Technologies ◽  
2020 ◽  
Vol 8 (4) ◽  
pp. 61 ◽  
Author(s):  
Vassilis Alimisis ◽  
Christos Dimas ◽  
Georgios Pappas ◽  
Paul P. Sotiriadis

This work compares two design methodologies, emulating both AgCl electrode and skin tissue Cole models for testing and verification of electrical bio-impedance circuits and systems. The models are based on fractional-order elements, are implemented with active components, and capture bio-impedance behaviors up to 10 kHz. Contrary to passive-elements realizations, both architectures using analog filters coupled with adjustable transconductors offer tunability of the fractional capacitors’ parameters. The main objective is to build a tunable active integrated circuitry block that is able to approximate the models’ behavior and can be utilized as a Subject Under Test (SUT) and electrode equivalent in bio-impedance measurement applications. A tetrapolar impedance setup, typical in bio-impedance measurements, is used to demonstrate the performance and accuracy of the presented architectures via Spectre Monte-Carlo simulation. Circuit and post-layout simulations are carried out in 90-nm CMOS process, using the Cadence IC suite.

2019 ◽  
Vol 28 (03) ◽  
pp. 1950047 ◽  
Author(s):  
Guo-Cheng Huang ◽  
Hai-Gang Yang ◽  
Tao Yin ◽  
Xiao-Dong Xu ◽  
Yuan-Ming Zhu

This paper presents a novel low-voltage bandgap reference with improved power supply rejection (PSR). The proposed circuit adopts a complementary loop locking approach for stabilizing the drain-source voltages of the current mirrors, which gives rise to a boost of the PSR performance by more than 30[Formula: see text]dB over [Formula: see text]–110∘C and at 1-V supply. An analysis shows that the PSR of the proposed bandgap reference is typically characterized with its insensitivity to temperature variations. The circuit is designed with a commercial 0.18-[Formula: see text]m CMOS process. The experiment results of Monte Carlo simulation demonstrate that the average PSR with 1-V supply is [Formula: see text][Formula: see text]dB at DC and is [Formula: see text][Formula: see text]dB at 1[Formula: see text]kHz (attained under a room temperature condition of 27∘C). And the temperature coefficient of the DC-based PSR is about 0.83%/∘C at 1-V supply, significantly decreased by three–six folds compared to other conventional designs. The quiescent current consumed is only about 13.5[Formula: see text][Formula: see text]A.


2014 ◽  
Vol 2014 ◽  
pp. 1-8 ◽  
Author(s):  
Labonnah Farzana Rahman ◽  
Mamun Bin Ibne Reaz ◽  
Chia Chieu Yin ◽  
Mohammad Marufuzzaman ◽  
Mohammad Anisur Rahman

Circuit intricacy, speed, low-offset voltage, and resolution are essential factors for high-speed applications like analog-to-digital converters (ADCs). The comparator circuit with preamplifier increases the power dissipation, as it requires higher amount of currents than the latch circuitry. In this research, a novel topology of dynamic latch comparator is illustrated, which is able to provide high speed, low offset, and high resolution. Moreover, the circuit is able to reduce the power dissipation as the topology is based on latch circuitry. The cross-coupled circuit mechanism with the regenerative latch is employed for enhancing the dynamic latch comparator performance. In addition, input-tracking phase is used to reduce the offset voltage. The Monte-Carlo simulation results for the designed comparator in 0.18 μm CMOS process show that the equivalent input-referred offset voltage is 720 μV with 3.44 mV standard deviation. The simulated result shows that the designed comparator has 8-bit resolution and dissipates 158.5 μW of power under 1.8 V supply while operating with a clock frequency of 50 MHz. In addition, the proposed dynamic latch comparator has a layout size of148.80 μm×59.70 μm.


2013 ◽  
Vol 22 (07) ◽  
pp. 1350061 ◽  
Author(s):  
ZHANGMING ZHU ◽  
WEITIE WANG ◽  
YUHENG GUAN ◽  
SHUBIN LIU ◽  
YU XIAO ◽  
...  

A novel low offset, high speed, low power comparator architecture is proposed in this paper. In order to achieve low offset, both offset cancellation and dynamic amplifier techniques are adopted. Active resistors are chosen to implement the static amplifier circuit to obtain reduction in equivalent input referred offset voltage as well as to increase the circuit speed. The comparator is designed in TSMC 0.18 μm CMOS process. Monte Carlo simulation shows that the comparator has the offset voltage as low as 0.3 mV at 1 sigma at 250 MHz while dissipates 342 μW from a 1.8 V supply.


Author(s):  
Ryuichi Shimizu ◽  
Ze-Jun Ding

Monte Carlo simulation has been becoming most powerful tool to describe the electron scattering in solids, leading to more comprehensive understanding of the complicated mechanism of generation of various types of signals for microbeam analysis.The present paper proposes a practical model for the Monte Carlo simulation of scattering processes of a penetrating electron and the generation of the slow secondaries in solids. The model is based on the combined use of Gryzinski’s inner-shell electron excitation function and the dielectric function for taking into account the valence electron contribution in inelastic scattering processes, while the cross-sections derived by partial wave expansion method are used for describing elastic scattering processes. An improvement of the use of this elastic scattering cross-section can be seen in the success to describe the anisotropy of angular distribution of elastically backscattered electrons from Au in low energy region, shown in Fig.l. Fig.l(a) shows the elastic cross-sections of 600 eV electron for single Au-atom, clearly indicating that the angular distribution is no more smooth as expected from Rutherford scattering formula, but has the socalled lobes appearing at the large scattering angle.


Author(s):  
D. R. Liu ◽  
S. S. Shinozaki ◽  
R. J. Baird

The epitaxially grown (GaAs)Ge thin film has been arousing much interest because it is one of metastable alloys of III-V compound semiconductors with germanium and a possible candidate in optoelectronic applications. It is important to be able to accurately determine the composition of the film, particularly whether or not the GaAs component is in stoichiometry, but x-ray energy dispersive analysis (EDS) cannot meet this need. The thickness of the film is usually about 0.5-1.5 μm. If Kα peaks are used for quantification, the accelerating voltage must be more than 10 kV in order for these peaks to be excited. Under this voltage, the generation depth of x-ray photons approaches 1 μm, as evidenced by a Monte Carlo simulation and actual x-ray intensity measurement as discussed below. If a lower voltage is used to reduce the generation depth, their L peaks have to be used. But these L peaks actually are merged as one big hump simply because the atomic numbers of these three elements are relatively small and close together, and the EDS energy resolution is limited.


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