Anti-Radiation Design and Irradiation Test of Antifuse FPGA

2013 ◽  
Vol 380-384 ◽  
pp. 3249-3253
Author(s):  
Kai Feng Zhang ◽  
Shang Feng Chen ◽  
Shan Zhu Xiao

Antifuse FPGA because for its low power consumption, high reliability, high security, etc., are widely used in space electronic systems. However, antifuse FPGA running in the space environment is also vulnerable to space radiation. This paper analyzes the single event effects in antifuse FPGA in detail and put forward the TMR and EDAC anti-SEE hardening design and implementation methods. The ground heavy ions accelerated test is conducted to verify the design of hardening; test results and analysis show that the hardening design method can effectively improve the COTS antifuse FPGA for space applications reliability.

Symmetry ◽  
2020 ◽  
Vol 12 (4) ◽  
pp. 624
Author(s):  
Anquan Wu ◽  
Bin Liang ◽  
Yaqing Chi ◽  
Zhenyu Wu

The reliability of integrated circuits under advanced process nodes is facing more severe challenges. Single-event transients (SET) are an important cause of soft errors in space applications. The SET caused by heavy ions in the 28 nm bulk silicon inverter chains was studied. A test chip with good symmetry layout design was fabricated based on the 28 nm process, and the chip was struck by using 5 kinds of heavy ions with different linear energy transfer (LET) values on heavy-ion accelerator. The research results show that in advanced technology, smaller sensitive volume makes SET cross-section measured at 28 nm smaller than 65 nm by an order of magnitude, the lower critical charge required to generate SET will increase the reliability threat of low-energy ions to the circuit, and high-energy ions are more likely to cause single-event multiple transient (SEMT), which cannot be ignored in practical circuits. The transients pulse width data can be used as a reference for SET modeling in complex circuits.


2021 ◽  
Vol 2065 (1) ◽  
pp. 012008
Author(s):  
Ziran Chen ◽  
Zhi Huang ◽  
Qi Zhang ◽  
Meng Zhang

Abstract This paper introduces a design scheme and key technology of a multi-channel tile-type T/R module. In order to meet the requirements of high reliability, miniaturization, lightweight and multi-functional integration, a vertical interconnection design method of high integrated multi-channel tile-type T / R module is proposed. LTCC technology is used to achieve high-density stacking of radio frequency devices, while bare chips are used to improve system integration and reliability. The module integrates 4 isolated transceiver channels with a size of 40mm×40mm×10mm, which significantly reduces the volume and weight compared to the traditional T/R module structure. The module simulation results prove that the design scheme is easy to implement and fault location maintenance, and the test results meet the design indicators.


Electronics ◽  
2019 ◽  
Vol 8 (5) ◽  
pp. 562 ◽  
Author(s):  
Charalambos M. Andreou ◽  
Diego Miguel González-Castaño ◽  
Simone Gerardin ◽  
Marta Bagatin ◽  
Faustino Gómez Rodriguez ◽  
...  

The radiation tolerance of subthreshold reference circuits for space microelectronics is presented. The assessment is supported by measured results of total ionization dose and single event transient radiation-induced effects under γ -rays, X-rays, protons and heavy ions (silicon, krypton and xenon). A high total irradiation dose with different radiation sources was used to evaluate the proposed topologies for a wide range of applications operating in harsh environments similar to the space environment. The proposed custom designed integrated circuits (IC) circuits utilize only CMOS transistors, operating in the subthreshold regime, and poly-silicon resistors without using any external components such as compensation capacitors. The circuits are radiation hardened by design (RHBD) and they were fabricated using TowerJazz Semiconductor’s 0.18 μm standard CMOS technology. The proposed voltage references are shown to be suitable for high-precision and low-power space applications. It is demonstrated that radiation hardened microelectronics operating in subthreshold regime are promising candidates for significantly reducing the size and cost of space missions due to reduced energy requirements.


Electronics ◽  
2021 ◽  
Vol 10 (17) ◽  
pp. 2090
Author(s):  
Hui Xu ◽  
Xuan Liu ◽  
Guo Yu ◽  
Huaguo Liang ◽  
Zhengfeng Huang

A single event causing a double-node upset is likely to occur in nanometric complementary metal-oxide-semiconductor (CMOS). Contemporary hardened latch designs are insufficient in meeting high reliability, low power consumption, and low delay. This paper presents a novel soft error hardened latch, known as a loop interlocked hardened latch (LIHL). This latch consists of four modified cross-coupled elements, based on dual interlocked storage cell (DICE) latch. The use of these elements hardens the proposed LIHL to soft errors. The simulation results showed that the LIHL has single-event double upset (SEDU) self-recoverability and single-event transient (SET) pulse filterability. This latch also reduces power dissipation and propagation delay, compared to other SEDU or SET-tolerant latches.


2020 ◽  
Author(s):  
Mafral

The independent independent variables in this study as many as 89 respondents are determined by using saturated samples. To know the influence of independent variable to dependent variable partially, used t test. While to know the effect of independent variable to dependent variable simultaneously, used F test. The assumption used in the validity test is if R-count> R-table item is declared valid. The R-arithmetic shown in the table above, from each item indicates that R-arithmetic> R- table so the item is declared valid. Based on the validity test of the instrument of Leadership Style, Work Motivation, and Competence on Employee Performance, all items are declared valid and reliability test results indicate that the instrument has high reliability. This means that the eligibility criteria of the Instrument of Leadership Style, Work Motivation, Competency and Employee Performance have met the criteria of good instrument requirements, that is valid and reliable. The result of regression analysis of Leadership Style obtained by tcount = 20,91 while ttable value = 1,988 tcount> ttable proved variable of Leadership Style influence to Employee Performance. Work Motivation regression analysis obtained tcount = 17.62 while the value ttable = 1.988 tcount> ttabel proven Motivational Work variables influence on Employee Performance. Regression analysis Competence obtained value tcount = - 06.85 while ttable =1.988 so thitung> ttable and proven variable Competence have a negative effect on Employee Performance.


Author(s):  
Samuel Chef ◽  
Chung Tah Chua ◽  
Yu Wen Siah ◽  
Philippe Perdu ◽  
Chee Lip Gan ◽  
...  

Abstract Today’s VLSI devices are neither designed nor manufactured for space applications in which single event effects (SEE) issues are common. In addition, very little information about the internal schematic and usually nothing about the layout or netlist is available. Thus, they are practically black boxes for satellite manufacturers. On the other hand, such devices are crucial in driving the performance of spacecraft, especially smaller satellites. The only way to efficiently manage SEE in VLSI devices is to localize sensitive areas of the die, analyze the regions of interest, study potential mitigation techniques, and evaluate their efficiency. For the first time, all these activities can be performed using the same tool with a single test setup that enables a very efficient iterative process that reduce the evaluation time from months to days. In this paper, we will present the integration of a pulsed laser for SEE study into a laser probing, laser stimulation, and emission microscope system. Use of this system will be demonstrated on a commercial 8 bit microcontroller.


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