Identification of Electrical Fire Melted Marks of Copper Wires by Electron Backscattered Diffraction (EBSD)

2014 ◽  
Vol 513-517 ◽  
pp. 281-285
Author(s):  
Cheng Sun ◽  
Min Ju Ding ◽  
Yong Feng Zhang ◽  
Xun Tan ◽  
Peng Wang ◽  
...  
Keyword(s):  
Copper Wire ◽  
Short Circuit ◽  
Testing Methods ◽  
Electron Backscattered Diffraction ◽  
Qualitative And Quantitative ◽  
Metallographic Method ◽  
Short Circuits ◽  
In Fire ◽  
Misorientation Of Grains ◽  
Electrical Apparatus

A variety of electrical apparatus used in daily life can cause fires because of internal or external factors. During cause identification of an electrical fire, the first short circuit melted marks of copper wire have been considered highly important because they are direct proofs. Additionally, overloaded short circuit caused by the overload of current due to excessive electrical usage can give rise to an electrical fire. Despite extensive research on the first short circuit in fire scenes, the overloaded short circuit remains difficult to be distinguished because of the limitation of commonly used testing methods. Conventional metallographic method is intuitionistic and simple, but may not provide detailed data of crystals such as misorientation of grains. Here a new method (electron backscattered diffraction, EBSD) is applied for identification of the first and overloaded short-circuited melted marks of copper wires in electrical fire scenes. Results show obvious morphological distinctions in melted marks of copper wires between the first and overloaded short circuits. Qualitative and Quantitative differences obtained from the contrast of the above two short circuit situations may assist for cause identification of electrical fires in the future.

scholarly journals Optimization-Based Formulations for Short-Circuit Studies with Inverter-Interfaced Generation in PowerModelsProtection.jl

Energies ◽  
2021 ◽  
Vol 14 (8) ◽  
pp. 2160
Author(s):  
Arthur K. Barnes ◽  
Jose E. Tabarez ◽  
Adam Mate ◽  
Russell W. Bent
Keyword(s):  
Optimization Problem ◽  
Short Circuit ◽  
Problem Formulation ◽  
Power Delivery ◽  
Fault Current ◽  
Protective Device ◽  
Protective Relaying ◽  
Overcurrent Protection ◽  
Short Circuits ◽  
Optimization Problem Formulation

Protecting inverter-interfaced microgrids is challenging as conventional time-overcurrent protection becomes unusable due to the lack of fault current. There is a great need for novel protective relaying methods that enable the application of protection coordination on microgrids, thereby allowing for microgrids with larger areas and numbers of loads while not compromising reliable power delivery. Tools for modeling and analyzing such microgrids under fault conditions are necessary in order to help design such protective relaying and operate microgrids in a configuration that can be protected, though there is currently a lack of tools applicable to inverter-interfaced microgrids. This paper introduces the concept of applying an optimization problem formulation to the topic of inverter-interfaced microgrid fault modeling, and discusses how it can be employed both for simulating short-circuits and as a set of constraints for optimal microgrid operation to ensure protective device coordination.

scholarly journals Performance of Parallel Connected SiC MOSFETs under Short Circuits Conditions

Energies ◽  
2021 ◽  
Vol 14 (20) ◽  
pp. 6834
Author(s):  
Ruizhu Wu ◽  
Simon Mendy ◽  
Nereus Agbo ◽  
Jose Ortiz Gonzalez ◽  
Saeed Jahdi ◽  
...  
Keyword(s):  
Elevated Temperatures ◽  
Short Circuit ◽  
Critical Factor ◽  
Charge Trapping ◽  
Parallel Connection ◽  
Bias Temperature Instability ◽  
Test Methodology ◽  
Threshold Voltages ◽  
Short Circuits ◽  
The Impact

This paper investigates the impact of parameter variation between parallel connected SiC MOSFETs on short circuit (SC) performance. SC tests are performed on parallel connected devices with different switching rates, junction temperatures and threshold voltages (VTH). The results show that VTH variation is the most critical factor affecting reduced robustness of parallel devices under SC. The SC current conducted per device is shown to increase under parallel connection compared to single device measurements. VTH shift from bias–temperature–instability (BTI) is known to occur in SiC MOSFETs, hence this paper combines BTI and SC tests. The results show that a positive VGS stress on the gate before the SC measurement reduces the peak SC current by a magnitude that is proportional to VGS stress time. Repeating the measurements at elevated temperatures reduces the time dependency of the VTH shift, thereby indicating thermal acceleration of negative charge trapping. VTH recovery is also observed using SC measurements. Similar measurements are performed on Si IGBTs with no observable impact of VGS stress on SC measurements. In conclusion, a test methodology for investigating the impact of BTI on SC characteristics is presented along with key results showing the electrothermal dynamics of parallel devices under SC conditions.

scholarly journals ANALYSIS OF MONI SIS OF MONITORING OF THE A ORING OF THE AT-3 AUTOTRANSFORM TRANSFORMATOR IN T OR IN TashTES MODE

2019 ◽  
Vol 2019 (1) ◽  
pp. 209-217
Author(s):  
F Isakov
Keyword(s):  
Cooling System ◽  
Power Transformer ◽  
Short Circuit ◽  
Operation Mode ◽  
Wear And Tear ◽  
Basic Parameters ◽  
Short Circuits ◽  
One Year ◽  
Insulation Breakdown ◽  
Winding Insulation

The article considers the results of the analysis of autotransformers operation mode monitoring. The time diagram of active load current and oil temperature of autotransformer TashTES AT-3 is established and during one year changes of these variables and basic parameters of autotransformer were observed. Technical faults of the power transformer and high power autotransformer are established and methods of their elimination are determined. Damage of transformers and autotransformers with voltage of 110-500 kV of about 30% of the total number of outages which were accompanied by internal short-circuits and two main causes of damage were determined. The main causes of technological failures, which were not accompanied by internal short-circuits, are as follows: 20% of failures in operation of the onload tap-changer, 16% of oil leaks from the bushings, 13% of oil leaks and lowering of oil from the transformer due to violation of welded joints and rubber seals, 4% of engine damage to oil pumps of the cooling system, 3% of pressure increase in high-voltage hermetic bushings, 2% of film protection shell damage. The main reasons of technological violations accompanied by internal short-circuit in the transformer are as follows: breakdown of internal insulation of highvoltage bushings, insufficient short-circuit resistance, wear and tear of winding insulation, breakdown of insulation.

ENGINEERING ANALYSIS OF THE THREE-PHASE SHORT CIRCUIT MODE IN THE 10 KV ELECTRIC NETWORK TAKING INTO ACCOUNT THE INFLUENCE OF LOAD CURRENTS

2021 ◽  
pp. 74-83
Author(s):  
YURI D. VOLCHKOV ◽  
Keyword(s):  
Remote Monitoring ◽  
Short Circuit ◽  
Short Circuit Current ◽  
Load Current ◽  
Electric Network ◽  
Operating Modes ◽  
Three Phase ◽  
Feed Network ◽  
Short Circuits ◽  
Switching Devices

Abstract. The load current aff ects the value of the short-circuit current in the electric network and, consequently, the voltage value. In some cases, this infl uence must be taken into account for the correct choice of switching devices, remote monitoring the operating modes of electric networks, and determining the modes. It is possible to disconnect loads connected through magnetic starters and contactors. Failure to consider the infl uence of the load current can lead to an incorrect interpretation of the identifi ed grid operating modes during remote monitoring and, as a result, incorrect dispatcher’s decisions. In addition, it is also insuffi cient to specify the choice of switching devices in the 10 kV feed network. The article describes a method for analyzing the three-phase short circuit mode in a 10 kV feed network, taking into account the infl uence of load currents. The method is exemplifi ed by the case of an actual electric network – the 10 kV ring feed network containing reclosers and receiving power from diff erent sections of lowvoltage buses of the “Kulikovskaya” 110/35/10 kV substation, belonging to the Branch of PJSC «DGC of Center”-“Orelenergo.” For this network, the values of the three-phase short-circuit currents at points with diff erent distances from the substation buses have been determined. The authors have fi guredout the values of the load currents and their shares in the total short-circuit current. The voltage values at different points of the network in the case of short circuits have also been determined. The research proves that the effect of the load current on the total short-circuit current should be taken into account for the case of remote short circuits.

scholarly journals Thyristor Arc Eliminator for Protection of Low Voltage Electrical Equipment

Energies ◽  
2019 ◽  
Vol 12 (14) ◽  
pp. 2749 ◽  
Author(s):  
Karol Nowak ◽  
Jerzy Janiszewski ◽  
Grzegorz Dombek
Keyword(s):  
Lower Cost ◽  
Low Voltage ◽  
Short Circuit ◽  
Electrical Equipment ◽  
Power Network ◽  
System Operation ◽  
Test Circuit ◽  
Wide Range ◽  
Short Circuit Currents ◽  
Electrical Apparatus

The paper presents the layout of two opposing thyristors working as an Arc Eliminator (AE). The presented solution makes it possible to protect an electrical apparatus against the effects of an arcing fault. An Arc Eliminator is assumed to be a device cooperating with the protected apparatus. Thyristors were used because of their speed of operation and a relatively lower cost compared to other semiconductors with the same current-carrying capacity. The proposed solution, as one of the few currently available, makes it possible to eliminate the fault arc—both at short-circuit currents and current values to which overcurrent protections do not react. A test circuit was designed and made to study the effectiveness of the thyristor arc eliminator. A series of tests was carried out with variable impedance in the arc branch, including the influence of circuit inductance on arc time. It was found that the thyristor arc eliminator effectively protects devices powered from a low voltage power network against the effects of a fault or arc fault. The correctness of system operation for a wide range of impedance changes in the circuit feeding the arc location was demonstrated.

scholarly journals Experimental validation of piezoelectric shunt tuning with residual mode correction: Damping of plate-like structures

2020 ◽  
Vol 31 (9) ◽  
pp. 1220-1239
Author(s):  
Johan Frederik Toftekær ◽  
Jan Høgsberg
Keyword(s):  
Electromechanical Coupling ◽  
Copper Wire ◽  
Short Circuit ◽  
Single Mode ◽  
Magnetic Core ◽  
Open Circuit ◽  
Electromechanical Coupling Coefficient ◽  
Tuning Method ◽  
Multi Mode ◽  
Free Beam

The effective vibration mitigation properties of piezoceramic patches with inductive-resistive shunts are investigated experimentally. A shunt tuning method is proposed, in which a consistent correction for the influence from residual vibration modes is included by an effective modal capacitance, evaluated from measured charge and voltage amplitudes in short- and open-circuit conditions, respectively. The robustness of the proposed method is verified experimentally for both a free beam and a free plate structure with four shunted piezoceramic patch pairs. A stable and fully passive inductor is produced by winding a copper wire around a magnetic core, which requires precise inductance tuning to determine the final number of turns. It is demonstrated that the effective modal capacitance interpolates consistently between the blocked and static capacitances, commonly used for single-mode tuning of piezoelectric inductive-resistive shunts. By imposing pseudo-random vibrations, the piezoelectric current and voltage signals are measured and evaluated by their frequency response functions. Spectrum peak values determine the apparent short-circuit charge to open-circuit voltage ratio for each shunt, which directly determines the shunt components by explicit tuning formulas. Good correlation between numerical and experimental results are obtained for the free beam, while for the free plate experiment effective multi-mode shunt tuning is obtained by a modified effective electromechanical coupling coefficient.

scholarly journals Comparative Simulation Study on Synchronous Generators Sudden Short Circuits

2009 ◽  
Vol 2009 ◽  
pp. 1-11 ◽  
Author(s):  
Lucian Lupşa-Tătaru
Keyword(s):  
Mathematical Model ◽  
Time Domain ◽  
Short Circuit ◽  
Structural Equations ◽  
Process Models ◽  
State Variables ◽  
Synchronous Generators ◽  
State Equations ◽  
Starting Point ◽  
Short Circuits

Although of a great extent in time, the research works directed at studying transients in synchronous generators have not yet provided fully sufficient comparative studies in respect to sudden short circuits of the machine. The present paper puts forward novel and comprehensive process models for dynamic simulation of short circuit faults of initially unloaded synchronous generators, using the generalizedd-q-0 mathematical model as starting point in derivation. Distinct from the time-domain analysis, the technique proposed here allows an effective comparative overview by employing a specialized procedure to perform repeated time-domain simulations accompanied by peak values recording for the various circumstances. The time consuming matrix numerical inversion at each step of integration, usually performed when selecting currents as state variables, is eliminated by advancing the process models in a convenient split matrix form that allows the symbolic processing. Also, the computational efficiency is being increased by introducing a set of auxiliary variables common to different state equations. The models derivation is carried out without altering the structural equations of the generalizedd-q-0 mathematical model of synchronous generators whilst the simulation results are both compared and discussed in detail.

scholarly journals Identification of Inter-Turn Short-Circuits in Induction Motor Stator Winding Using Simulated Annealing

Energies ◽  
2021 ◽  
Vol 15 (1) ◽  
pp. 117
Author(s):  
Marcin Tomczyk ◽  
Ryszard Mielnik ◽  
Anna Plichta ◽  
Iwona Goldasz ◽  
Maciej Sułowicz
Keyword(s):  
Simulated Annealing ◽  
Induction Motor ◽  
Induction Motors ◽  
Early Stage ◽  
Dynamic Properties ◽  
Short Circuit ◽  
State Variables ◽  
Novel Approach ◽  
Short Circuits ◽  
Identification Processes

This paper presents a method of inter-turn short-circuit identification in induction motors during load current variations based on a hybrid analytic approach that combines the genetic algorithm and simulated annealing. With this approach, the essence of the method relies on determining the reference matrices and calculating the distance between the reference matric values and the test matrix. As a whole, it is a novel approach to the process of identifying faults in induction motors. Moreover, applying a discrete optimization algorithm to search for alternative solutions makes it possible to obtain the true minimal values of the matrices in the identification process. The effectiveness of the applied method in the monitoring and identification processes of the inter-turn short-circuit in the early stage of its creation was confirmed in tests carried out for several significant state variables describing physical magnitudes of the selected induction motor model. The need for identification of a particular fault is related to a gradual increase in its magnitude in the process of the induction motor’s exploitation. The occurrence of short-circuits complicates the dynamic properties of the measured diagnostic signals of the system to a great extent.

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