A Capacitor Memory Erasing Technique for Pipeline ADCs

2014 ◽  
Vol 687-691 ◽  
pp. 3285-3288
Author(s):  
Ai Guo ◽  
Rong Bin Hu
Keyword(s):  
Sampling Rate ◽  
Pipeline Adc ◽  
Pipeline Adcs

A capacitor memory erasing technique for pipeline ADC is introduced, which insert a clearing phase to the traditional working timing sequence of the MDAC to erasing the residual charges on the sampling capacitor. The measurement shows that the 14-bit pipeline ADC adopting the proposed technique can achieve a sampling rate of 250MSPS with SNR 69dB, SFDR 80dB, compared with the traditional ADC of sampling rate 100MSPS, SNR 60dB, SFDR 71dB, which proves the proposed technique can improve the performances of pipeline ADCS obviously.

A Low Complexity Digital Foreground Calibration Technique for CMOS Pipelined ADCs

2019 ◽  
Vol 28 (03) ◽  
pp. 1950045
Author(s):  
Maliang Liu ◽  
Sirui Zhang ◽  
Hu Jin ◽  
Zhangming Zhu ◽  
Yintang Yang
Keyword(s):  
Input Signal ◽  
Low Complexity ◽  
Cmos Process ◽  
Pipeline Adc ◽  
Calibration Technique ◽  
Pipelined Adcs ◽  
Integral Nonlinearity ◽  
Linear And Nonlinear ◽  
Pipeline Adcs ◽  
Foreground Calibration

A low complexity all-digital foreground calibration technique to correct linear and nonlinear errors is proposed for pipeline ADCs in this paper. This method based on the integral nonlinearity (INL) piecewise least-squares fitting improves the linearity and obtains better SNR and SFDR performance. Two switches are added to the pre-stage reference ladder to achieve an accurate measurement of the INL and DNL of the backend ADC, which reduces the calibration complexity and improves the linearity effectively. The method was applied to a 125[Formula: see text]MS/s 14-bit pipeline ADC fabricated in a 0.18[Formula: see text][Formula: see text]m CMOS process. The raw DNL and INL were 1[Formula: see text]LSB and 8[Formula: see text]LSB, respectively, without calibration, but with calibration, they were respectively improved to 0.25[Formula: see text]LSB and 2[Formula: see text]LSB. The ADC achieved an SNR of 64.5[Formula: see text]dB, an SFDR of 73.8[Formula: see text]dB and a THD of 72.7[Formula: see text]dB with a 10[Formula: see text]MHz input signal without calibration, but after calibration these figures were improved to 72.6[Formula: see text]dB, 87.5[Formula: see text]dB and 86.6[Formula: see text]dB, respectively. Its application can also be extended to SAR ADC architecture, etc.

A 10bit 35MS/s Pipeline ADC with Low Power Consumption Applied in Medical Image Sensor

2014 ◽  
Vol 934 ◽  
pp. 193-198
Author(s):  
Jie Yang ◽  
Yan Jun Yang ◽  
Yun Zeng
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Medical Image ◽  
Sampling Rate ◽  
Image Sensor ◽  
Operating Voltage ◽  
Total Current ◽  
Pipeline Adc ◽  
Dynamic Comparator ◽  
Op Amp

In this paper, a Pipeline ADC applied in medical image sensor was designed, and the analog / digital operating voltage was 3.3/1.2V respectively, the area was 0.326mm2. Because the gain bootstrap op-amp structure has been improved and the dynamic comparator was used, which reduced the overall power consumption of the ADC. The simulation results showed that in the normal working mode, the total current of ADC was about 6.5 mA; when the sampling rate was lower than 17.5 MHz, the working mode was switched to the LP (low power) mode, and the total current was 4.5 mA. In addition, the tapeout test results showed that the other performance parameters of ADC were good, the sampling rate was 35 M/s, and SNR was 58dB.

Design of High Performance Sample Hold Amplifier for Pipeline ADC

2015 ◽  
Vol 743 ◽  
pp. 244-247
Author(s):  
R. Zou
Keyword(s):  
High Performance ◽  
Dynamic Range ◽  
Signal To Noise Ratio ◽  
Sampling Rate ◽  
Cmos Process ◽  
Pipeline Adc ◽  
Analog To Digital ◽  
Fully Differential ◽  
Dc Gain ◽  
Spurious Free Dynamic Range

A fully-differential switched-capacitor sample-and-hold amplifier (SHA) used in a 10-bit 30-MS/s pipeline analog-to-digital converter (ADC) was designed using a 0.13-μm CMOS process. Flip-around architecture was used in the SHA circuit to lower the power consumption. A gain-boosted operational amplifier (OPAMP) was designed with a DC gain of 87 dB and a unit gain bandwidth of 388MHz at a phase margin of 75 degree. The simulated results have shown that the SHA circuit reaches a spurious free dynamic range (SFDR) of 94 dB and a signal-to-noise ratio (SNR) of 76 dB for a 10.18 MHz input signal with 30 MS/s sampling rate.

A 16 Bit 250MSPS Pipeline ADC

2014 ◽  
Vol 602-605 ◽  
pp. 2744-2747
Author(s):  
Ting Li ◽  
Yong Zhang ◽  
Yan Wang ◽  
Lu Liu ◽  
Xu Wang
Keyword(s):  
High Speed ◽  
Sampling Rate ◽  
Cmos Process ◽  
Pipelined Adc ◽  
Pipeline Adc ◽  
Front End ◽  
Sampling Network ◽  
Sinusoidal Input ◽  
High Efficient ◽  
Circuit Structure

In this paper, a 16 bit 250MSPS pipelined ADC is presented. To alleviate noise induced by mismatching of the MDAC sampling network and comparator sampling network, scaling network structure is applied; to implement high-speed sampling, a high-efficient front-end circuit structure is presented; to further improve the sampling rate, a double duty cycle clock circuit is presented; to improve the linearity of the ADC, the sample and hold circuit is removed and the improved clock controlled boost circuit is used. Simulation confirms that the ADC shows more than 95dB of SFDR for a 25.39-MHz sinusoidal input at 2Vpp at full sampling rate from a 0.18um CMOS process.

The extended Fourier algorithm: Application in discrete optics and electron holography

1994 ◽  
Vol 52 ◽  
pp. 918-919
Author(s):  
E. Voelkl ◽  
L. F. Allard
Keyword(s):  
Fourier Transform ◽  
Fourier Transforms ◽  
Sampling Rate ◽  
Electron Holography ◽  
Optical Bench ◽  
Fourier Space ◽  
Ccd Cameras ◽  
Simulated Image ◽  
Initial Sampling ◽  
Fourier Algorithm

The conventional discrete Fourier transform can be extended to a discrete Extended Fourier transform (EFT). The EFT allows to work with discrete data in close analogy to the optical bench, where continuous data are processed. The EFT includes a capability to increase or decrease the resolution in Fourier space (thus the argument that CCD cameras with a higher number of pixels to increase the resolution in Fourier space is no longer valid). Fourier transforms may also be shifted with arbitrary increments, which is important in electron holography. Still, the analogy between the optical bench and discrete optics on a computer is limited by the Nyquist limit. In this abstract we discuss the capability with the EFT to change the initial sampling rate si of a recorded or simulated image to any other(final) sampling rate sf.

The Attenuation of Very Low Frequency Brain Oscillations in Transitions from a Rest State to Active Attention

2009 ◽  
Vol 23 (4) ◽  
pp. 191-198 ◽  
Author(s):  
Suzannah K. Helps ◽  
Samantha J. Broyd ◽  
Christopher J. James ◽  
Anke Karl ◽  
Edmund J. S. Sonuga-Barke
Keyword(s):  
Brain Activity ◽  
Sampling Rate ◽  
Low Frequency ◽  
Future Research ◽  
Adhd Symptoms ◽  
Default Mode ◽  
Very Low Frequency ◽  
Wide Range ◽  
Interference Hypothesis ◽  
Mode Interference

Background: The default mode interference hypothesis ( Sonuga-Barke & Castellanos, 2007 ) predicts (1) the attenuation of very low frequency oscillations (VLFO; e.g., .05 Hz) in brain activity within the default mode network during the transition from rest to task, and (2) that failures to attenuate in this way will lead to an increased likelihood of periodic attention lapses that are synchronized to the VLFO pattern. Here, we tested these predictions using DC-EEG recordings within and outside of a previously identified network of electrode locations hypothesized to reflect DMN activity (i.e., S3 network; Helps et al., 2008 ). Method: 24 young adults (mean age 22.3 years; 8 male), sampled to include a wide range of ADHD symptoms, took part in a study of rest to task transitions. Two conditions were compared: 5 min of rest (eyes open) and a 10-min simple 2-choice RT task with a relatively high sampling rate (ISI 1 s). DC-EEG was recorded during both conditions, and the low-frequency spectrum was decomposed and measures of the power within specific bands extracted. Results: Shift from rest to task led to an attenuation of VLFO activity within the S3 network which was inversely associated with ADHD symptoms. RT during task also showed a VLFO signature. During task there was a small but significant degree of synchronization between EEG and RT in the VLFO band. Attenuators showed a lower degree of synchrony than nonattenuators. Discussion: The results provide some initial EEG-based support for the default mode interference hypothesis and suggest that failure to attenuate VLFO in the S3 network is associated with higher synchrony between low-frequency brain activity and RT fluctuations during a simple RT task. Although significant, the effects were small and future research should employ tasks with a higher sampling rate to increase the possibility of extracting robust and stable signals.

Quantitative evaluation of slow fluctuations of the volume of liquids inside cranial cavity

2019 ◽  
pp. 51-63 ◽  
Author(s):  
Yu. E. Moskalenko ◽  
T. I. Kravchenko ◽  
Yu. V. Novozhilova
Keyword(s):  
Brain Activity ◽  
Sampling Rate ◽  
Age Groups ◽  
Pulse Amplitude ◽  
Cranial Cavity ◽  
Current Frequency ◽  
Physiological Indicators ◽  
Physiological Phenomenon ◽  
Long Time ◽  
Manned Space

Introduction. Slow fl uctuations in the volume and pressure of liquids in the cranial cavity have been known for a long time and have been studied for more than 100 years. However, their quantitative indicators and their practical signifi cance remain unclear until now due to the diffi culties of research. Nevertheless, it was found that they were connected with the brain activity, which made it possible to use them as one of the physiological indicators in studying the problems of manned space fl ights. Goal of research — to study the possibility of using spectral analysis of slow fl uctuations of the volume of liquids inside the cranium in order to realize the quantitative assessment of their indicators with the use of modern microelectronics and computer technology.Materials and methods. In order to solve this problem we created a complex, in which rheoencephalograph-RG-01 («Mizar») was used as a converter-modulator of physiological signals into electrical oscillations. The device was connected with the ADC (Firm «ADIstrument»), Its software allows to calculate the spectrogram with a sampling rate of 128 kHz. Studies were conducted on volunteers of younger, middle and older age groups. The respiratory rate and the electrocardiography were registered together with the rheoencephalography. Electrodes were fi xed on the volonteers′ fronto-mastoid area.Results. Slow fl uctuations the cranium representan independent physiological phenomenon. The most considerable and valuable were fl uctuations in 0,1–0,3 Hz. It was found that current frequency of 100 or 200 kHz and frequency for quantization of 80–100 kHz was optimal for performing their spectrograms. The structure of such diagram consists of 4–7 peaks with amplitude of 0,4–0,7 units compared with REG pulse amplitude. They depend on age and are characterized by hemispheric asymmetry. Spectral diagrams of slow fl ucation inside cranium are representing inpendent physiological phenomenon. These fl uctuations are not connected by common origin, with heart activity and respiration. They are connected by nature with brain activity and PRM.Conclusion. Can be an informative method for diagnostic and assessment of general status of osteopathic patients well as for the assessment of mechanisms of action of some osteopathic techniques.

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