3× 1018 - 1 × 1019 cm -3 Al+ Ion Implanted 4H-SiC: Annealing Time Effect

2020 ◽  
Vol 1004 ◽  
pp. 683-688
Author(s):  
Roberta Nipoti ◽  
Antonella Parisini ◽  
Virginia Boldrini ◽  
Salvatore Vantaggio ◽  
Mariaconcetta Canino ◽  
...  
Keyword(s):  
Annealing Time ◽  
Carrier Transport ◽  
Annealing Temperature ◽  
Hole Mobility ◽  
Hole Density ◽  
Fitting Procedure ◽  
Current Voltage ◽  
Hall Effect Measurements ◽  
Extended States ◽  
Post Implantation

This work takes into account low Al implanted concentrations of 3 x 1018 cm-3 and 1 x 1019 cm-3 to compare the results of 1600°C and 1950°C post-implantation annealing treatments, done with two different annealing times per given implanted Al concentration and post implantation annealing temperature. Current-voltage and Hall effect measurements were performed to have the drift hole density and the drift hole mobility curves in the temperature range 100 - 650 K. The fitting of these curves in the frame of a carrier transport into the extended states of the valence band were performed to estimate the Al acceptor density, the donor compensator density, and the Al acceptor ionization energy. Peculiar feature of hole density and hole mobility curves is a contemporaneous increase of both carrier density and mobility values with increasing annealing time, which is congruent with the output parameters of the fitting procedure. The latter shows an almost stable Al electrical activation and a decrease of compensation with increasing annealing time for constant annealing temperature and given implanted Al concentration.

Modeling the Effect of Annealing and Regioregularity on Electron and Hole Transport Characteristics of Bulk Heterojunction Organic Photovoltaic Devices

2010 ◽  
Vol 1270 ◽  
Author(s):  
Shabnam Shambayati ◽  
Bobak Gholamkhass ◽  
Soheil Ebadian ◽  
Steven Holdcroft ◽  
Peyman Servati
Keyword(s):  
Annealing Time ◽  
Electron Mobility ◽  
Bulk Heterojunction ◽  
Acid Methyl Ester ◽  
Hole Mobility ◽  
Phase Segregation ◽  
Hole Transport ◽  
Trap States ◽  
Current Voltage ◽  
Steep Decline

AbstractIn this study, the dark current-voltage characteristics of electron-only and hole-only poly(3-hexyl thiophene) (P3HT):[6,6]-phenyl C61-butyric acid methyl ester (PCBM) as a function of regioregularity (RR) and annealing time is investigated using the mobility edge (ME) model. This model is used to analyze the degradation of electron and hole mobilities as a function of annealing time for 93%-RR and 98%-RR P3HT:PCBM devices. The hole mobility is almost unchanged by the RR nature of P3HT and thermal annealing. The electron mobility, however, behaves differently after annealing. The electron mobility of 98%-RR devices, which is initially higher than that of the 93%-RR devices, experiences a steep decline with annealing. Based on ME analysis, this is due to an increase in trap states in the exponential tail caused by phase segregation of solid state blends of 98%-RR polymer and PCBM. The electron mobility of 93%-RR devices increases with annealing due to an optimization of nano-phase separated morphology.

Ion Implanted p+/n Diodes: Post-Implantation Annealing in a Silane Ambient in a Cold-Wall Low-Pressure CVD Reactor

2006 ◽  
Vol 527-529 ◽  
pp. 819-822
Author(s):  
Fabio Bergamini ◽  
Shailaja P. Rao ◽  
Antonella Poggi ◽  
Fabrizio Tamarri ◽  
Stephen E. Saddow ◽  
...  
Keyword(s):  
Room Temperature ◽  
Annealing Temperature ◽  
Low Pressure ◽  
Cold Wall ◽  
Current Voltage Characteristic ◽  
Process Yield ◽  
Annealing Temperatures ◽  
Current Voltage ◽  
Post Implantation

This work reports the realization and characterization of 4H-SiC p+/n diodes with the p+ anodes made by Al+ ion implantation at 400°C and post-implantation annealing in silane ambient in a cold-wall low-pressure CVD reactor. The Al depth profile was almost box shaped with a height of 6×1019 cm-3 and a depth of 160 nm. Implant anneals were performed in the temperature range from 1600°C to 1700°C. As the annealing temperature was increased, the silane flow rate was also increased. This annealing process yields a smooth surface with a roughness of the implanted area of 1.7 - 5.3 nm with increasing annealing temperature. The resistivity of the implanted layer, measured at room temperature, decreased for increasing annealing temperatures with a minimum value of 1.4 0-cm measured for the sample annealed at 1700°C. Considering only the current-voltage characteristic of a diode that could be modeled as an abrupt p/n junction within the frame of the Shockley theory, the diode process yield and the diode leakage current decreased, respectively, from 93% to 47% and from 2×10-7 Acm-2 to 1×10-8 Acm-2 at 100 V reverse bias, for increasing post implantation annealing temperature.

scholarly journals Ion Implanted Phosphorous for 4H-SiC VDMOSFETs Source Regions: Effect of the Post Implantation Annealing Time

2020 ◽  
Vol 1004 ◽  
pp. 698-704
Author(s):  
Roberta Nipoti ◽  
Antonella Parisini ◽  
Virginia Boldrini ◽  
Salvatore Vantaggio ◽  
Marco Gorni ◽  
...  
Keyword(s):  
Annealing Time ◽  
Electron Mobility ◽  
Annealing Temperature ◽  
Source Area ◽  
Source Regions ◽  
Al Distribution ◽  
Van Der Pauw ◽  
Sic Wafer ◽  
Post Implantation ◽  
Ion Implanted

Van der Pauw devices have been fabricated by double ion implantation processes, namely P+ and Al+ co-implantation. Similarly to the source area in a SiC VD-MOSFET, a 5 × 1018 cm-3 P plateau is formed on the top of a buried 3 × 1018 cm-3 Al distribution for electrical isolation from the n- epilayer. The post implantation annealing temperature was 1600 °C. Annealing times equal to 30 min and 300 min have been compared. The increase of the annealing time produces both an increase of electron density as well as electron mobility. For comparison a HPSI 4H-SiC wafer, 1×1020 cm-3 P+ ion implanted and 1700 °C annealed for 30 min was also characterized.

scholarly journals (Au, Ag)/Al0.08In0.08Ga0.84N/ (Au, Ag) Metal-semiconductor-metal (MSM) Photodetectors

2021 ◽  
pp. 72-79
Author(s):  
Alaa Ghazai ◽  
Marwaa Mohammed
Keyword(s):  
Annealing Time ◽  
Annealing Temperature ◽  
Commercial Sample ◽  
Metal Semiconductor Metal ◽  
Current Voltage ◽  
Ag Contact ◽  
First Time ◽  
Msm Photodetectors ◽  
Quality Surface

Metal-semiconductor-metal (MSM) photodetectors (PDs) based on gold and silver (Au, Ag)/Al0.08In0.08Ga0.84N (commercial sample)/ (Au, Ag) have been fabricated and characterized.   The effect of annealing temperature of As deposit, 400, 500, and 600 0C for 30 min on the topography and electrical properties of   Au contact on Al0.08In0.08Ga0.84N thin film have been characterized and optimized using Current-Voltage (I-V) characteristic. Schottky barrier height (SBH) and ideality factor (n) of Au/ Al0.08In0.08Ga0.84N interface were 1.223 eV and 1.773 at 50 0C annealing temperature for 30 min respectively, and it is found that contact has a high-quality surface. Also, with the same procedure, the effect of annealing time of 15, 30, 45 minutes, and 1 hour have been studied and optimized. The results revealed that the best annealing time is 30 min which has the highest SBH. Au contact compared with Ag contact used to first time as best our knowledge with the optimal condition to select the best metal for MSM photodetectors (PDs). The ideal characterization of Au, Ag/AlInGaN/Au, Ag MSMPDs on Si substrate depend on responsivities of 0.201 and 0.153 A W-1, quantum efficiencies of 71% and 57%, and NEPs of 3.55×10-4 and 1.45×10-3W-1, respectively have been also studied compared. The height SBH and QE for the samples grown on Si was at Au contact which proposed to use in such optoelectronic devices.

Grain Boundary Atomic Structures in SrTiO3 and BaTiO3

2007 ◽  
Vol 558-559 ◽  
pp. 851-856 ◽  
Author(s):  
Takahisa Yamamoto ◽  
Teruyasu Mizoguchi ◽  
S.Y. Choi ◽  
Yukio Sato ◽  
Naoya Shibata ◽  
...  
Keyword(s):  
Grain Boundary ◽  
Grain Boundaries ◽  
Annealing Temperature ◽  
Unit Length ◽  
Rate Dependency ◽  
Atomic Structures ◽  
Current Voltage ◽  
Single Grain ◽  
Current Voltage Characteristics ◽  
Theoretical Results

SrTiO3 bicrystals with various types of grain boundaries were prepared by joining two single crystals at high temperature. By using the bicrystals, we examined their current-voltage characteristics across single grain boundaries from a viewpoint of point defect segregation in the vicinity of the grain boundaries. Current-voltage property in SrTiO3 bicrystals was confirmed to show a cooling rate dependency from annealing temperature, indicating that cation vacancies accumulate due to grain boundary oxidation. The theoretical results obtained by ab-initio calculation clearly showed that the formation energy of Sr vacancies is the lowest comparing with Ti and O vacancies in oxidized atomosphere. The formation of a double Schottky barrier (DSB) in n-type SrTiO3 is considered to be closely related to the accumulation of the charged Sr vacancies. Meanwhile, by using three types of low angle boundaries, the excess charges related to one grain boundary dislocation par unit length was estimated. In this study, we summarized our results obtained in our group.

Time-resolved Photoconductivity as a Probe of Carrier Transport in Microcrystalline Silicon

2006 ◽  
Vol 910 ◽  
Author(s):  
Steve Reynolds
Keyword(s):  
Density Of States ◽  
Carrier Mobility ◽  
Carrier Transport ◽  
Film Growth ◽  
Hole Mobility ◽  
Transport Parameters ◽  
Microcrystalline Silicon ◽  
Time Resolved ◽  
Transient Photoconductivity ◽  
Transport Measurements

AbstractThe use of transient photoconductivity techniques in the investigation of carrier transport in microcrystalline silicon is described. Results are presented which highlight variations in transport parameters such as carrier mobility and density of states with structure composition. Hole mobility is significantly enhanced by crystalline content in the film of 10% or less. The density of states inferred from transport measurements parallel to and at right angles to the direction of film growth differ somewhat, suggesting that transport may be anisotropic.

About the Electrical Activation of 1×1020 cm-3 Ion Implanted Al in 4H-SiC at Annealing Temperatures in the Range 1500 - 1950°C

2018 ◽  
Vol 924 ◽  
pp. 333-338 ◽  
Author(s):  
Roberta Nipoti ◽  
Alberto Carnera ◽  
Giovanni Alfieri ◽  
Lukas Kranz
Keyword(s):  
Activation Energy ◽  
Sheet Resistance ◽  
Annealing Time ◽  
Thermal Activation ◽  
Room Temperature ◽  
Annealing Temperature ◽  
Thermal Activation Energy ◽  
Electrical Activation ◽  
Temperature Range ◽  
Annealing Temperatures

The electrical activation of 1×1020cm-3implanted Al in 4H-SiC has been studied in the temperature range 1500 - 1950 °C by the analysis of the sheet resistance of the Al implanted layers, as measured at room temperature. The minimum annealing time for reaching stationary electrical at fixed annealing temperature has been found. The samples with stationary electrical activation have been used to estimate the thermal activation energy for the electrical activation of the implanted Al.

Temperature Sensors Based on AlN/4H-SiC Diodes

2021 ◽  
Vol 13 (7) ◽  
pp. 1318-1323
Author(s):  
Myeong-Cheol Shin ◽  
Dong-Hyeon Kim ◽  
Seong-Woo Jung ◽  
Michael A. Schweitz ◽  
Sang-Mo Koo
Keyword(s):  
Annealing Temperature ◽  
Schottky Diodes ◽  
Forward Bias ◽  
Temperature Sensors ◽  
Electrical Characteristics ◽  
Voltage Range ◽  
Radio Frequency Sputtering ◽  
Sensing Applications ◽  
Current Voltage ◽  
Dc Bias

ABSTRACTThis study report on the formation of AlN/SiC heterostructure Schottky diodes for use of temperature sensing applications enhance the sensitivity. We analyzed the sensitivity of the AlN/SiC Schottky diode sensor depending on the annealing temperature. AlN/4H-SiC Schottky diodes were fabricated by depositing aluminum nitride (AlN) thin film on 4H/SiC by radio frequency sputtering. The forward bias electrical characteristics were determined under DC bias (in the voltage range of 0–1.5 V). The ideality factor, barrier height, and sensitivity were derived through current–voltage–temperature (I–V–T) measurements in the temperature range of 300–500 K. The sensitivity of the AlN/4H-SiC Schottky barrier diode ranged from 2.5–5.0 mV/K.

Effect of Homogenization Annealing on Wear Properties of Thixo-Extrued Copper Alloy

2022 ◽  
Vol 327 ◽  
pp. 71-81
Author(s):  
Yun Xin Cui ◽  
Han Xiao ◽  
Chi Xiong ◽  
Rong Feng Zhou ◽  
Zu Lai Li ◽  
...  
Keyword(s):  
Friction Factor ◽  
Annealing Time ◽  
Copper Alloy ◽  
Loss Rate ◽  
Annealing Temperature ◽  
Brinell Hardness ◽  
Annealing Process ◽  
Wear Properties ◽  
Wear Performance ◽  
Semi Solid

The semi-solid extruded CuSn10P1 alloy bushings were homogenization annealed. The effects of annealing process on the hardness and wear properties of bushings were researched. The results show the Brinell hardness increases firstly and then decreases with the increase of annealing temperature and annealing time. With the annealing temperature increasing, the grinding loss rate and friction factor decrease firstly and then increase. At the annealing time of 120 min, the grinding loss rate decreases from 7% at the annealing temperature of 450 °C to 6% at 500 °C, and then increases from 6% at 500 °C to 12% at 600 °C. The friction factor decreases from 0.54 to 0.48 and then increases to 0.83. At the annealing temperature of 500 °C, the grinding loss rate decreases from 11% at the annealing time of 60 min to 6% at 120 min, and then increases to 15% at 150 min. The friction factor decreases from 0.67 to 0.48 and then increases to 0.72. The best wear performance and Brinell hardness can be obtained at annealing temperature of 500 °C for 120 min.

Thermally activated current–voltage asymmetry in quantum-well inter-subband photodetectors

1996 ◽  
Vol 74 (S1) ◽  
pp. 9-15 ◽  
Author(s):  
P. V. Kolev ◽  
M. J. Deen ◽  
H. C. Liu ◽  
Jianmeng Li ◽  
M. Buchanan ◽  
...  
Keyword(s):  
Quantum Well ◽  
Carrier Transport ◽  
Transport Phenomena ◽  
Infrared Region ◽  
Avalanche Photodetectors ◽  
Long Wavelength ◽  
Hot Carrier ◽  
Thermally Activated ◽  
Current Voltage ◽  
Long Wavelength Infrared

Continuing research interest in quantum-well inter-subband-based devices can be associated with its prospects for numerous optoelectronic applications in the long wavelength infrared region. This paper presents experimentally measured field dependence of the thermally activated effective-barrier lowering in quantum-well inter-subband photodetectors (QWIPs). This barrier lowering is considered to be the main cause of the commonly observed asymmetry in the current–voltage characteristics of QWIPs. The research results presented here are important for understanding the factors determining the dark-current mechanisms that are crucial for further improvement in the characteristics of these devices. The study of current-carrier transport phenomena in a quantum well is also of interest for developing quantum-well lasers and avalanche photodetectors based on intraband processes, and also transistors based on ballistic or hot carrier transport phenomena.

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