Chemical Mechanical Polishing on Extremely Low Expansion Glass Ceramic Wafers

2016 ◽  
Vol 874 ◽  
pp. 389-394 ◽  
Author(s):  
Zhi Feng Shi ◽  
Zhen Yu Zhang ◽  
Si Ling Huang ◽  
Bo Ya Yuan ◽  
Xiao Guang Guo ◽  
...  

Extremely low expansion glass ceramics are widely used in integrated circuit (IC), liquid crystal display (LCD) lithography, high-precision measurement and astronomy, due to their excellent mechanical properties and chemical stability at higher temperatures. Nevertheless, the extremely low expansion glass ceramics are hard-to-machine materials due to their hard-brittle nature, resulting in cracking, chipping and scratching induced in conventional machining. This leads to higher surface roughness, and is not qualified for high-performance devices. In this study, surface roughness of 0.447 and 4.904 nm are achieved for Ra and peak-to valley (PV), respectively with a measurement area of 70×53 μm2 after chemical mechanical polishing (CMP). Firstly, the glass ceramic wafers are lapped using silicon carbide (SiC) abrasives on a cast-iron plate. After lapping, the wafers are polished by CeO2 slurry in a sequence of 3 μm and 500 nm in diameter, and polyurethane and floss pads are used correspondingly. Finally, CMP is employed on the glass ceramic wafers. Floss pad and silica slurry are used in CMP in an alkaline solution with a pH value of 8.5. After CMP, the wafers are cleaned and dried by deionized wafer and compressed air, respectively.

2015 ◽  
Vol 2015 (DPC) ◽  
pp. 001928-001955
Author(s):  
Naoya Watanabe ◽  
Masahiro Aoyagi ◽  
Daisuke Katagawa ◽  
Tsubasa Bandoh ◽  
Takahiko Mitsui ◽  
...  

Three-dimensional integrated circuits (3D-ICs) using through silicon via (TSV) have been developed as an emerging technology that can lead to significant progress (1–4). Among various TSV processes, the via-middle process has potential for wide spread use because formation of small-sized TSVs is relatively easy in the via-middle process. However, TSV reveal process must be performed for electrical contact in the via-middle process. This TSV reveal process is important because it can influence the metal contamination and stacking yield of 3D-ICs. Conventionally, TSV reveal is performed by Si grinding and Si dry etching (5). A disadvantage of that method is the resultant TSV depth deviation, which can cause bonding failure during wafer/chip stacking. In (6), TSV leveling was performed by introducing a chemical mechanical polishing (CMP) step after deposition of the backside insulator. However, the revealed TSVs break during CMP step if they exceed a certain height. To overcome these problems, we developed a novel TSV reveal process comprising direct Si/Cu grinding and metal contamination removal (7,8). First, simultaneous grinding of Cu and Si was performed using a novel vitrified grinding wheel. In situ cleaning with a high-pressure micro jet and the inelastic porous structure of the grinding wheel suppressed the adhesion of Cu contaminants to the Si, and TSVs were leveled and exposed. Next, an electroless Ni-B film was deposited on the Cu surface of the TSVs. The Si was etched with an alkaline solution, whereas the Cu was protected by the Ni-B film. An insulator was deposited, and then the insulator on the top surface of the TSV was removed. We achieved the backside reveal of TSVs without TSV depth deviation and suppressed Cu contamination to less than 1e11 atoms/cm2. However, after direct Si/Cu grinding with an 8000 grit grinding wheel, the average surface roughness of Si was 5–10 nm, which is larger than that after chemical mechanical polishing (CMP). In this paper, we developed vitrified grinding wheels with very high grit numbers (#30,000 and #45,000) and present an improved version of our TSV reveal process. The average surface roughness of Si after Si/Cu grinding was approximately 3 nm for the 30,000 grit grinding wheel and 1 nm for the 45,000 grit grinding wheel. This value is equivalent to that after CMP. The improved process produced a uniform reveal of 4-um-diameter TSVs without TSV depth deviation and Cu contamination. The Cu contaminant concentration on Si region between TSVs was small (<3e10 atoms/cm2). This process will reduce the cost of the TSV reveal process and considerably improve the TSV yield.


Cerâmica ◽  
2016 ◽  
Vol 62 (362) ◽  
pp. 121-127 ◽  
Author(s):  
P. P. Kist ◽  
I. L. Aurélio ◽  
M. Amaral ◽  
L. G. May

Abstract The purpose of the present study was to determine the biaxial flexural strength (BFS) of a CAD/CAM leucite reinforced glass-ceramic ground by diamond burs of different grit sizes and the influence of surface roughness on the BFS. For this, 104 plates were obtained from CAD/CAM ceramic blocks and divided into 4 groups (n = 26), according to bur grit size: extra-fine, fine, medium and coarse. Roughness parameters (Ra, RyMax) were measured, and plates were kept dry for 7 days. The flexural test was carried out and BFS was calculated. Ra, RyMax and BFS data were subjected to analysis of variance and post-hoc test. Weibull analysis was used to compare characteristic strength and Weibull modulus. Regression analysis was performed for BFS vs. Ra and RyMax. When burs with coarse grit were used, higher surface roughness values were found, causing a negative effect on the ceramic BFS (117 MPa for extra-fine, and 83 MPa for coarse). Correlation (r) between surface roughness and BFS was 0.78 for RyMax and 0.73 for Ra. Increases in diamond grit size have a significant negative effect on the BFS of leucite-reinforced glass-ceramics, suggesting that grinding of sintered glass-ceramic should be performed using burs with the finest grit possible in order to minimize internal surface flaws and maximize flexural strength.


2010 ◽  
Vol 97-101 ◽  
pp. 3-6 ◽  
Author(s):  
Ming Yi Tsai

A diamond conditioner or dresser is needed to regenerate the asperity structure of the pad and recover its designed ability in chemical mechanical polishing (CMP) process. In this paper a new design of diamond conditioner is made by shaping a sintered matrix of polycrystalline diamond (PCD) to form teethed blades. These blades are arranged and embedded in epoxy resin to make a designed penetration angle, called the blade diamond disk. The dressing characteristics of pad surface textures are studied by comparison with conventional diamond conditioner. It is found that the height variation of the diamond tip of blade diamond disk is significantly smaller than the conventional diamond disk. The dressing rate of blade diamond disk is lower than that of the conventional diamond disk, and hence the pad life is prolonged. As a result, reduction of the cost CMP is expected. In addition the pad surface roughness Ra of about 3.79μm is less than Ra of about 4.15μm obtained after dressing using a conventional diamond disk.


Materials ◽  
2020 ◽  
Vol 13 (2) ◽  
pp. 381 ◽  
Author(s):  
Roxana-Diana Vasiliu ◽  
Sorin Daniel Porojan ◽  
Mihaela Ionela Bîrdeanu ◽  
Liliana Porojan

Dental ceramic restorations are widely spread nowadays due to their aesthetics and biocompatibility. In time, the colour and structure of these ceramic materials can be altered by aging processes. How does artificial aging affect the optical and surface roughness of ceramics? This study aims to assess the effect of thermocycling, surface treatments and microstructure upon translucency, opalescence and surface roughness on CAD-CAM and heat-pressed glass-ceramic. Forty-eight samples (1.5 mm thickness) were fabricated from six types of A2 MT ceramic: heat-pressed and milled glass-ceramic (feldspathic, lithium disilicate and zirconia reinforced lithium silicate). The samples were obtained respecting the manufacturer’s instructions. The resulted surfaces (n = 96) were half glazed and half polished. The samples were subjected to thermocycling (10,000 cycles) and roughness values (Ra and Rz), colour coordinates (L*, a*, b*) and microstructural analyses were assessed before and after thermocycling. Translucency (TP) and opalescence (OP) were calculated. Values were statistically analysed using ANOVA test (one way). TP and OP values were significantly different between heat-pressed and milled ceramics before and also after thermocycling (p < 0.001). Surface treatments (glazing and polishing) had a significant effect on TP and OP and surface roughness (p < 0.05). The heat-pressed and milled zirconia reinforced lithium silicate glass-ceramic experienced a loss in TP and OP. Ra and Rz increased for the glazed samples, TP and OP decreased for all the samples after thermocycling. Microstructural analyse revealed that glazed surfaces were more affected by the thermocycling and especially for the zirconia reinforced lithium silicate ceramic. Optical properties and surface roughness of the chosen ceramic materials were affected by thermocycling, surface treatments and microstructural differences. The least affected of the ceramics was the lithium disilicate ceramic heat-pressed polished and glazed.


2014 ◽  
Vol 900 ◽  
pp. 651-655
Author(s):  
Xiao Ming Chen ◽  
Ke Qin Wang ◽  
Song Song Li

In the process of integrated circuit design and manufacturing, dummy metal fill can improve the planarity of layout after Chemical Mechanical Polishing (CMP). However, it will also cause lithography distortion and Critical Area (CA) variation. This paper compares and analyzes the influences of lithography distortion due to metal fill on CA from the perspectives of different defect particles based on 45nm technology node. The results indicate that dummy metal fill can increase open CA after lithography and the defect particle with the diameter of 0.066um leads to the largest increment percentage of open CA, which will take up almost 10%. This paper is instructive in researching dummy metal fill and CA or related fields in the future.


2015 ◽  
Vol 645-646 ◽  
pp. 352-355
Author(s):  
Juan Wang ◽  
Ru Wang ◽  
Guo Dong Chen

At present, the chemical mechanical polishing is the only means for global planarization of an integrated circuit. After the node of the integrated circuit processing comes into 45nm, the diameter of wafer is 300mm, and the copper interconnect layer is above the 10 layer. In the same time the new low dielectric constant materials are used to the integrated circuit processing. That requires the property of the slurry used in the chemical mechanical polishing stricter. So the domestic and international companies carry out a series research works. Based on investigation and research for many years, the new alkaline copper rough slurry has been developed by the teachers and students in the Hebei University of Technology. The slurry has advantages as disadvantages. The composition of cost-effective slurry is simple and the effect of chemical mechanical polishing is good. But its stability is poor. In order to improve the stability, the compositions of the slurry need to adjust.The new alkaline copper rough slurry composed by abrasive, surface, chelating agent, oxidizing agent and deionized water. Experiments investigate the influence rule of copper polishing rate by the concentration of abrasive, the content of surface, the content of oxidizing agent and the content of chelating agent. The conclusion is arrived. When the concentration of abrasive is 4%, the content of surfactant is 10ml/l, the content of chelating agent is 10ml/l and the content of oxidizing agent is 5ml/l, the copper polishing rate keep 5000 Å /min.


2016 ◽  
Vol 874 ◽  
pp. 415-419
Author(s):  
Ze Wei Yuan ◽  
Yan He ◽  
Quan Wen ◽  
Hai Yang Du

In order to avoid the environmental pollution and the harm to body of traditional polishing slurries, an environment-friendly chemical mechanical polishing technology is proposed for SiC wafer in this study. With this method, SiC material is removed by utilizing the strong oxidability of nanotitanium dioxide particles in chemical mechanical slurry in the existence of ultraviolet. While, the oxidbillity will recede in absence of ultraviolet when the polishing process finishes. On the basis of investigating in the reaction mechanism between SiC and nanotitanium dioxide, the slurries are prepared for the environment-friendly chemical mechanical polishing technology. The results show that the ultraviolet-assisted CMP slurry has strong oxidation for SiC material. This method is high-efficient for polishing SiC wafer. The surface roughness is reduced to about Ra 0.1μm from Ra 0.818μm after polishing for one hour.


2004 ◽  
Vol 816 ◽  
Author(s):  
Brian Tang ◽  
Duane Boning

AbstractThe current bedrock technology for integrated circuit (IC) planarization, chemical-mechanical polishing is beginning to play an important role in microelectromechnical systems (MEMS). However, MEMS devices operate with bigger feature sizes in comparison to ICs, in order to fulfill mechanical functions. We present an experiment to characterize and model a polysilicon CMP process with the specific goal of examining MEMS-sized test structures. We utilize previously discussed CMP models and examine whether assumptions from IC CMP can be applied to MEMS CMP. An analysis of the data collected points to a polishing dependence on not only pattern density, but also partly on feature size or feature configuration. The existing pattern density and step height CMP models are able to capture the major trends in up and down area polishing. However, certain layout features relevant to MEMS are difficult to predict, motivating the need for further model development and application.


2008 ◽  
Vol 375-376 ◽  
pp. 278-282 ◽  
Author(s):  
Jun Li ◽  
Yong Zhu ◽  
Chuang Tian Chen

Transparent Nd:YAG ceramics which are very hard and brittle materials, are very difficult to be polished. There are many micro scratches or damages on the surface after mechanical polishing with Al2O3. In order to remove micro scratches or damages, chemical mechanical polishing (CMP) was adopted to manufacture Nd:YAG ceramics. In the polishing experiment, Pellon and Chemcloth pads were utilized for chemical mechanical polishing of Nd:YAG ceramics. Colloidal SiO2 was selected as the polishing slurry in two different polishing environments, acidity and alkalinity. The surface roughness was determined by using atomic force microscope. In this study, four polishing experimental combinations that each combination contains one of the two pads and one of the two polishing environments were carried out in the optimum polishing condition. Then the high quality surface of transparent Nd:YAG ceramics with the best surface roughness of < 0.2 nm RMS and few micro scratches or damages is obtained by adopting CMP process with Chemcloth pad and colloidal SiO2 in acidic condition.


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