High-Temperature Operation of 50 A (1600 A/cm2), 600 V 4H-SiC Vertical-Channel JFETs for High-Power Applications

2008 ◽  
Vol 600-603 ◽  
pp. 1055-1058 ◽  
Author(s):  
Lin Cheng ◽  
Igor Sankin ◽  
Volodymyr Bondarenko ◽  
Michael S. Mazzola ◽  
James D. Scofield ◽  
...  
Keyword(s):  
High Temperature ◽  
High Power ◽  
Room Temperature ◽  
Field Effect Transistors ◽  
Vertical Channel ◽  
Gate Bias ◽  
Linear Region ◽  
Forward Current ◽  
Source Current ◽  
High Temperature Operation

In this work we have demonstrated the high-temperature operations of 600 V/50 A 4HSiC vertical-channel junction field-effect transistors (VJFETs) with an active area of 3 mm2. Specific-on resistance (RONSP) in the linear region of a single die is less than 2.6 mW.cm2 while the drain-source current is over 50 A under a gate bias (VGS) of 3 V. A reverse blocking gain of 54 is obtained at gate bias ranging from -13 V to -23 V and drain-source leakage current (IRDS) of 200 μA. To demonstrate the use of SiC VJFETs for high-power applications, eight 3 mm2 SiC VJFETs are bonded in a high current 600-V module. RONSP in the linear region of these eight-paralleled SiC VJFETs is 2.8 mW.cm2 at room temperature and increased to 5.35 mW.cm2 at an ambient temperature of 175 °C in air, corresponding to a shift of 0.61%/°C from room temperature to 175 °C. Meanwhile, the forward current is over 360 A at room temperature and reduces to 188 A at 175 °C at drain-source bias (VDS) of 5.25 V and VGS of 3 V.

Fast Switching (41 MHz), 2.5 mΩ•cm2, High Current 4H-SiC VJFETs for High Power and High Temperature Applications

2006 ◽  
Vol 527-529 ◽  
pp. 1183-1186 ◽  
Author(s):  
Lin Cheng ◽  
Janna R. B. Casady ◽  
Michael S. Mazzola ◽  
V. Bondarenko ◽  
Robin L. Kelley ◽  
...  
Keyword(s):  
High Temperature ◽  
Field Effect Transistors ◽  
Vertical Channel ◽  
Drain Current ◽  
Switching Frequency ◽  
High Current ◽  
Linear Region ◽  
Fast Switching ◽  
Increasing Temperature ◽  
High Temperature Operation

In this work we have demonstrated the operation of 600-V class 4H-SiC vertical-channel junction field-effect transistors (VJFETs) with 6.6-ns rise time, 7.6-ns fall time, 4.8-ns turn-on and 5.4-ns turn-off delay time at 2.5 A drain current (IDS), which corresponds to a maximum switching frequency of 41 MHz – the fastest ever reported switching of SiC JFETs to our knowledge. At IDS of 12 A, a 19.1 MHz maximum switching frequency has been also achieved. Specific on-resistance (Rsp-on) in the linear region is 2.5 m·cm2 at VGS of 3 V. The drain current density is greater than 1410 A/cm2 at 9 V drain voltage. High-temperature operation of the 4H-SiC VJFETs has also been investigated at temperatures from 25 °C to 225 °C. Changes in the on-resistance with temperature are in the range of 0.90~1.33%/°C at zero gate bias and IDS of 50 mA. The threshold voltage becomes more negative with a negative shift of 0.096~0.105%/°C with increasing temperature.

1700V, 5.5mOhm-cm2 4H-SiC DMOSFET with Stable 225°C Operation

2014 ◽  
Vol 778-780 ◽  
pp. 903-906 ◽  
Author(s):  
Kevin Matocha ◽  
Kiran Chatty ◽  
Sujit Banerjee ◽  
Larry B. Rowland
Keyword(s):  
High Temperature ◽  
Temperature Stress ◽  
High Temperatures ◽  
Threshold Voltage ◽  
Room Temperature ◽  
Gate Bias ◽  
Threshold Voltage Shift ◽  
Device Reliability ◽  
Bias Temperature Stress ◽  
High Temperature Operation

We report a 1700V, 5.5mΩ-cm24H-SiC DMOSFET capable of 225°C operation. The specific on-resistance of the DMOSFET designed for 1200V applications is 8.8mΩ-cm2at 225°C, an increase of only 60% compared to the room temperature value. The low specific on-resistance at high temperatures enables a smaller die size for high temperature operation. Under a negative gate bias temperature stress (BTS) at VGS=-15 V at 225°C for 20 minutes, the devices show a threshold voltage shift of ΔVTH=-0.25 V demonstrating one of the key device reliability requirements for high temperature operation.

High-Temperature Operation of Pentacene Field-Effect Transistors with Polyimide Gate Insulators

2005 ◽  
Vol 871 ◽  
Author(s):  
Tsuyoshi Sekitani ◽  
Shingo Iba ◽  
Yusaku Kato ◽  
Yoshiaki Noguchi ◽  
Takao Someya ◽  
...  
Keyword(s):  
High Temperature ◽  
Field Effect ◽  
Room Temperature ◽  
Gate Dielectric ◽  
Field Effect Transistors ◽  
Current Ratio ◽  
Excellent Thermal Stability ◽  
Annealing Temperatures ◽  
High Temperature Operation ◽  
Thermal Stability Of

AbstractWe have fabricated pentacene field-effect transistors (FETs) on polyimide-sheet films with polyimide gate dielectric layers and parylene encapsulation layer, and investigated the high-temperature performance. It is found that the mobility of encapsulated FETs is enhanced from 0.5 to 0.8 cm2/Vs when the device is heated from room temperature to 160°C under light-shielding nitrogen environment. Furthermore, after the removal of annealing temperatures up to 160°C, the transistor characteristic of mobility and on/off current ratio show no significant changes, demonstration the excellent thermal stability of the present organic FETs.

High-Temperature Static and Dynamic Reliability Study of 4H-SiC Vertical-Channel JFETs for High-Power System Applications

2008 ◽  
Vol 600-603 ◽  
pp. 1051-1054 ◽  
Author(s):  
Lin Cheng ◽  
P. Martin ◽  
Michael S. Mazzola ◽  
David C. Sheridan ◽  
R.L. Kelly ◽  
...  
Keyword(s):  
High Temperature ◽  
Reverse Bias ◽  
Field Effect Transistors ◽  
Vertical Channel ◽  
Linear Region ◽  
Dynamic Reliability ◽  
Entire Duration ◽  
Group A ◽  
Group B

In this work we report the most recent high-temperature long-term reliability results of the 600 V/14 A, 4H-SiC vertical-channel junction field-effect transistors (VJFETs). Two groups (A and B) devices were subjected to different thermal and electrical stresses. One device (Group A) reached 12,000 hours of continuous switching without a single failure. Four devices in Group A were thermally stressed at 250 °C over 4,670 hours in air, for which standard deviation of the specific on-resistance (RONSP) in linear region at gate bias (VGS) of 3 V were < 4.1% throughout the entire duration time. The off-state characteristics were evaluated by high temperature reverse bias (HTRB) tests. Three devices (Group A) were biased at 50% rated BVDS at 250 °C for 2,278 hours. A higher reverse bias at 80 % rated BVDS was then applied to 14 devices (group B) at 200 °C for 1,000 hours. Variations of the leakage current were negligible throughout the entire HTRB test for all tested devices.

9 kV 4H-SiC IGBTs with 88 mΩ·cm2 of R diff, on

2007 ◽  
Vol 556-557 ◽  
pp. 771-774 ◽  
Author(s):  
Qing Chun Jon Zhang ◽  
Charlotte Jonas ◽  
Bradley Heath ◽  
Mrinal K. Das ◽  
Sei Hyung Ryu ◽  
...  
Keyword(s):  
High Temperature ◽  
Threshold Voltage ◽  
High Power ◽  
Room Temperature ◽  
Elevated Temperatures ◽  
Gate Bias ◽  
Channel Mobility ◽  
Fast Switching ◽  
Blocking Voltage ◽  
First Time

SiC IGBTs are suitable for high power, high temperature applications. For the first time, the design and fabrication of 9 kV planar p-IGBTs on 4H-SiC are reported in this paper. A differential on-resistance of ~ 88 m(cm2 at a gate bias of –20 V is achieved at 25°C, and decreases to ~24.8 m(cm2 at 200°C. The device exhibits a blocking voltage of 9 kV with a leakage current density of 0.1 mA/cm2. The hole channel mobility is 6.5 cm2/V-s at room temperature with a threshold voltage of –6.5 V resulting in enhanced conduction capability. Inductive switching tests have shown that IGBTs feature fast switching capability at both room and elevated temperatures.

High Temperature High Current Gain IC Compatible 4H-SiC Phototransistor

2019 ◽  
Vol 963 ◽  
pp. 832-836 ◽  
Author(s):  
Shuo Ben Hou ◽  
Per Erik Hellström ◽  
Carl Mikael Zetterling ◽  
Mikael Östling
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Room Temperature ◽  
Uv Light ◽  
Optical Power ◽  
Current Gain ◽  
High Current ◽  
Promising Candidate ◽  
Forward Current ◽  
On Chip

This paper presents our in-house fabricated 4H-SiC n-p-n phototransistors. The wafer mapping of the phototransistor on two wafers shows a mean maximum forward current gain (βFmax) of 100 at 25 °C. The phototransistor with the highest βFmax of 113 has been characterized from room temperature to 500 °C. βFmax drops to 51 at 400 °C and remains the same at 500 °C. The photocurrent gain of the phototransistor is 3.9 at 25 °C and increases to 14 at 500 °C under the 365 nm UV light with the optical power of 0.31 mW. The processing of the phototransistor is same to our 4H-SiC-based bipolar integrated circuits, so it is a promising candidate for 4H-SiC opto-electronics on-chip integration.

Extended High-Temperature Operation of Silicon Carbide CMOS Circuits for Venus Surface Application

2016 ◽  
Vol 13 (4) ◽  
pp. 143-154 ◽  
Author(s):  
Jim Holmes ◽  
A. Matthew Francis ◽  
Ian Getreu ◽  
Matthew Barlow ◽  
Affan Abbasi ◽  
...  
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Logic Synthesis ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Timing Models ◽  
High Temperature Operation

In the last decade, significant effort has been expended toward the development of reliable, high-temperature integrated circuits. Designs based on a variety of active semiconductor devices including junction field-effect transistors and metal-oxide-semiconductor (MOS) field-effect transistors have been pursued and demonstrated. More recently, advances in low-power complementary MOS (CMOS) devices have enabled the development of highly integrated digital, analog, and mixed-signal integrated circuits. The results of elevated temperature testing (as high as 500°C) of several building block circuits for extended periods (up to 100 h) are presented. These designs, created using the Raytheon UK's HiTSiC® CMOS process, present the densest, lowest-power integrated circuit technology capable of operating at extreme temperatures for any period. Based on these results, Venus nominal temperature (470°C) transistor models and gate-level timing models were created using parasitic extracted simulations. The complete CMOS digital gate library is suitable for logic synthesis and lays the foundation for complex integrated circuits, such as a microcontroller. A 16-bit microcontroller, based on the OpenMSP 16-bit core, is demonstrated through physical design and simulation in SiC-CMOS, with an eye for Venus as well as terrestrial applications.

scholarly journals Semiconducting polymer blends that exhibit stable charge transport at high temperatures

Science ◽  
2018 ◽  
Vol 362 (6419) ◽  
pp. 1131-1134 ◽  
Author(s):  
Aristide Gumyusenge ◽  
Dung T. Tran ◽  
Xuyi Luo ◽  
Gregory M. Pitch ◽  
Yan Zhao ◽  
...  
Keyword(s):  
High Temperature ◽  
Polymer Blends ◽  
Charge Transport ◽  
Organic Semiconductors ◽  
Room Temperature ◽  
Elevated Temperatures ◽  
Hole Mobility ◽  
General Strategy ◽  
Semiconducting Polymer ◽  
High Temperature Operation

Although high-temperature operation (i.e., beyond 150°C) is of great interest for many electronics applications, achieving stable carrier mobilities for organic semiconductors at elevated temperatures is fundamentally challenging. We report a general strategy to make thermally stable high-temperature semiconducting polymer blends, composed of interpenetrating semicrystalline conjugated polymers and high glass-transition temperature insulating matrices. When properly engineered, such polymer blends display a temperature-insensitive charge transport behavior with hole mobility exceeding 2.0 cm2/V·s across a wide temperature range from room temperature up to 220°C in thin-film transistors.

Turn-on and Charge Build-up Dynamics in Polymer Field Effect Transistors

2005 ◽  
Vol 871 ◽  
Author(s):  
Yohai Roichman ◽  
Nir Tessler
Keyword(s):  
Power Law ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Time Range ◽  
Gate Bias ◽  
Current Dependence ◽  
Turn On ◽  
Long Time ◽  
Source Current ◽  
Short Time

AbstractTurn-on dynamics of polymer field effect transistors were examined experimentally over a wide timescale. We found that the source current dependence on time following switch on of the gate bias exhibits a power law at the short time range, and an exponential decay at the intermediate to long time range. We demonstrate that the transistor dynamic behavior is governed by the channel charge build-up, and can be described accurately by a simple capacitor-resistor distributed line model.

High-temperature operation of high-power InGaAlP visible laser diodes

1993 ◽  
Author(s):  
Gen-ichi Hatakoshi ◽  
Koichi Nittoh ◽  
Yukie Nishikawa ◽  
Kazuhiko Itaya ◽  
Masaki Okajima
Keyword(s):  
High Temperature ◽  
High Power ◽  
Laser Diodes ◽  
Visible Laser ◽  
High Temperature Operation
Sign in / Sign up

Export Citation Format

Share Document