Flip-chip Bonded SiC Power Devices on a Low Temperature Co-fired Ceramic (LTCC) Substrate for Next Generation Power Modules

2016 ◽  
Vol 2016 (HiTEC) ◽  
pp. 000159-000168 ◽  
Author(s):  
Sayan Seal ◽  
Michael D. Glover ◽  
H. Alan Mantooth
Keyword(s):  
Flip Chip ◽  
State Of The Art ◽  
Power Devices ◽  
Power Module ◽  
Wire Bonds ◽  
Power Modules ◽  
And Performance ◽  
Switching Characteristics ◽  
Generation Power ◽  
Ltcc Substrate

Abstract This paper explores the design and performance benefits of an LTCC-based power module using SiC power devices. The goal of the design is to achieve high power density with an improved level of reliability as compared to the state-of-the-art, especially at elevated operating temperatures. This will enable a more complete leveraging of the benefits of SiC semiconductor technology. The reliability of existing power modules under high thermo-mechanical stress is adversely affected by the presence of wire bonds and by delamination at the die attachment interface between the die and substrate. As power devices are driven at higher frequencies, wire bonds will inhibit performance by introducing ringing and large overshoots due to the parasitic inductances they introduce in the critical switching loops in the circuit. A flip-chip bonding process for bonding the power devices has been investigated in this paper as an alternative to wire-bonding. It was found that flip-chip interconnects not only improved the switching characteristics of the device, but also reduced thermo-mechanical stresses on the bonding interface.

Precise Chip Joint Method with Sub-micron Au Particle for High-density SiC Power Module Operating at High Temperature

2013 ◽  
Vol 2013 (HITEN) ◽  
pp. 000254-000259 ◽  
Author(s):  
Fumiki Kato ◽  
Fengqun Lang ◽  
Simanjorang Rejeki ◽  
Hiroshi Nakagawa ◽  
Hiroshi Yamaguchi ◽  
...  
Keyword(s):  
Shear Strength ◽  
High Temperature ◽  
Flip Chip ◽  
Stress Test ◽  
High Density ◽  
Cathode Side ◽  
Module Structure ◽  
Power Devices ◽  
Power Module ◽  
Joint Method

In this work, a novel precise chip joint method using sub-micron Au particle for high-density silicon carbide (SiC) power module operating at high temperature is proposed. A module structure of SiC power devices are sandwiched between two silicon nitride-active metal brazed copper (SiN-AMC) circuit boards. To make a precise position and height control of the chip bonding, the top side (gate/source or anode pad side) of SiC power devices are flip-chip bonded to circuit electrodes using sub-micron Au particle with low temperature (250°C) and pressure-less sintering. The accuracy of the bonding position of chips was less than 10 μm and the accuracy of the height after bonding chips was less than 15 μm. Mechanical shear fatigue tests for flip-chip bonded SiC Schottky barrier diode (SBD) were carried out. As a result, initial shear strength of the joint was 36 MPa. The shear strength of 43 MPa is obtained after storage life test (500 hours at 250°C), and also 35 MPa is obtained even after thermal cycle stress test (1000 cycles between −40°C and 250°C). The flip-chip bonding of SiC-JFET is successfully realizedon the substrate without short or open failure electrically. Finally we joint the backside of the SiC-JFET (drain side) and the SiC-SBD (cathode side) to each circuit electrodes at once by means of reflow process with Au-12%Ge solder. The structured sandwich SiC power module was also successfully formed.

scholarly journals A Compact 5-nH One-Phase-Leg SiC Power Module for a 600V-60A-40W/cc Inverter

2012 ◽  
Vol 717-720 ◽  
pp. 1233-1236 ◽  
Author(s):  
Kohei Matsui ◽  
Yusuke Zushi ◽  
Yoshinori Murakami ◽  
Satoshi Tanimoto ◽  
Shinji Sato
Keyword(s):  
Output Power ◽  
Small Volume ◽  
Junction Temperature ◽  
High Output Power ◽  
Power Devices ◽  
Power Module ◽  
Dc Voltage ◽  
Power Modules ◽  
High Power Output ◽  
High Output

We have developed a small-volume, high-power-output inverter with a high output power density using SiC power devices. To fully utilize the advantages of SiC power devices, it is necessary to reduce the inductance of the power module. This is done by using a double-layer ceramic substrate, attaining a low inductance of 5 nH. A double pulse test was carried out up to 60 A under a DC voltage of 600 V. The low inductance greatly reduced the surge voltage and the oscillation at the switching transient. The SiC inverter with a volume of 250 cc was assembled using three of the power modules. The cooling performance of the inverter was evaluated at a loss equivalent to an output power of 10 kW, and it was found that the inverter can output 10 kW at a junction temperature (Tj) of about 200°C.

Improved Energy Efficiency Using an IGBT/SiC-Schottky Diode Pair

2012 ◽  
Vol 717-720 ◽  
pp. 1147-1150
Author(s):  
Nii Adotei Parker-Allotey ◽  
Dean P. Hamilton ◽  
Olayiwola Alatise ◽  
Michael R. Jennings ◽  
Philip A. Mawby ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Schottky Diode ◽  
Schottky Diodes ◽  
Emissions Reduction ◽  
Power Devices ◽  
Power Module ◽  
Switching Losses ◽  
Power Modules ◽  
Carbon Emissions Reduction ◽  
Driving Range

This paper will demonstrate how the newer Silicon Carbide material semiconductor power devices can contribute to carbon emissions reduction and the speed of adoption of electric vehicles, including hybrids, by enabling significant increases in the driving range. Two IGBT inverter leg modules of identical power rating have been manufactured and tested. One module has silicon-carbide (SiC) Schottky diodes as anti-parallel diodes and the other silicon PiN diodes. The power modules have been tested and demonstrate the superior electrothermal performance of the SiC Schottky diode over the Si PiN diode leading to a reduction in the power module switching losses.

The Design and Evaluation of an Integrated Wire-Bondless Power Module (IWPM) using Low Temperature Co-fired Ceramic Interposer

2016 ◽  
Vol 2016 (CICMT) ◽  
pp. 000065-000072 ◽  
Author(s):  
Sayan Seal ◽  
Michael D. Glover ◽  
H. Alan Mantooth
Keyword(s):  
High Performance ◽  
High Reliability ◽  
Feasibility Studies ◽  
Wide Band ◽  
Power Devices ◽  
Power Module ◽  
Wide Band Gap ◽  
Fast Switching ◽  
Power Modules ◽  
Wide Band Gap Semiconductors

Abstract This paper presents the plan and initial feasibility studies for an Integrated Wire Bondless Power Module (IWPM). Contemporary power modules are moving toward unprecedented levels of power density. The ball has been set rolling by a drastic reduction in the size of bare die power devices themselves owing to the advent of wide band gap semiconductors like silicon carbide (SiC) and gallium nitride (GaN). SiC has capabilities of operating at much higher temperatures and faster switching speeds as compared with its silicon counterparts, while being a fraction of their size. However, electronic packaging technology has not kept pace with these developments. High performance packaging technologies do exist in isolation, but there has been limited success in integrating these disparate efforts into a single high performance package of sufficient reliability. This paper lays the foundation for an electronic package which is designed to completely leverage the benefits of SiC semiconductor technology, with a focus on high reliability and fast switching capability.

The Design and Evaluation of an Integrated Wire Bond-less Power Module using a Low Temperature Co-fired Ceramic Interposer

2016 ◽  
Vol 13 (4) ◽  
pp. 169-175
Author(s):  
Sayan Seal ◽  
Michael D. Glover ◽  
H. Alan Mantooth
Keyword(s):  
Low Temperature ◽  
High Performance ◽  
High Reliability ◽  
Feasibility Studies ◽  
Power Devices ◽  
Power Module ◽  
Fast Switching ◽  
Wire Bond ◽  
Power Modules ◽  
Bandgap Semiconductors

This article presents the plan and initial feasibility studies for an Integrated Wire Bond-less Power Module. Contemporary power modules are moving toward unprecedented levels of power density. The ball has been set rolling by a drastic reduction in the size of bare die power devices owing to the advent of wide bandgap semiconductors such as silicon carbide (SiC) and gallium nitride. SiC has capabilities of operating at much higher temperatures and faster switching speeds compared with its silicon counterparts, while being a fraction of their size. However, electronic packaging technology has not kept pace with these developments. High-performance packaging technologies do exist in isolation, but there has been limited success in integrating these disparate efforts into a single high-performance package of sufficient reliability. This article lays the foundation for an electronic package designed to completely leverage the benefits of SiC semiconductor technology, with a focus on high reliability and fast switching capability. The interconnections between the gate drive circuitry and the power devices were implemented using a low temperature cofired ceramic interposer.

History and Recent Developments of Packaging Technology for SiC Power Devices

2016 ◽  
Vol 858 ◽  
pp. 1043-1048 ◽  
Author(s):  
Karl Otto Dohnke ◽  
Karsten Guth ◽  
Nicolas Heuck
Keyword(s):  
Silicon Carbide ◽  
State Of The Art ◽  
Complex Structure ◽  
Junction Temperature ◽  
Power Device ◽  
Full Potential ◽  
Power Devices ◽  
Packaging Technology ◽  
Power Modules ◽  
Recent Developments

Packaging plays an important role to allow the full potential of silicon carbide devices to be realised. The physical properties of silicon carbide will allow devices to operate with junction temperatures well above 200 °C, but today standard-packaged SiC products are limited to a maximum junction temperature of 175 °C. The limitation lies in the packaging, because a power device package is a complex structure consisting of many components of different materials and with correspondingly different thermal properties. As such, the assembly technologies define both the performance and lifetime of discrete packages and power modules. In this paper we give an insight of packaging technology for SiC devices from the beginning in the mid-1980s through to the state-of-the-art of today. In addition, new packaging technologies to enable power SiC devices to operate up to 200 °C are discussed.

Module and System Considerations to Maximize Performance Advantages of SiC Power Devices

2018 ◽  
Vol 924 ◽  
pp. 883-886
Author(s):  
Ty McNutt ◽  
Kraig Olejniczak ◽  
Stephen Minden ◽  
Daniel Martin ◽  
Jonathan Hayes ◽  
...  
Keyword(s):  
High Frequency ◽  
System Performance ◽  
High Speed ◽  
Power Devices ◽  
Power Module ◽  
Module Design ◽  
Power Modules ◽  
Bus Structure ◽  
Full Power ◽  
Current Carrying Capability

This paper extends a previously presented SiC power module design philosophy to critical, higher-level components for increased system performance, namely the DC bussing and DC link capacitor design. The DC bussing is essential to connect the DC bulk capacitors to the high-speed power modules and it is imperative that low inductance is maintained while current carrying capability and temperature be maintained. Often, high frequency capacitors are added to systems to increase performance by compensating for extra stray inductance that the DC bussing can introduce. However, issues that may arise by doing such are presented and it is shown that the best solution is to optimize the DC bus structure rather than compensate for a poor design. Finally, the implemented bussing is shown and full power system results presented for the inverter stack-up design.

3D Wire Bondless Integration: The Future of Silicon Carbide (SiC) Packaging

2017 ◽  
Author(s):  
Sayan Seal ◽  
Andrea K. Wallace ◽  
John E. Zumbro ◽  
H. Alan Mantooth
Keyword(s):  
Electromagnetic Interference ◽  
Flip Chip ◽  
Wide Bandgap ◽  
Switching Losses ◽  
Wire Bonds ◽  
Electrical Interconnection ◽  
Power Modules ◽  
Chip Scale Package ◽  
Solder Balls ◽  
High Temperature Operation

Wide bandgap (WBG) semiconductors are revolutionizing the world of power electronics. They have the potential to bring about an unprecedented increase in power density. The ability to switch at ultrafast rates, coupled with the promise of high temperature operation, make these devices extremely desirable. However, having superior semiconductor devices will not automatically translate to superior package characteristics. In real applications, the performance of a power device is only as good as the package allows. One of the major drawbacks plaguing contemporary power modules is the wire-bonded interconnection. Wire bonds offer a high parasitic inductance. This paper presents a novel wire bondless SiC power MOSFET packaging technique. A commercially available bare die was reconfigured into a chip-scale package. The new form factor enabled the MOSFET to be bonded to a patterned FR4 substrate using flip-chip bonding. The electrical interconnection between the package and the substrate was established using solder balls — thus eliminating the requirement for wire bonds. The motivation for using a wire bondless method was a reduction in stray parasitic inductances and an increase in the thermo-mechanical reliability. Lower parasitic inductances will facilitate high switching frequencies which will promote miniaturization, a reduction in electromagnetic interference (EMI), and lead to lower switching losses. The proposed approach was demonstrated to reduce the parasitic loop inductance by a fctor of > 3× as compared with wire bonded modules.

SiC JFETs for Power Module Applications

2010 ◽  
Vol 645-648 ◽  
pp. 1167-1170 ◽  
Author(s):  
Jochen Hilsenbeck ◽  
Zhang Xi ◽  
Daniel Domes ◽  
Kathrin Rüschenschmidt ◽  
Michael Treu ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Thermal Resistance ◽  
Frequency Dependence ◽  
State Of The Art ◽  
Schottky Diodes ◽  
Power Module ◽  
Active Device ◽  
Switching Losses ◽  
Power Modules ◽  
Surge Current

Starting with the production of Infineon´s first silicon carbide (SiC) Schottky diodes in 2001, a lot of progress was achieved during recent years. Currently, a 3rd generation of MPS (merged pn Schottky) diodes is commercially available combining tremendous improvements with respect to surge current capability and reduced thermal resistance. In this work we present the implementation of SiC switches in power modules and a comparison of these units with the corresponding Si-based power modules. Also the frequency dependence of the total losses of the 1200V configurations using Si-IGBTs or SiC-JFETs as active device is shown, indicating that modules solution with a state of the art SiC JFET outperforms all other options for switching frequencies of 20 kHz and beyond. Additionally a total loss vs. frequency study will be presented. Furthermore, it is show that the switching losses of JFET based modules can be further reduced by reducing the internal distributed gate resistivity.

Infra-Red Reflectance Microscopy (IRRM) for Daisy Chain Flip Chip Device Failure Analysis

2004 ◽  
Author(s):  
Carlo Grilletto ◽  
Steve Hsiung ◽  
Andrew Komrowski ◽  
John Soopikian ◽  
Daniel J.D. Sullivan ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Flip Chip ◽  
State Of The Art ◽  
Failure Mechanisms ◽  
Simple Metal ◽  
X Ray ◽  
Infra Red ◽  
Cause Of Failure ◽  
Reflectance Microscopy ◽  
Ir Emission

Abstract This paper describes a method to "non-destructively" inspect the bump side of an assembled flip-chip test die. The method is used in conjunction with a simple metal-connecting "modified daisy chain" die and makes use of the fact that polished silicon is transparent to infra-red (IR) light. The paper describes the technique, scope of detection and examples of failure mechanisms successfully identified. It includes an example of a shorting anomaly that was not detectable with the state of the art X-ray equipment, but was detected by an IR emission microscope. The anomalies, in many cases, have shown to be the cause of failure. Once this has been accomplished, then a reasonable deprocessing plan can be instituted to proceed with the failure analysis.

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