System Co-Design Modeling Methodology of a High Speed (25Gbps) Multi-Rate 4-Channel Retimer: Simulation to Measurement Correlation

2018 ◽  
Vol 2018 (1) ◽  
pp. 000180-000185
Author(s):  
Tony Tang ◽  
Bridger Wray ◽  
Rajen Murugan

Abstract In this paper we detail the system (viz. silicon-package-pcb) electrical co-design of a 130nm BiCMOS high-speed (25Gbps) 4-channel multi-rate retimer, packaged in a small 6-mm × 6-mm FC BGA package, with integrated advanced signal conditioning circuitries. Electrical optimization of the silicon-package-pcb over the high speed channels, to achieve desired performance, was achieved through a coupled circuit-to-electromagnetic co-design modeling and simulation methodology. Key figure of merits for system electrical performance (viz. insertion loss, return loss, crosstalk/isolation, jitter, and power supply inductance and resistance parasitics, among others) are modeled and analyzed. Laboratory measurements on a retimer are presented that validate the integrity of the modeling methodology. Good correlation between modeling methodology and laboratory measurements is achieved.

2017 ◽  
Vol 2017 (1) ◽  
pp. 000056-000060
Author(s):  
William B. Kuhn ◽  
J. Ambrose Wolf

Abstract Thin-film capacitors can be created on various substrates including glass, low-temperature co-fired ceramic (LTCC), and potentially on laminate PC board materials if the surface is sufficiently smooth. This paper looks at the circuit-design issues of how such a technology could be used in high-speed digital and microwave circuits for improving both signal integrity and power integrity (SI/PI). Two primary applications are examined: the formation of a low-inductance power-supply bypass allowing reduced supply ‘noise’, and the formation of AC coupling (DC blocking) circuits with improved signal return-loss.


Electronics ◽  
2021 ◽  
Vol 10 (15) ◽  
pp. 1773
Author(s):  
Jie Liu ◽  
Kai Zhang ◽  
Qiang Wu ◽  
Li Peng ◽  
Kai Yao ◽  
...  

In recent years, with the development of the communication industry, the need to use Ethernet switches to transmit big data has become more urgent, and its protocol standards are iterating towards higher return loss, wider bandwidth, lower impedance fluctuations and insertion loss. Based on the research of high-speed backplane with a single channel 25 Gbps transmission rate, a novel double grounded planar strip coplanar waveguide design is presented, which significantly improved return loss to 20 dB and reduced insertion loss, which meet the loss standard of 100GBASE-KR4. The resonant cavity model of transmission line reference plane is improved by introducing vias and the parameters of vias in the reference plane are studied to reduce the impact of resonance, which improved the transmission –1 dB bandwidth to 60 GHz. Based on equivalent circuit analysis of differential vias’ joint reverse pad, the parameters related to the differential vias are studied, the impedance fluctuation is reduced to 100 ± 3 Ω, which is 70% better than the impedance fluctuation standard (100 ± 10 Ω) of 100GBASE-KR4. After optimizing the mathematical model of strip coplanar waveguide, reference plane and differential vias, we built a simulation model of the backplane passive link which met the 100GBASE-KR4 backplane Ethernet specification. In the actual test, it was found that the optimized model can improve the link performance.


Electronics ◽  
2020 ◽  
Vol 9 (4) ◽  
pp. 642
Author(s):  
Zhihai Wang ◽  
Lu Wang ◽  
Kunpeng Yu ◽  
Shaoyi Liu ◽  
Congsi Wang

There are a large number of interconnections in the microwave module, among which the lead wire interconnection is widely used. Under the environmental load, the solder joint of the lead wire interconnection often appears to have cracks and other defects, which directly affect the return loss and insertion loss when transmitting electrical signals through solder joints, and indirectly affect the performance of the microwave module. For this reason, the segmented modeling method is realized by segmenting the lead wire interconnection structure into two parts in this paper, and the equivalent circuit model of the lead wire interconnection with the cracked solder joint is established using the equivalent circuit method. The correlation mechanism of the shape of the solder joint of the lead wire interconnection is studied, and formulas for predicting electrical performance based on return loss and insertion loss are derived. This paper realizes the prediction of the electrical performance of the lead wire interconnection with the defect, and can provide a reference for engineers and technicians.


2020 ◽  
Vol 12 ◽  
Author(s):  
Pampa Debnath ◽  
Ujjwal Mondal ◽  
Arpan Deyasi

Aim:: Computation of loss factors for one-bit RF MEMS switch over Ku, K and Ka-band for two different insulating substrates. Objective:: Numerical investigation of return loss, insertion loss, isolation loss are computed under both actuated and unactuated states for two different insulating substrates of the 1-bit RF MEMS switch, and corresponding up and down-capacitances are obtained. Methods:: The unique characteristics of a 1-bit RF MEMS switch of providing higher return loss under both actuated and unactuated states and also of isolation loss with negligible insertion loss makes it as a prime candidate for phase shifter application. This is presented in this manuscript with a keen focus on improvement capability by changing transmission line width, and also of overlap area; where dielectric constant of the substrate also plays a vital role. Results:: The present work exhibits very low down-capacitance over the spectrum whereas considerable amount of up-capacitance. Also when overall performance in terms of all loss parameters are considered, switch provides very low insertion loss, good return loss under actuated state and standard isolation loss. Conclusion:: Reduction of transmission line width of about 33% improved the performance of the switch by increasing isolation loss. Isolation loss of -40 dB is obtained at actuated condition in higher microwave spectra for SiO 2 at higher overlap area. Down capacitance of ~ 1dB is obtained which is novel as compared with other published literature. Moreover, a better combination of both return loss, isolation loss and insertion loss are reported in this present work compared with all other published data so far.


2018 ◽  
Vol 77 (6) ◽  
pp. 337-346 ◽  
Author(s):  
A. B. Kosarev ◽  
A. V. Barch ◽  
E. N. Rozenberg

Abstract. High-speed railways are fast-growing and promising type of traffic. In Russia development of high-speed railway service is associated with the solution of a number of problems, including infrastructure. Authors propose to use earth connection of the railway catenary with the help of an artificial earthing switch on currently designed high-speed line Moscow—Kazan for 2×25 kV power supply system. Taking into account requirements for electrical safety conditions for maintenance of the track and earthed catenary supports, paper justifies method for calculating allowable voltages of rail—earth points and supports of catenary. Methods takes into account structural features of ballastless track superstructure used for high-speed lines. It is estimated that the voltages admissible under the electrical safety conditions are random in nature and distributed logarithmically normal. When calculating probability of safe operation, one should take into account random nature of both permissible stresses and those actually occurring on the track. It is estimated that the probability of safe operation in traction networks of sections with ballastless track superstructure does not exceed a similar value in electrified sections with the conventional structure of a ballast prism. Feasibility of using a 2×25 kV earth system using an artificial earth connection is confirmed, recommendations on its use are given. Authors substantiate allowable values of the rail—earth voltage and catenary supports, which practically exclude the occurrence of hazardous situations for personnel maintaining the track in sections with ballastless track superstructure.


2016 ◽  
Vol 30 (06) ◽  
pp. 1650063 ◽  
Author(s):  
Jingwen Sun ◽  
Jian Sun ◽  
Yunji Yi ◽  
Lucheng Qv ◽  
Shiqi Sun ◽  
...  

A low-cost and high-speed electro-optic (EO) switch using the guest–host EO material Disperse Red 1/Polymethyl Methacrylate (DR1/PMMA) was designed and fabricated. The DR1/PMMA material presented a low processing cost, an excellent photostability and a large EO coefficient of 13.1 pm/V. To improve the performance of the switch, the in-plane buried electrode structure was introduced in the polymer Mach–Zehnder waveguide to improve the poling and modulating efficiency. The characteristic parameters of the waveguide and the electrodes were carefully designed and the fabrication process was strictly controlled. Under 1550 nm, the insertion loss of the device was 12.7 dB. The measured switching rise time and fall time of the switch were 50.00 ns and 54.29 ns, respectively.


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