Robust True LDO Linear Voltage Regulator and Digitally Trimmable Buffered Precision Voltage Reference for High-Temperature, Low-Voltage Applications

2013 ◽  
Vol 2013 (HITEN) ◽  
pp. 000096-000103
Author(s):  
Yoann Dusé ◽  
Fabien Laplace ◽  
Nicolas Joubert ◽  
Xavier Montmayeur ◽  
Noureddine Zitouni ◽  
...  

We present in this paper two new products for high-temperature, low-voltage (2.8V to 5.5V) power management applications. The first product is an original implementation of a monolithic low dropout regulator (XTR70010), able to deliver up to 1A at 230°C with less than 1V of dropout. This new voltage regulator can source an output current level up to 1.5A. The regulated output voltage can be selected among 32 preset values from 0.5V to 3.6V in steps of 100mV, or it can be obtained with a pair of external resistors. The circuit integrates complex analog and digital control blocks providing state of the art features such as UVLO protection, chip enable control, soft start-up and soft shut-down, hiccup short-circuit protection, customer selectable thermal shut-down, input power supply protection, output overshoot remover and stability over an extremely wide range of load capacitances. The circuit offers a fair ±2% absolute accuracy and is guaranteed latch-up free. The second product is an advanced high-temperature, low-power, digitally trimmable voltage reference (XTR75020). Thanks to a custom, 1-wire serial interface, the absolute precision and the temperature coefficient can be adjusted in order to obtain an accuracy better than 0.5% with a temperature coefficient bellow ±20ppm/°C. On-chip OTP memory for trimming of absolute value and temperature coefficient makes the circuit extremely accurate and almost insensitive to drifts over time and temperature. The circuit features a class AB output buffer able to source or sink up to 5mA and remains stable with any load capacitance up to 50μF. The XTR75020 has nine preset possible output voltages. The source and sink short circuit current always remains bellow 25mA. The quiescent current consumption is 300μA typical at 230°C while the standby current is, in all cases, under 20μA. Both devices are designed on a latch-up free silicon-on-insulator process.

2004 ◽  
Vol 04 (02) ◽  
pp. L345-L354 ◽  
Author(s):  
Y. HADDAB ◽  
V. MOSSER ◽  
M. LYSOWEC ◽  
J. SUSKI ◽  
L. DEMEUS ◽  
...  

Hall sensors are used in a very wide range of applications. A very demanding one is electrical current measurement for metering purposes. In addition to high precision and stability, a sufficiently low noise level is required. Cost reduction through sensor integration with low-voltage/low-power electronics is also desirable. The purpose of this work is to investigate the possible use of SOI (Silicon On Insulator) technology for this integration. We have fabricated SOI Hall devices exploring the useful range of silicon layer thickness and doping level. We show that noise is influenced by the presence of LOCOS and p-n depletion zones near the edges of the active zones of the devices. A proper choice of SOI technological parameters and process flow leads to up to 18 dB reduction in Hall sensor noise level. This result can be extended to many categories of devices fabricated using SOI technology.


2011 ◽  
Vol 20 (03) ◽  
pp. 471-484 ◽  
Author(s):  
LIANG ZUO ◽  
ROBERT GREENWELL ◽  
SYED K. ISLAM ◽  
M. A. HUQUE ◽  
BENJAMIN J. BLALOCK ◽  
...  

In recent years, increasing demand for hybrid electric vehicles (HEVs) has generated the need for reliable and low-cost high-temperature electronics which can operate at the high temperatures under the hood of these vehicles. A high-voltage and high temperature gate-driver integrated circuit for SiC FET switches with short circuit protection has been designed and implemented in a 0.8-micron silicon-on-insulator (SOI) high-voltage process. The prototype chip has been successfully tested up to 200°C ambient temperature without any heat sink or cooling mechanism. This gate-driver chip can drive SiC power FETs of the DC-DC converters in a HEV, and future chip modifications will allow it to drive the SiC power FETs of the traction drive inverter. The converter modules along with the gate-driver chip will be placed very close to the engine where the temperature can reach up to 175ΰC. Successful operation of the chip at this temperature with or without minimal heat sink and without liquid cooling will help achieve greater power-to-volume as well as power-to-weight ratios for the power electronics module.


2010 ◽  
Vol 2010 (HITEC) ◽  
pp. 000283-000288 ◽  
Author(s):  
B. Reese ◽  
R. Shaw ◽  
J. Hornberger ◽  
R. Schupbach ◽  
A. Lostetter

This paper discusses the development of a high temperature (i.e., 230 °C ambient) 100V–300V/15V 20W isolated power supply. The power supply is implemented using Silicon-Carbide (SiC) power switches, high-temperature silicon on insulator (HTSOI) control circuitry, as well as custom high temperature magnetics and packaging technology. The heart of this power supply is a custom-built PWM controller. The controller was built utilizing HTSOI component, which operate at temperatures as high as 300 °C. The developed power supply targets high ambient temperature environment applications and includes features such as housekeeping power supply, soft-start and under-voltage lockout. The power supply is packaged using a multi-chip module (MCM) packaging approach. A single layer power substrate and a multiple layer control substrate are used. Bare die devices are utilized to save space, reduce parasitic impedances, and increase temperature of operation and reliability. This paper provides details on the electrical and thermal design as well as fabrication and characterization of the power supply. Additionally, results of the full characterization of this power supply are provided; this includes temperature testing up to 230 °C, efficiency results, load transition behavior, output ripple, etc.


Energies ◽  
2019 ◽  
Vol 12 (14) ◽  
pp. 2749 ◽  
Author(s):  
Karol Nowak ◽  
Jerzy Janiszewski ◽  
Grzegorz Dombek

The paper presents the layout of two opposing thyristors working as an Arc Eliminator (AE). The presented solution makes it possible to protect an electrical apparatus against the effects of an arcing fault. An Arc Eliminator is assumed to be a device cooperating with the protected apparatus. Thyristors were used because of their speed of operation and a relatively lower cost compared to other semiconductors with the same current-carrying capacity. The proposed solution, as one of the few currently available, makes it possible to eliminate the fault arc—both at short-circuit currents and current values to which overcurrent protections do not react. A test circuit was designed and made to study the effectiveness of the thyristor arc eliminator. A series of tests was carried out with variable impedance in the arc branch, including the influence of circuit inductance on arc time. It was found that the thyristor arc eliminator effectively protects devices powered from a low voltage power network against the effects of a fault or arc fault. The correctness of system operation for a wide range of impedance changes in the circuit feeding the arc location was demonstrated.


1951 ◽  
Vol 49 (2-3) ◽  
pp. 169-174 ◽  
Author(s):  
J. Gordon ◽  
R. A. Hall ◽  
L. H. Stickland

The lysis of Bacterium coli suspensions brought about by glycine shows the following characteristics:(1) There is a latent period of 2 hr., followed by a rapid lysis reaching a maximum in about 8 hr.(2) The extent of the lysis is independent of the dilution of the bacterial suspension over a wide range.(3) The extent of the lysis increases with the glycine concentration up to 10M, but is approaching a limit at this concentration.(4) The lysis is negligible below pH 5 and above pH 10, and shows a maximum rate in the region of pH 6–5–8–5.(5) The rate of lysis has a very high temperature coefficient (Q10 of the order of 5).


2017 ◽  
Vol 31 (19-21) ◽  
pp. 1740069 ◽  
Author(s):  
Liangwei Dong ◽  
Yueli Hu

A novel low-voltage low-power CMOS voltage reference independent of temperature is presented in this design. After considering the combined effect of (1) a perfect suppression of the temperature dependence of mobility; (2) the compensation of the channel length modulation effect on the temperature coefficient, a temperature coefficient of 10 ppm/[Formula: see text]C is achieved. Moreover, by adopting the subthreshold MOSFETs, there are no resistors used in the proposed structure. Therefore, the maximum supply current measured at the maximum supply voltage is 70 nA and at 80[Formula: see text]C. The circuit can be used as a voltage reference for high performance and low power dissipation on a single chip.


2014 ◽  
Vol 23 (08) ◽  
pp. 1450107 ◽  
Author(s):  
JUN-DA CHEN ◽  
CHENG-KAI YE

This paper presents an approach to the design of a high-precision CMOS voltage reference. The proposed circuit is designed for TSMC 0.35 μm standard CMOS process. We design the first-order temperature compensation bandgap voltage reference circuit. The proposed post-simulated circuit delivers an output voltage of 0.596 V and achieves the reported temperature coefficient (TC) of 3.96 ppm/°C within the temperature range from -60°C to 130°C when the supply voltage is 1.8 V. When simulated in a smaller temperature range from -40°C to 80°C, the circuit achieves the lowest reported TC of 2.09 ppm/°C. The reference current is 16.586 μA. This circuit provides good performances in a wide range of temperature with very small TC.


Author(s):  
D.Srinivasa Rao & Dr. Anupama A. Deshpande

This paper proposes dual active bridge (DAB) based high frequency power electronic transformer (PET) for interconnecting medium voltage dc (MVDC) and low voltage dc (LVDC) grids for dc power distribution. The above proposed concept works on dual active phase shift principle and square wave HF modulation technique for bidirectional power transfer. Compared to the traditional dc transformer scheme, The proposed power electronic transformer (PET) can disconnect from LVDC distribution grid effectively as a dc breaker when a short circuit fault occurs in the distribution grid. The isolated DC-DC PET topology with a wide range of voltage conversion ratio is useful for High Voltage DC tapping. The DAB based on switched capacitor is connected to the medium voltage DC side and acts as an inverter. The proposed topology has the ability to transfer higher power, and lower circulating power, lower high frequency link voltage, and RMS current and peak values with the same transmission power in the MVDC side. This paper analyzes the topology, voltage and power characterization, control strategy in detail. Increase in the intermediate AC frequency will reduce the size of the transformer and other passive elements significantly in the circuit. The theoretical analysis is supported by MATLAB simulation.


Sign in / Sign up

Export Citation Format

Share Document