scholarly journals Backside Chippings Improvement through Wafer Dicing Parameter Optimization and Understanding the Anistropic Silicon Properties

Author(s):  
Aiza Marie E. Agudon ◽  
Bryan Christian S. Bacquian

Semiconductor Companies and Industries soar high as the trend for electronic gadgets and devices increases. Transition from “manual” to “fully automatic” application is one of the advantages why consumer adapt to changes and prefer electronic devices as one of daily answers. Individuals who admire these electronic devices often ask how they are made. As we look inside each device, we can notice interconnected microchips commonly called IC (Integrated Circuit). These are specially prepared silicon wafers where integrated circuit are developed. Commonly, each device is composed of numerous microchips depending on the design and functionality IC production is processed from “front-end” to “back-end” assembly. Front-end assembly includes wafer fabrication where electrical circuitry is prepared and integrated to every single silicon wafers. Back-end assembly covers processing the wafer by cutting into smaller individual and independent components called “dice”. Each dice will be placed into Leadframe, bonded with wires prior encapsulating with mold compounds. After molding, each IC will be cut through a process called singulation. Afterwards, all molded units are subjected for functional testing. Dice is central to each IC; it is where miniature transistor, resistor and capacitor are integrated to form complex small circuitry in microchips. Pre-assembly (Pre-assy) stations have the first hand prior to all succeeding stations. Live wafers are primary direct materials processed in these stations. Robust work instruction and parameter must be practiced during handling and processing to avoid gross rejection and possible work-related defects. The paper is all about the challenges to resolve and improved the backside chippings in 280um wafer thickness in mechanical dicing saw. The conventional Mechanical dicing process induce a lot of mechanical stress and vibration during the cutting process which oftentimes lead to backside chipping and die crack issues. However, backside chippings can mitigate with proper selection of parameter settings and understand the silicon wafer properties.

Electronics ◽  
2021 ◽  
Vol 10 (3) ◽  
pp. 231
Author(s):  
Chester Sungchung Park ◽  
Sunwoo Kim ◽  
Jooho Wang ◽  
Sungkyung Park

A digital front-end decimation chain based on both Farrow interpolator for fractional sample-rate conversion and a digital mixer is proposed in order to comply with the long-term evolution standards in radio receivers with ten frequency modes. Design requirement specifications with adjacent channel selectivity, inband blockers, and narrowband blockers are all satisfied so that the proposed digital front-end is 3GPP-compliant. Furthermore, the proposed digital front-end addresses carrier aggregation in the standards via appropriate frequency translations. The digital front-end has a cascaded integrator comb filter prior to Farrow interpolator and also has a per-carrier carrier aggregation filter and channel selection filter following the digital mixer. A Farrow interpolator with an integrate-and-dump circuitry controlled by a condition signal is proposed and also a digital mixer with periodic reset to prevent phase error accumulation is proposed. From the standpoint of design methodology, three models are all developed for the overall digital front-end, namely, functional models, cycle-accurate models, and bit-accurate models. Performance is verified by means of the cycle-accurate model and subsequently, by means of a special C++ class, the bitwidths are minimized in a methodic manner for area minimization. For system-level performance verification, the orthogonal frequency division multiplexing receiver is also modeled. The critical path delay of each building block is analyzed and the spectral-domain view is obtained for each building block of the digital front-end circuitry. The proposed digital front-end circuitry is simulated, designed, and both synthesized in a 180 nm CMOS application-specific integrated circuit technology and implemented in the Xilinx XC6VLX550T field-programmable gate array (Xilinx, San Jose, CA, USA).


Author(s):  
Zu-Jia Lo ◽  
Bipasha Nath ◽  
Yuan-Chuan Wang ◽  
Yun-Jie Huang ◽  
Hui-Chun Huang ◽  
...  

1991 ◽  
Vol 37 (3) ◽  
pp. 585-591 ◽  
Author(s):  
A. Baschirotto ◽  
M. Cassis ◽  
P. Kirchlechner ◽  
F. Montecchi ◽  
G. Palmisano ◽  
...  
Keyword(s):  

Electronics ◽  
2018 ◽  
Vol 7 (8) ◽  
pp. 126 ◽  
Author(s):  
Lina Wang ◽  
Junyi Yang ◽  
Haobo Ma ◽  
Zeyuan Wang ◽  
Kabir Olanrewaju ◽  
...  

Silicon Carbide (SiC)-based Bi-Directional Switches (BDS) have great potential in the construction of several power electronic circuits including multi-level converters, solid-state breakers, matrix converters, HERIC (high efficient and reliable inverter concept) photovoltaic grid-connected inverters and so on. In this paper, two issues with the application of SiC-based BDSs, namely, unwanted turn-on and parasitic oscillation, are deeply investigated. To eliminate unwanted turn-on, it is proposed to add a capacitor (CX) paralleled at the signal input port of the driver IC (integrated circuit) and the capacitance range of CX is also analytically derived to guide the selection of CX. To mitigate parasitic oscillation, a combinational method, which combines a snubber capacitor (CJ) paralleled with the JFET (Junction Field Effect Transistor) and a ferrite ring connected in series with the power line, is proposed. It is verified that the use of CJ mainly improves the turn-off transient and the use of a ferrite ring damps the current oscillation during the turn-on transient significantly. The effects of the proposed methods have been demonstrated by theoretical analysis and verified by experimental results.


2014 ◽  
Vol 2014 (HITEC) ◽  
pp. 000146-000153 ◽  
Author(s):  
Bruce W. Ohme ◽  
Mark R. Larson ◽  
Bhal Tulpule ◽  
Alireza Behbahani

Analog functions have been implemented in a Silicon-on-Insulator (SOI) process optimized for high-temperature (>225°C) operation. These include a linear regulator/reference block that supports input voltages up to 50V and provides multiple independent voltage outputs. Additional blocks provide configurable sensor excitation levels of up to 10V DC and/or 20V AC-differential, with current limiting and monitoring. A dual-channel Programmable-Gain-Instrumentation Amplifier (PGIA) and a high-level AC input block with programmable gain and offset serve signal conditioning, gain, and scaling needs. A multiplexer and analog buffer provide an output that is scaled and centered for down-stream A-to-D conversion. Limited component availability and high component counts deter development of sensing and control electronics for extreme temperature (>200°) applications. Systems require front-end power conditioning, sensor excitation and monitoring, response amplification, scaling, and multiplexing. Back-end Analog-to-Digital conversion and digital processing/control can be implemented using one or two integrated circuit chips, whereas the front-end functions require component counts in the dozens. The low level of integration in the available portfolio of SOI devices results in high component count when constructing signal conditioning interfaces for aerospace sensors. These include quasi-DC sensors such as thermo-couples, strain-gauges, bridge transducers as well as AC-coupled sensors and position transducers, such as Linear Variable Differential Transducers (LVDT's). Furthermore, a majority of sensor applications are best served by excitation/response voltage ranges that typically exceed the voltage range of digital electronics (either 5V or 3.3V in currently available digital IC's for use above 200°C). These constraints led Embedded Systems LLC to design a generic device which was implemented by Honeywell as an analog ASIC (Application Specific Integrated Circuit). This paper will describe the ASIC block-level capabilities in the context of the typical applications and present characterization data from wafer-level testing at the target temperature range (225C). This material is based upon work performed by Honeywell International under a subcontract from Embedded Systems LLC, funding for which was provided by the U.S. Air Force Small Business Innovative Research program.


1996 ◽  
Vol 21 (1) ◽  
pp. 37-42 ◽  
Author(s):  
Jillian Rodd

The study used a form of the International Association for the Evaluation of Educational Achievement (IEA) Preprimary Project which was adapted for the Australian context to investigate the patterns of usage and factors behind parental choices of early childhood services for four-year-old children in the year prior to formal education. Data were obtained from interviews with 175 parents, usually the mother, regarding where, with whom and how their children spent their day and week. The findings revealed that many children in Victoria spent time in a number of services each day. A substantial number also participated in extra-curricular activities and recreational activities. Data collected concerning parental selection of particular services revealed the complex early care and education arrangements that parents were required to make to meet the educational and social needs of their children as well as the work related needs which influenced parental choice.


2020 ◽  
Vol 37 (4) ◽  
pp. 199-204
Author(s):  
Kamil Janeczek ◽  
Aneta Araźna ◽  
Wojciech Stęplewski ◽  
Marek Kościelski ◽  
Krzysztof Lipiec ◽  
...  

Purpose The purpose of this study is to design and fabricate a simple passive sensor circuitry embedded into a printed circuit board (PCB) and then to examine its properties. Design/methodology/approach A passive sensor transponder integrated circuit (IC) working in the high frequency (HF) 13.56 MHz frequency band was selected for this study. A loop antenna was designed to make the reported sensor circuitry readable. Next, the sensor circuitry was fabricated and embedded into a PCB with the proposed technologies. Finally, properties of the embedded structures were examined as well-functional parameters of the sensor circuitries. Findings The described investigation results confirmed that the proposed technologies using an epoxy resin or standard materials used for PCB’s production allowed to successfully produce sensors embedded into PCBs. This technology did not have a negative significant impact either on quality of solder joints of the assembled transponder IC or on functional properties of the embedded sensor. Apart from the identification data, the reported sensor can provide information about a selected property of its environment, e.g. temperature when its internal temperature sensitive element is used or other factors with the use of external sensitive elements, such as humidity. Research limitations/implications It is planned to carry on the reported investigations to examine other types of sensor circuitries capable of indicating e.g. humidity level and to evaluate influence of the proposed technology on their functional properties. Practical implications The reported sensor circuitries can be successfully used in electronic industry in internet of things systems not only to identify monitored electronic devices, but also to control selected parameters of external environment. This creates opportunity to detect device malfunction by detecting local temperature growth or to analyze its environment, which might allow to predict failure of controlled products using radio waves. This advantage seems to be extremely beneficial for applications, such as space, aviation or military, in which embedded sensor systems may lead to enhancing reliability of electronic devices by reacting on occurred failures in a more efficient way. Originality/value This study demonstrates valuable information for engineers conducting research on sensor components embedded into PCBs. The reported technologies are quite simple and cost-effective because of the use of standard materials known for PCB’s production or an epoxy resin which could be treated as an additional encapsulant material enhancing mechanical properties of the embedded sensor transponder IC.


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