A high-speed RSD-based flexible ECC processor for arbitrary curves over general prime field

2018 ◽  
Vol 46 (10) ◽  
pp. 1858-1878 ◽  
Author(s):  
Yasir Ali Shah ◽  
Khalid Javeed ◽  
Shoaib Azmat ◽  
Xiaojun Wang
Keyword(s):  
High Speed ◽  
Prime Field

scholarly journals A High-Speed Elliptic Curve Cryptography Processor for Teleoperated Systems Security

2021 ◽  
Vol 2021 ◽  
pp. 1-8
Author(s):  
Yong Xiao ◽  
Weibin Lin ◽  
Yun Zhao ◽  
Chao Cui ◽  
Ziwen Cai
Keyword(s):  
Elliptic Curve ◽  
Elliptic Curve Cryptography ◽  
High Speed ◽  
High Performance ◽  
Prime Field ◽  
Practical Applications ◽  
Cell Library ◽  
Cryptographic Algorithm ◽  
Human Operators ◽  
Key Length

Teleoperated robotic systems are those in which human operators control remote robots through a communication network. The deployment and integration of teleoperated robot’s systems in the medical operation have been hampered by many issues, such as safety concerns. Elliptic curve cryptography (ECC), an asymmetric cryptographic algorithm, is widely applied to practical applications because its far significantly reduced key length has the same level of security as RSA. The efficiency of ECC on GF (p) is dictated by two critical factors, namely, modular multiplication (MM) and point multiplication (PM) scheduling. In this paper, the high-performance ECC architecture of SM2 is presented. MM is composed of multiplication and modular reduction (MR) in the prime field. A two-stage modular reduction (TSMR) algorithm in the SCA-256 prime field is introduced to achieve low latency, which avoids more iterative subtraction operations than traditional algorithms. To cut down the run time, a schedule is put forward when exploiting the parallelism of multiplication and MR inside PM. Synthesized with a 0.13 um CMOS standard cell library, the proposed processor consumes 341.98k gate areas, and each PM takes 0.092 ms.

scholarly journals Design and Implementation of High-Performance ECC Processor with Unified Point Addition on Twisted Edwards Curve

Sensors ◽  
2020 ◽  
Vol 20 (18) ◽  
pp. 5148
Author(s):  
Md. Mainul Islam ◽  
Md. Selim Hossain ◽  
Moh. Khalid Hasan ◽  
Md. Shahjalal ◽  
Yeong Min Jang
Keyword(s):  
Elliptic Curve ◽  
High Speed ◽  
High Performance ◽  
Security Level ◽  
Prime Field ◽  
Iot Security ◽  
Point Multiplication ◽  
Low Area ◽  
Edwards Curve ◽  
Twisted Edwards Curve

With the swift evolution of wireless technologies, the demand for the Internet of Things (IoT) security is rising immensely. Elliptic curve cryptography (ECC) provides an attractive solution to fulfill this demand. In recent years, Edwards curves have gained widespread acceptance in digital signatures and ECC due to their faster group operations and higher resistance against side-channel attacks (SCAs) than that of the Weierstrass form of elliptic curves. In this paper, we propose a high-speed, low-area, simple power analysis (SPA)-resistant field-programmable gate array (FPGA) implementation of ECC processor with unified point addition on a twisted Edwards curve, namely Edwards25519. Efficient hardware architectures for modular multiplication, modular inversion, unified point addition, and elliptic curve point multiplication (ECPM) are proposed. To reduce the computational complexity of ECPM, the ECPM scheme is designed in projective coordinates instead of affine coordinates. The proposed ECC processor performs 256-bit point multiplication over a prime field in 198,715 clock cycles and takes 1.9 ms with a throughput of 134.5 kbps, occupying only 6543 slices on Xilinx Virtex-7 FPGA platform. It supports high-speed public-key generation using fewer hardware resources without compromising the security level, which is a challenging requirement for IoT security.

scholarly journals FPGA Implementation of High-Speed Area-Efficient Processor for Elliptic Curve Point Multiplication Over Prime Field

IEEE Access ◽  
2019 ◽  
Vol 7 ◽  
pp. 178811-178826 ◽  
Author(s):  
Md. Mainul Islam ◽  
Md. Selim Hossain ◽  
Moh. Khalid Hasan ◽  
Md. Shahjalal ◽  
Yeong Min Jang
Keyword(s):  
Elliptic Curve ◽  
High Speed ◽  
Fpga Implementation ◽  
Prime Field ◽  
Point Multiplication ◽  
Area Efficient

scholarly journals High-Speed Area-Efficient Processor for Elliptic Curve Point Multiplication Over Prime Field Along with RSA Comparison

2021 ◽  
pp. 117-123
Author(s):  
Mrs. Lakshmidevi TR ◽  
Ms. Kavana Shree C ◽  
Ms. Arshitha S ◽  
Ms. Kavya L
Keyword(s):  
Elliptic Curve ◽  
High Speed ◽  
Single Point ◽  
Prime Field ◽  
Point Multiplication ◽  
Field Programmable ◽  
Critical Requirement ◽  
Edwards Curve ◽  
The Impact ◽  
Twisted Edwards Curve

Creating a high-speed elliptic curve cryptographic (ECC) processor capable of performing fast point Multiplication with low hardware utilisation is a critical requirement in cryptography and network security. This paper describes the implementation of a high-speed, field-programmable gate array (FPGA) in this paper. A high-security digital signature technique is implemented using Edwards25519, a recently approved twisted Edwards’s curve. For point addition and point doubling operations on the twisted Edwards curve, advanced hardware configurations are developed in which each task involves only 516 and 1029 clock cycles, respectively. As an observation the ECC processor presented in this paper begins with the process which takes 1.48 ms of single-point multiplication to be performed. The comparison of key size and its ratio which shows the impact on processing of each processor is shown for ECC processor and RSA processor. The delay and number of slices used for the ECC processor is shown and this is a developed solution saves time by providing rapid scalar multiplication with low hardware consumption without compromising on security.

Microfabrication research at the National Submicron Facility

1983 ◽  
Vol 41 ◽  
pp. 86-89
Author(s):  
E.D. Wolf
Keyword(s):  
Integrated Circuits ◽  
Particle Physics ◽  
High Speed ◽  
New Technology ◽  
High Energy ◽  
High Energy Particle ◽  
New Science ◽  
Wide Range ◽  
Intermediate Domain ◽  
Circuit Function

Most microelectronics devices and circuits operate faster, consume less power, execute more functions and cost less per circuit function when the feature-sizes internal to the devices and circuits are made smaller. This is part of the stimulus for the Very High-Speed Integrated Circuits (VHSIC) program. There is also a need for smaller, more sensitive sensors in a wide range of disciplines that includes electrochemistry, neurophysiology and ultra-high pressure solid state research. There is often fundamental new science (and sometimes new technology) to be revealed (and used) when a basic parameter such as size is extended to new dimensions, as is evident at the two extremes of smallness and largeness, high energy particle physics and cosmology, respectively. However, there is also a very important intermediate domain of size that spans from the diameter of a small cluster of atoms up to near one micrometer which may also have just as profound effects on society as “big” physics.

Vacuum System to Minimize the Specimen Contamination of High-Performance EM

1977 ◽  
Vol 35 ◽  
pp. 68-69
Author(s):  
N. Yoshimura ◽  
K. Shirota ◽  
T. Etoh
Keyword(s):  
Electron Microscope ◽  
High Speed ◽  
High Performance ◽  
High Vacuum ◽  
Vacuum System ◽  
Pump System ◽  
Pumping System ◽  
Diffusion Pump ◽  
Almost All ◽  
Cascade Type

One of the most important requirements for a high-performance EM, especially an analytical EM using a fine beam probe, is to prevent specimen contamination by providing a clean high vacuum in the vicinity of the specimen. However, in almost all commercial EMs, the pressure in the vicinity of the specimen under observation is usually more than ten times higher than the pressure measured at the punping line. The EM column inevitably requires the use of greased Viton O-rings for fine movement, and specimens and films need to be exchanged frequently and several attachments may also be exchanged. For these reasons, a high speed pumping system, as well as a clean vacuum system, is now required. A newly developed electron microscope, the JEM-100CX features clean high vacuum in the vicinity of the specimen, realized by the use of a CASCADE type diffusion pump system which has been essentially improved over its predeces- sorD employed on the JEM-100C.

The on-line use of histogram data for high-speed correction and alignment of electron microscope images

1984 ◽  
Vol 42 ◽  
pp. 556-557
Author(s):  
William Krakow
Keyword(s):  
Power Spectrum ◽  
High Speed ◽  
Direct Memory Access ◽  
Digital Television ◽  
Contrast Transfer Function ◽  
The Past ◽  
High Resolution Tem ◽  
On Line ◽  
Correction Of Astigmatism ◽  
The Fourier Transform

In the past few years on-line digital television frame store devices coupled to computers have been employed to attempt to measure the microscope parameters of defocus and astigmatism. The ultimate goal of such tasks is to fully adjust the operating parameters of the microscope and obtain an optimum image for viewing in terms of its information content. The initial approach to this problem, for high resolution TEM imaging, was to obtain the power spectrum from the Fourier transform of an image, find the contrast transfer function oscillation maxima, and subsequently correct the image. This technique requires a fast computer, a direct memory access device and even an array processor to accomplish these tasks on limited size arrays in a few seconds per image. It is not clear that the power spectrum could be used for more than defocus correction since the correction of astigmatism is a formidable problem of pattern recognition.

Structural changes in silicon-on-insulator material during post-implantation annealing

1986 ◽  
Vol 44 ◽  
pp. 736-737
Author(s):  
C. O. Jung ◽  
S. J. Krause ◽  
S.R. Wilson
Keyword(s):  
Integrated Circuits ◽  
Oxide Layer ◽  
High Speed ◽  
Structural Changes ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Quality ◽  
Radiation Hardened ◽  
Post Implantation ◽  
Very High

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.

An atomic-resolution microscope study of Al contracts on GaAs

1986 ◽  
Vol 44 ◽  
pp. 726-727
Author(s):  
Z. Liliental-Weber ◽  
C. Nelson ◽  
R. Ludeke ◽  
R. Gronsky ◽  
J. Washburn
Keyword(s):  
High Speed ◽  
Schottky Contacts ◽  
Detailed Knowledge ◽  
The Past ◽  
Semiconductor Interfaces ◽  
Deposited Metal ◽  
Microwave Applications ◽  
Free Interfaces ◽  
Potential Use

The properties of metal/semiconductor interfaces have received considerable attention over the past few years, and the Al/GaAs system is of special interest because of its potential use in high-speed logic integrated optics, and microwave applications. For such materials a detailed knowledge of the geometric and electronic structure of the interface is fundamental to an understanding of the electrical properties of the contact. It is well known that the properties of Schottky contacts are established within a few atomic layers of the deposited metal. Therefore surface contamination can play a significant role. A method for fabricating contamination-free interfaces is absolutely necessary for reproducible properties, and molecularbeam epitaxy (MBE) offers such advantages for in-situ metal deposition under UHV conditions

Scanning x-ray fluorescence microscopy and principal component analysis

1992 ◽  
Vol 50 (2) ◽  
pp. 1752-1753
Author(s):  
Brian Cross
Keyword(s):  
Principal Component Analysis ◽  
Fluorescence Microscopy ◽  
Spatial Resolution ◽  
High Speed ◽  
Image Acquisition ◽  
Principal Component ◽  
Fluorescence Microscope ◽  
Acquisition Rate ◽  
X Ray ◽  
Speed Up

A relatively new entry, in the field of microscopy, is the Scanning X-Ray Fluorescence Microscope (SXRFM). Using this type of instrument (e.g. Kevex Omicron X-ray Microprobe), one can obtain multiple elemental x-ray images, from the analysis of materials which show heterogeneity. The SXRFM obtains images by collimating an x-ray beam (e.g. 100 μm diameter), and then scanning the sample with a high-speed x-y stage. To speed up the image acquisition, data is acquired "on-the-fly" by slew-scanning the stage along the x-axis, like a TV or SEM scan. To reduce the overhead from "fly-back," the images can be acquired by bi-directional scanning of the x-axis. This results in very little overhead with the re-positioning of the sample stage. The image acquisition rate is dominated by the x-ray acquisition rate. Therefore, the total x-ray image acquisition rate, using the SXRFM, is very comparable to an SEM. Although the x-ray spatial resolution of the SXRFM is worse than an SEM (say 100 vs. 2 μm), there are several other advantages.

Sign in / Sign up

Export Citation Format

Share Document