Microstructural Evolution of SAC305 Solder Joints in Wafer Level Chip-Scale Packaging (WLCSP) with Continuous and Interrupted Accelerated Thermal Cycling

2016 ◽  
Vol 45 (6) ◽  
pp. 3013-3024 ◽  
Author(s):  
Quan Zhou ◽  
Bite Zhou ◽  
Tae-Kyu Lee ◽  
Thomas Bieler
Keyword(s):  
Thermal Cycling ◽  
Microstructural Evolution ◽  
Solder Joints ◽  
Wafer Level ◽  
Sac305 Solder ◽  
Accelerated Thermal Cycling

A Highly Accelerated Thermal Cycling (HATC) Test for Solder Reliability Assessment in BGA Packages

2007 ◽  
Author(s):  
X. Long ◽  
I. Dutta ◽  
R. Guduru ◽  
R. Prasanna ◽  
M. Pacheco
Keyword(s):  
Thermal Cycling ◽  
Solder Joints ◽  
Low Cycle Fatigue ◽  
Inelastic Strain ◽  
Fatigue Reliability ◽  
Element Analysis ◽  
Mechanical Cycling ◽  
Experimental Apparatus ◽  
Dependent Strain ◽  
Accelerated Thermal Cycling

A thermo-mechanical loading system, which can superimpose a temperature and location dependent strain on solder joints, is proposed in order to conduct highly accelerated thermal-mechanical cycling (HATC) tests to assess thermal fatigue reliability of Ball Grid Array (BGA) solder joints in microelectronics packages. The application of this temperature and position dependent strain produces generally similar loading modes (shear and tension) encountered by BGA solder joints during service, but substantially enhances the inelastic strain accumulated during thermal cycling over the same temperature range as conventional ATC (accelerated thermal cycling) tests, thereby leading to a substantial acceleration of low-cycle fatigue damage. Finite element analysis was conducted to aid the design of experimental apparatus and to predict the fatigue life of solder joints in HATC testing. Detailed analysis of the loading locations required to produce failure at the appropriate joint (next to the die-edge ball) under the appropriate tension/shear stress partition are presented. The simulations showed that the proposed HATC test constitutes a valid methodology for further accelerating conventional ATC tests. An experimental apparatus, capable of applying the requisite loads to a BGA package was constructed, and experiments were conducted under both HATC and ATC conditions. It is shown that HATC proffers much reduced cycling times compared to ATC.

Reliability of Fan-Out Wafer-Level Heterogeneous Integration

2018 ◽  
Vol 15 (4) ◽  
pp. 148-162 ◽  
Author(s):  
John Lau ◽  
Ming Li ◽  
Yang Lei ◽  
Margie Li ◽  
Iris Xu ◽  
...  
Keyword(s):  
Thermal Cycling ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Circuit Board ◽  
Heterogeneous Integration ◽  
Thermal Cycling Test ◽  
Wafer Level ◽  
Molding Compound ◽  
Shock Test ◽  
Cycling Test

Abstract In this study, the reliability (thermal cycling and shock) performances of a fan-out wafer-level system-in-package (SiP) or heterogeneous integration with one large chip (5 × 5 mm), three small chips (3 ×3 mm), and four capacitors (0402) embedded in an epoxy molding compound package (10 × 10 mm) with two redistribution layers (RDLs) are experimentally determined. Emphasis is placed on the estimation of the Weibull life distribution, characteristic life, and failure rate of the solder joint and RDL of this package. The fan-out wafer-level packaging is assembled on a printed circuit board (PCB) with more than 400 (Sn3wt%Ag0.5wt%Cu) solder joints. It is a six-layer PCB. The sample sizes for the thermal cycling test and shock test are, respectively, equal to 60 and 24. The failure location and modes of the thermal cycling test and shock test of the fan-out wafer-level SiP solder joints and RDLs are provided and discussed. 3-D nonlinear finite element models are also constructed and analyzed for the fan-out heterogeneous integration package during thermal cycling and shock conditions. The simulation results are correlated to the experimental results. Finally, recommendations on improving the fan-out wafer-level SiP solder joints and RDLs under thermal and shock conditions are provided.

scholarly journals Effect of Structural Design Parameters on Wafer Level CSP Ball Shear Strength and Their Influence on Accelerated Thermal Cycling Reliability

2009 ◽  
Author(s):  
Nikhil Lakhkar ◽  
Puligandla Viswanadham ◽  
Dereje Agonafer
Keyword(s):  
Thermal Cycling ◽  
Shear Test ◽  
Solder Ball ◽  
Wafer Level ◽  
Ball Shear ◽  
Ball Size ◽  
Ball Shear Test ◽  
Accelerated Thermal Cycling ◽  
Ball Shear Strength ◽  
Board Level

Ball shear testing is typically conducted in Wafer level chip scale package (WLCSP) fabrication to estimate the strength of the solder ball attachment. Generally, the solder ball shear strength is dependent on the solder ball size, pad size, solder/pad interface treatment, reflow temperature and time. Solder ball strength is also a function of ram speed and height at which the ball is sheared with respect to the wafer. Recent investigations suggest that ball shear test is being used as an indicator for board level reliability of assemblies. In current market lead time for launching a new product is very short. Unfortunately, it takes several weeks to qualify a new product by board level qualification process. If there is a methodology through which one can predict the board level performance by extrapolating the wafer level test, it will save great amount of resources in testing and millions of dollars worth of testing time. In the first part of this study, we conducted a wafer level ball shear test. A DOE was created for varying wafer level structural parameters like solder ball size and type. Ball shear tests and Accelerated thermal cycling have similar failure signatures of compression on inner side and tension on outer side. Thus, for specific cases there is a possibility of correlating the two failure methodologies based on their failure signatures. Strain rate for ball shear test was determined based on shear speed and solder pad diameter. Strain rate for accelerated thermal cycling was determined based on difference in CTE between board and package. In this paper, results from ball shear test and accelerated thermal cycling are compared to find correlations for specific cases. The correlations derived from this study are statistical and empirical.

Effect of Corner Staking on the Fatigue Life of BGA Under Thermal Cycling

2017 ◽  
Author(s):  
Deng Yun Chen ◽  
Michael Osterman
Keyword(s):  
Fatigue Life ◽  
Thermal Cycling ◽  
Material Properties ◽  
Solder Joints ◽  
Material Selection ◽  
Temperature Cycling ◽  
Sac305 Solder ◽  
Element Analysis ◽  
Bga Packages ◽  
The Impact

Solder interconnects in electronic assemblies are susceptible to failures due to environmental high strain rate impact and cyclic stresses. To mitigate the failures, adhesive bonds can be added after the solder assembly process to provide additional mechanical support. For ball grid array (BGA) packages, the adhesive is normally applied to the corners of the package and referred to as corner staking. In addition to corner staking, underfill is also a strategy used to mitigate the stresses on the solder joints. While components with underfill has been widely studied, the study of the impact of corner staking on the reliability of packages remains limited. This paper presents a study of corner-staked BGA packages with tin-3.0 silver-0.5 copper (SAC305) solder subjected to temperature cycling. Experimental temperature cycling is conducted to examine impact of the selected corner staking material on the fatigue life of BGAs. Further, finite element analysis is conducted to understand the influence of material properties of staking material on the fatigue life of BGAs. The result of the study indicates that the presence of corner staking, with selected material properties, reduces the damage on the solder joints under thermal cycling, and thus increases its fatigue life by about 80%. This paper may serve as a guidance for staking material selection to improve the fatigue life of solder joints of BGAs under thermal cycling.

scholarly journals Creep-Fatigue Behaviours of Sn-Ag-Cu Solder Joints in Microelectronics Applications

2021 ◽  
Author(s):  
Joshua A. Depiver ◽  
Sabuj Mallik ◽  
Yiling Lu ◽  
Emeka H. Amalu
Keyword(s):  
Energy Density ◽  
Thermal Cycling ◽  
Strain Rate ◽  
Deformation Rate ◽  
Strain Energy Density ◽  
Strain Energy ◽  
Solder Joints ◽  
Creep Fatigue ◽  
Accelerated Thermal Cycling ◽  
Isothermal Ageing

Electronic manufacturing is one of the dynamic industries in the world in terms of leading technological advancements. Electronic assembly’s heart lies the ‘soldering technology’ and the ‘solder joints’ between electronic components and substrate. During the operation of electronic products, solder joints experience harsh environmental conditions in terms of cyclic change of temperature and vibration and exposure to moisture and chemicals. Due to the cyclic application of loads and higher operational temperature, solder joints fail primarily through creep and fatigue failures. This paper presents the creep-fatigue behaviours of solder joints in a ball grid array (BGA) soldered on a printed circuit board (PCB). Using finite element (FE) simulation, the solder joints were subjected to thermal cycling and isothermal ageing. Accelerated thermal cycling (ATC) was carried out using a temperate range from 40°C to 150°C, and isothermal ageing was done at −40, 25, 75 and 150°C temperatures for 45 days (64,800 mins). The solders studied are lead-based eutectic Sn63Pb37 and lead-free SAC305, SAC387, SAC396 and SAC405. The results were analysed using the failure criterion of equivalent stress, strain rate, deformation rate, and the solders’ strain energy density. The SAC405 and SAC396 have the least stress magnitude, strain rate, deformation rate, and strain energy density damage than the lead-based eutectic Sn63Pb37 solder; they have the highest fatigue lives based on the damage mechanisms. This research provides a technique for determining the preventive maintenance time of BGA components in mission-critical systems. Furthermore, it proposes developing a new life prediction model based on a combination of the damage parameters for improved prediction.

Reliability of Fan-Out Wafer-Level Heterogeneous Integration

2018 ◽  
Vol 2018 (1) ◽  
pp. 000224-000232 ◽  
Author(s):  
John Lau ◽  
Ming Li ◽  
Yang Lei ◽  
Margie Li ◽  
Iris Xu ◽  
...  
Keyword(s):  
Thermal Cycling ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Circuit Board ◽  
Heterogeneous Integration ◽  
Thermal Cycling Test ◽  
Wafer Level ◽  
Molding Compound ◽  
Shock Test ◽  
Cycling Test

Abstract In this study, the reliability (thermal-cycling and shock) performances of a fan-out wafer-level system-in-package (SiP) or heterogeneous integration with one large chip (5mm×5mm), three small chips (3mm×3mm), and 4 capacitors (0402) embedded in an epoxy molding compound (EMC) package (10mm×10mm) with two RDLs (redistribution layers) are experimentally determined. Emphasis is placed on the estimation of the Weibull life distribution, characteristic life, and failure rate of the solder joint and RDL of this package. The fan-out wafer-level packaging (FOWLP) is assembled on a printed circuit board (PCB) with more than 400 (Sn3wt%Ag0.5wt%Cu) solder joints. It is a 6-layer PCB. The sample sizes for the thermal-cycling test and shock test are, respectively, equal to 60 and 24. The failure location and modes of the thermal-cycling test and shock test of the fan-out wafer-level SiP solder joints and RDLs are provided and discussed. 3-D nonlinear finite element models are also constructed and analyzed for the fan-out heterogeneous integration package during thermal-cycling and shock conditions. The simulation results are correlated to the experimental results. Finally, recommendations on improving the fan-out wafer-level SiP solder joints and RDLs under thermal and shock conditions are provided.

Effect of Selected Manufacturing Variables on Reliability of Lead Free Solder Joints

2006 ◽  
Author(s):  
Leila Jannesari Ladani ◽  
Abhijit Dasgupta ◽  
Idelcio Cardoso ◽  
Eduardo Monlevade
Keyword(s):  
Thermal Cycling ◽  
Waiting Time ◽  
Solder Joints ◽  
Lead Free ◽  
Electrical Performance ◽  
Lead Free Solder ◽  
X Rays ◽  
Response Variable ◽  
Accelerated Thermal Cycling ◽  
Free Solder

This paper presents a systematic approach to study the effect of manufacturing variables on the creation of defects and the effect of those defects on the durability of lead free solder joints. An experiment was designed to systematically vary the reflow and printing process variables in order to fabricate error-seeded test assemblies. The error-seeded samples were then inspected visually and with x-rays, to identify different types of defects, and tested for electrical performance. The specimens were put under accelerated thermal cycling test to characterize the durability of specimens and to study the effect of each manufacturing variable on the durability of solder joints. Thus, the response variable for the design of experiments is the thermal cycling durability of the solder joints. Pre-test micro-structural analysis shows that specimens produced under inadequate reflow profiles suffer from insufficient wetting and insufficient intermetallic formation. Statistical analysis of the response variable shows that waiting time, heating ramp, peak temperature and cooling rate have non-linear effects on the response variable. Two variables, in particular (the heating ramp time and the waiting time), appear to have optimum values within the ranges investigated.

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