scholarly journals Step bunching-induced vertical lattice mismatch and crystallographic tilt in vicinal BiFeO3(001) films

2011 ◽  
Vol 98 (2) ◽  
pp. 022904 ◽  
Author(s):  
T. H. Kim ◽  
S. H. Baek ◽  
S. Y. Jang ◽  
S. M. Yang ◽  
S. H. Chang ◽  
...  
Author(s):  
E. F. Koch ◽  
E. L. Hall ◽  
S. W. Yang

The plane-front solidified eutectic alloys consisting of aligned tantalum monocarbide fibers in a nickel alloy matrix are currently under consideration for future aircraft and gas turbine blades. The MC fibers provide exceptional strength at high temperatures. In these alloys, the Ni matrix is strengthened by the precipitation of the coherent γ' phase (ordered L12 structure, nominally Ni3Al). The mechanical strength of these materials can be sensitively affected by overall alloy composition, and these strength variations can be due to several factors, including changes in solid solution strength of the γ matrix, changes in they γ' size or morphology, changes in the γ-γ' lattice mismatch or interfacial energy, or changes in the MC morphology, volume fraction, thermal stability, and stoichiometry. In order to differentiate between these various mechanisms, it is necessary to determine the partitioning of elemental additions between the γ,γ', and MC phases. This paper describes the results of such a study using energy dispersive X-ray spectroscopy in the analytical electron microscope.


Author(s):  
R. A. Ricks ◽  
Angus J. Porter

During a recent investigation concerning the growth of γ' precipitates in nickel-base superalloys it was observed that the sign of the lattice mismatch between the coherent particles and the matrix (γ) was important in determining the ease with which matrix dislocations could be incorporated into the interface to relieve coherency strains. Thus alloys with a negative misfit (ie. the γ' lattice parameter was smaller than the matrix) could lose coherency easily and γ/γ' interfaces would exhibit regularly spaced networks of dislocations, as shown in figure 1 for the case of Nimonic 115 (misfit = -0.15%). In contrast, γ' particles in alloys with a positive misfit could grow to a large size and not show any such dislocation arrangements in the interface, thus indicating that coherency had not been lost. Figure 2 depicts a large γ' precipitate in Nimonic 80A (misfit = +0.32%) showing few interfacial dislocations.


Author(s):  
F.-R. Chen ◽  
T. L. Lee ◽  
L. J. Chen

YSi2-x thin films were grown by depositing the yttrium metal thin films on (111)Si substrate followed by a rapid thermal annealing (RTA) at 450 to 1100°C. The x value of the YSi2-x films ranges from 0 to 0.3. The (0001) plane of the YSi2-x films have an ideal zero lattice mismatch relative to (111)Si surface lattice. The YSi2 has the hexagonal AlB2 crystal structure. The orientation relationship with Si was determined from the diffraction pattern shown in figure 1(a) to be and . The diffraction pattern in figure 1(a) was taken from a specimen annealed at 500°C for 15 second. As the annealing temperature was increased to 600°C, superlattice diffraction spots appear at position as seen in figure 1(b) which may be due to vacancy ordering in the YSi2-x films. The ordered vacancies in YSi2-x form a mesh in Si plane suggested by a LEED experiment.


Author(s):  
Karren L. More

Beta-SiC is an ideal candidate material for use in semiconductor device applications. Currently, monocrystalline β-SiC thin films are epitaxially grown on {100} Si substrates by chemical vapor deposition (CVD). These films, however, contain a high density of defects such as stacking faults, microtwins, and antiphase boundaries (APBs) as a result of the 20% lattice mismatch across the growth interface and an 8% difference in thermal expansion coefficients between Si and SiC. An ideal substrate material for the growth of β-SiC is α-SiC. Unfortunately, high purity, bulk α-SiC single crystals are very difficult to grow. The major source of SiC suitable for use as a substrate material is the random growth of {0001} 6H α-SiC crystals in an Acheson furnace used to make SiC grit for abrasive applications. To prepare clean, atomically smooth surfaces, the substrates are oxidized at 1473 K in flowing 02 for 1.5 h which removes ∽50 nm of the as-grown surface. The natural {0001} surface can terminate as either a Si (0001) layer or as a C (0001) layer.


Author(s):  
K.M. Hones ◽  
P. Sheldon ◽  
B.G. Yacobi ◽  
A. Mason

There is increasing interest in growing epitaxial GaAs on Si substrates. Such a device structure would allow low-cost substrates to be used for high-efficiency cascade- junction solar cells. However, high-defect densities may result from the large lattice mismatch (∼4%) between the GaAs epilayer and the silicon substrate. These defects can act as nonradiative recombination centers that can degrade the optical and electrical properties of the epitaxially grown GaAs. For this reason, it is important to optimize epilayer growth conditions in order to minimize resulting dislocation densities. The purpose of this paper is to provide an indication of the quality of the epitaxially grown GaAs layers by using transmission electron microscopy (TEM) to examine dislocation type and density as a function of various growth conditions. In this study an intermediate Ge layer was used to avoid nucleation difficulties observed for GaAs growth directly on Si substrates. GaAs/Ge epilayers were grown by molecular beam epitaxy (MBE) on Si substrates in a manner similar to that described previously.


Author(s):  
N. David Theodore ◽  
Andre Vantomme ◽  
Peter Crazier

Contact is typically made to source/drain regions of metal-oxide-semiconductor field-effect transistors (MOSFETs) by use of TiSi2 or CoSi2 layers followed by AI(Cu) metal lines. A silicide layer is used to reduce contact resistance. TiSi2 or CoSi2 are chosen for the contact layer because these silicides have low resistivities (~12-15 μΩ-cm for TiSi2 in the C54 phase, and ~10-15 μΩ-cm for CoSi2). CoSi2 has other desirable properties, such as being thermally stable up to >1000°C for surface layers and >1100°C for buried layers, and having a small lattice mismatch with silicon, -1.2% at room temperature. During CoSi2 growth, Co is the diffusing species. Electrode shorts and voids which can arise if Si is the diffusing species are therefore avoided. However, problems can arise due to silicide-Si interface roughness (leading to nonuniformity in film resistance) and thermal instability of the resistance upon further high temperature annealing. These problems can be avoided if the CoSi2 can be grown epitaxially on silicon.


Author(s):  
J.-Y. Wang ◽  
Y. Zhu ◽  
A.H. King ◽  
M. Suenaga

One outstanding problem in YBa2Cu3O7−δ superconductors is the weak link behavior of grain boundaries, especially boundaries with a large-angle misorientation. Increasing evidence shows that lattice mismatch at the boundaries contributes to variations in oxygen and cation concentrations at the boundaries, while the strain field surrounding a dislocation core at the boundary suppresses the superconducting order parameter. Thus, understanding the structure of the grain boundary and the grain boundary dislocations (which describe the topology of the boundary) is essential in elucidating the superconducting characteristics of boundaries. Here, we discuss our study of the structure of a Σ5 grain boundary by transmission electron microscopy. The characterization of the structure of the boundary was based on the coincidence site lattice (CSL) model.Fig.l shows two-beam images of the grain boundary near the projection. An array of grain boundary dislocations, with spacings of about 30nm, is clearly visible in Fig. 1(a), but invisible in Fig. 1(b).


Author(s):  
J.M. Bonar ◽  
R. Hull ◽  
R. Malik ◽  
R. Ryan ◽  
J.F. Walker

In this study we have examined a series of strained heteropeitaxial GaAs/InGaAs/GaAs and InGaAs/GaAs structures, both on (001) GaAs substrates. These heterostructures are potentially very interesting from a device standpoint because of improved band gap properties (InAs has a much smaller band gap than GaAs so there is a large band offset at the InGaAs/GaAs interface), and because of the much higher mobility of InAs. However, there is a 7.2% lattice mismatch between InAs and GaAs, so an InxGa1-xAs layer in a GaAs structure with even relatively low x will have a large amount of strain, and misfit dislocations are expected to form above some critical thickness. We attempt here to correlate the effect of misfit dislocations on the electronic properties of this material.The samples we examined consisted of 200Å InxGa1-xAs layered in a hetero-junction bipolar transistor (HBT) structure (InxGa1-xAs on top of a (001) GaAs buffer, followed by more GaAs, then a layer of AlGaAs and a GaAs cap), and a series consisting of a 200Å layer of InxGa1-xAs on a (001) GaAs substrate.


Author(s):  
A. Yamanaka ◽  
H. Ohse ◽  
K. Yagi

Recently current effects on clean and metal adsorbate surfaces have attracted much attention not only because of interesting phenomena but also because of practically importance in treatingclean and metal adsorbate surfaces [1-6]. In the former case, metals deposited migrate on the deposit depending on the current direction and a patch of the deposit expands on the clean surface [1]. The migration is closely related to the adsorbate structures and substrate structures including their anisotropy [2,7]. In the latter case, configurations of surface atomic steps depends on the current direction. In the case of Si(001) surface equally spaced array of monatom high steps along the [110] direction produces the 2x1 and 1x2 terraces. However, a relative terrace width of the two domain depends on the current direction; a step-up current widen terraces on which dimers are parallel to the current, while a step-down current widen the other terraces [3]. On (111) surface, a step-down current produces step bunching at temperatures between 1250-1350°C, while a step-up current produces step bunching at temperatures between 1050-1250°C [5].In the present paper, our REM observations on a current induced step bunching, started independently, are described.Our results are summarized as follows.(1) Above around 1000°C a step-up current induces step bunching. The phenomenon reverses around 1200 C; a step-down current induces step bunching. The observations agree with the previous reports [5].


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