Abstract
Heterogeneous packaging is one of the advanced technologies. Especially for high-end applications such as data center server, HPC and Artificial-Intelligence (AI), High-Bandwidth Memory (HBM) integration is a key and strongly required. As we know, the 2.5D silicon interposer packaging is an expanded solution for HBM interconnections. However, we developed 2.1D high density organic package called i-THOP® (integrated-Thin film High density Organic Package) to take advantages of an organic solution. Furthermore, we are now focusing on 2.3D i-THOP® to have more benefits in the manufacturing. The 2.3D structure consists of two substrates. One is a thin i-THOP® interposer, the other one is a conventional build-up (BU) substrate. These two substrates are combined as the interposer placed onto the build-up substrate. In this paper, the electrical properties of 2.3D i-THOP® are studied to confirm the possibility of the 2.3D structure organic packages from the perspective of signal and power integrity. Firstly, the signal integrity between two devices is simulated, comparing the differences between i-THOP® and the 2.5D silicon interposer. Secondly, the signal integrity in die-to-substrate vertical interconnection is simulated, comparing between 2.1D, 2.3D i-THOP® and the 2.5D silicon interposer. Finally, as for the power delivery point of view, power distribution network (PDN) impedance is compared between 2.1D and 2.3D i-THOP®.
Design of 2.5D Interposer in High Bandwidth Memory and Through Silicon Via for High Speed Signal
