A Low-Voltage Low-Noise CMOS Instrumentation Amplifier-for Portable Medical Monitoring Systems

Voltage Controlled Oscillator (VCO) is an integral component of most of the receivers such as GSM, GPS etc. As name indicates, oscillation is controlled by varying the voltage at the capacitor of LC tank. By varying the voltage, VCO can generate variable frequency of oscillation. Different VCO Parameters are contrasted on the basis of phase noise, tuning range, power consumption and FOM. Out of these phase noise is dependent on quality factor, power consumption, oscillation frequency and current. So, design of LC VCO at low power, low phase noise can be obtained with low bias current at low voltage. Nanosize transistors are also contributes towards low phase noise. This paper demonstrates the design of low phase noise LC VCO with 4.89 GHz tuning range from 7.33-11.22 GHz with center frequency at 7 GHz. The design uses 32nm technology with tuning voltage of 0-1.2 V. A very effective Phase noise of -114 dBc / Hz is obtained with FOM of -181 dBc/Hz. The proposed work has been compared with five peer LC VCO designs working at higher feature sizes and outcome of this performance comparison dictates that the proposed work working at better 32 nm technology outperformed amongst others in terms of achieving low Tuning voltage and moderate FoM, overshadowed by a little expense of power dissipation.

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LOW-NOISE SILICON-ON-INSULATOR HALL DEVICES

Fluctuation and Noise Letters ◽

10.1142/s021947750400194x ◽

2004 ◽

Vol 04 (02) ◽

pp. L345-L354 ◽

Cited By ~ 3

Author(s):

Y. HADDAB ◽

V. MOSSER ◽

M. LYSOWEC ◽

J. SUSKI ◽

L. DEMEUS ◽

...

Keyword(s):

Noise Level ◽

Low Voltage ◽

Silicon Layer ◽

Electrical Current ◽

Low Noise ◽

Silicon On Insulator ◽

Technological Parameters ◽

Wide Range ◽

Hall Sensors ◽

Soi Technology

Hall sensors are used in a very wide range of applications. A very demanding one is electrical current measurement for metering purposes. In addition to high precision and stability, a sufficiently low noise level is required. Cost reduction through sensor integration with low-voltage/low-power electronics is also desirable. The purpose of this work is to investigate the possible use of SOI (Silicon On Insulator) technology for this integration. We have fabricated SOI Hall devices exploring the useful range of silicon layer thickness and doping level. We show that noise is influenced by the presence of LOCOS and p-n depletion zones near the edges of the active zones of the devices. A proper choice of SOI technological parameters and process flow leads to up to 18 dB reduction in Hall sensor noise level. This result can be extended to many categories of devices fabricated using SOI technology.

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A Low-Voltage Fully-Integrated 4.5-6-GHz CMOS Variable Gain Low Noise Amplifier

33rd European Microwave Conference, 2003 ◽

10.1109/euma.2003.340814 ◽

2003 ◽

Author(s):

Ming-Da Tsai ◽

Ren-Chieh Liu ◽

Chin-Shen Lin ◽

Huei Wang

Keyword(s):

Low Voltage ◽

Low Noise ◽

Low Noise Amplifier ◽

Fully Integrated ◽

Variable Gain ◽

Noise Amplifier

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A 219-µW ultra-low power low-noise amplifier for IEEE 802.15.4 based battery powered, portable, wearable IoT applications

SN Applied Sciences ◽

10.1007/s42452-021-04402-0 ◽

2021 ◽

Vol 3 (4) ◽

Author(s):

S. Chrisben Gladson ◽

Adith Hari Narayana ◽

V. Thenmozhi ◽

M. Bhaskar

Keyword(s):

Low Power ◽

Ieee 802.15.4 ◽

Low Voltage ◽

Low Noise ◽

Low Noise Amplifier ◽

Cmos Process ◽

Process Technology ◽

Ultra Low Power ◽

Power Mode ◽

Noise Amplifier

AbstractDue to the increased processing data rates, which is required in applications such as fifth-generation (5G) wireless networks, the battery power will discharge rapidly. Hence, there is a need for the design of novel circuit topologies to cater the demand of ultra-low voltage and low power operation. In this paper, a low-noise amplifier (LNA) operating at ultra-low voltage is proposed to address the demands of battery-powered communication devices. The LNA dual shunt peaking and has two modes of operation. In low-power mode (Mode-I), the LNA achieves a high gain ($$S21$$ S 21 ) of 18.87 dB, minimum noise figure ($${NF}_{min.}$$ NF m i n . ) of 2.5 dB in the − 3 dB frequency range of 2.3–2.9 GHz, and third-order intercept point (IIP3) of − 7.9dBm when operating at 0.6 V supply. In high-power mode (Mode-II), the achieved gain, NF, and IIP3 are 21.36 dB, 2.3 dB, and 13.78dBm respectively when operating at 1 V supply. The proposed LNA is implemented in UMC 180 nm CMOS process technology with a core area of $$0.40{\mathrm{ mm}}^{2}$$ 0.40 mm 2 and the post-layout validation is performed using Cadence SpectreRF circuit simulator.

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Design of a Low-Noise, Fast Set-up and Low-Voltage Low-Dropout Regulator Featuring 230mA Load Current Range

10.36227/techrxiv.14636244 ◽

2021 ◽

Author(s):

Darshil Patel

Keyword(s):

Low Voltage ◽

Input Voltage ◽

Low Noise ◽

Cmos Process ◽

Transient Time ◽

Voltage Range ◽

Fast Transient ◽

Low Dropout Regulator ◽

Set Up ◽

Ldo Regulator

Low noise, high PSRR and fast transient low-dropout (LDO) regulators are critical for analog blocks such as ADCs, PLLs and RF SOC, etc. This paper presents design of low power, fast transient, high PSRR and high load-regulation low-dropout (LDO) regulator. The proposed LDO regulator is designed in 180nm. CMOS process and simulated in LTSpice and Cadence platform. The LDO proposed can support input voltage range up to 5V for loading currents up to 230mA. Measurements showed transient time or set-up time of less than 22µs, PSRR of ~66dB at 100kHz and >40dB at 1MHz and 0.8535mV of output voltage variation for a 0-230mA of load variation.

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Packaging of MEMS for Integrated RF Circuit Verifications

Additional Conferences (Device Packaging HiTEC HiTEN & CICMT) ◽

10.4071/2011dpc-tp24 ◽

2011 ◽

Vol 2011 (DPC) ◽

pp. 000926-000951

Author(s):

Bruce C. Kim ◽

Sai Evana ◽

Rahim Kasim

Keyword(s):

Low Voltage ◽

Cell Phones ◽

Deep Submicron ◽

Low Noise ◽

Low Noise Amplifiers ◽

Cmos Circuits ◽

Test Technique ◽

Mems Switches ◽

Network Routers ◽

Noise Amplifier

This paper provides development of MEMS switches and packaging of MEMS to test radio frequency circuits used in wireless products such as cell phones and network routers. We discuss fabrication of MEMS using low voltage magnetic materials and their configurations to achieve the optimum switch to test RF low noise amplifiers. We have accomplished a very unique methodology to test low noise amplifiers using built-in sellf-test technique and our MEMS switches are proposed to achieve the verification of low noise amplifiers. Furthermore, we have used MEMS switches that we developed to perform self calibration to correct for the parametric variations and faults within the deep submicron CMOS circuits. We also discuss packaging of MEMS and low noise amplifier using 3D TSV technology.

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