A Model for Assessing the Shape of Solder Joints in the Presence of PCB and Package Warpage

2005 ◽  
Vol 128 (3) ◽  
pp. 184-191 ◽  
Author(s):  
Mahidhar Rayasam ◽  
Terrace B. Thompson ◽  
Ganesh Subbarayan ◽  
C. Gurumurthy ◽  
J. R. Wilcox

Our goals in this paper are to develop and demonstrate a computationally efficient methodology for assessing the effect of circuit board warpage, component warpage, and solder volume variation on the shape of the solder joints in area array packages. The effect of warpage is analyzed using a two-step procedure in the present paper. In the first step, the restoring forces and moments (in the molten state of solder droplet) that result from a given solder joint height, solder material volume, pad diameter, and pad inclination are predicted using the surface tension theory. In the second step of the analysis, the forces and moments at individual solder joints caused by varying solder heights and pad tilts are combined to predict the equilibrium configuration of the package. A program written in the MATHEMATICA® environment was developed to implement the above-described methodology. The developed procedure was validated on an experimental test vehicle with nine solder joints. The heights of solder joints computed by the program matched the experimentally measured heights to within ±5% error. Further, the general capabilities of the modeling procedure are demonstrated by assuming complex combinations of package and PCB warpage.

1997 ◽  
Vol 119 (4) ◽  
pp. 268-274 ◽  
Author(s):  
A. F. Elkouh ◽  
N. Ramasubramanian ◽  
T. F. Hsu ◽  
N. J. Nigro ◽  
S. M. Heinrich ◽  
...  

Solutions for axisymmetric profiles of solder joints formed between a cylindrical pin and a printed circuit board (PCB) are presented. The dimensionless differential equation governing the formation of the solder joints is developed and then solved numerically for the cases of single upright joints, single inverted joints, and through-hole joints. Results are presented in terms of the following dimensionless parameters: bond number, solder volume, board thickness, and tinning radius. The dimensionless approach makes the results from this study suitable for use in a broader range of applications.


Author(s):  
VLADIMIR NIKULIN ◽  
TIAN-HSIANG HUANG ◽  
GEOFFREY J. MCLACHLAN

The method presented in this paper is novel as a natural combination of two mutually dependent steps. Feature selection is a key element (first step) in our classification system, which was employed during the 2010 International RSCTC data mining (bioinformatics) Challenge. The second step may be implemented using any suitable classifier such as linear regression, support vector machine or neural networks. We conducted leave-one-out (LOO) experiments with several feature selection techniques and classifiers. Based on the LOO evaluations, we decided to use feature selection with the separation type Wilcoxon-based criterion for all final submissions. The method presented in this paper was tested successfully during the RSCTC data mining Challenge, where we achieved the top score in the Basic track.


Author(s):  
Tae-Yong Park ◽  
Hyun-Ung Oh

Abstract To overcome the theoretical limitations of Steinberg's theory for evaluating the mechanical safety of the solder joints of spaceborne electronics in a launch random vibration environment, a critical strain-based methodology was proposed and validated in a previous study. However, for the critical strain-based methodology to be used reliably in the mechanical design of spaceborne electronics, its effectiveness must be validated under various conditions of the package mounting locations and the first eigenfrequencies of a printed circuit board (PCB); achieving this validation is the primary objective of this study. For the experimental validation, PCB specimens with ball grid array packages mounted on various board locations were fabricated and exposed to a random vibration environment to assess the fatigue life of the solder joint. The effectiveness of the critical strain-based methodology was validated through a comparison of the fatigue life of the tested packages and their margin of safety, which was estimated using various analytical approaches.


2015 ◽  
Vol 27 (1) ◽  
pp. 52-58 ◽  
Author(s):  
Peter K. Bernasko ◽  
Sabuj Mallik ◽  
G. Takyi

Purpose – The purpose of this paper is to study the effect of intermetallic compound (IMC) layer thickness on the shear strength of surface-mount component 1206 chip resistor solder joints. Design/methodology/approach – To evaluate the shear strength and IMC thickness of the 1206 chip resistor solder joints, the test vehicles were conventionally reflowed for 480 seconds at a peak temperature of 240°C at different isothermal ageing times of 100, 200 and 300 hours. A cross-sectional study was conducted on the reflowed and aged 1206 chip resistor solder joints. The shear strength of the solder joints aged at 100, 200 and 300 hours was measured using a shear tester (Dage-4000PXY bond tester). Findings – It was found that the growth of IMC layer thickness increases as the ageing time increases at a constant temperature of 175°C, which resulted in a reduction of solder joint strength due to its brittle nature. It was also found that the shear strength of the reflowed 1206 chip resistor solder joint was higher than the aged joints. Moreover, it was revealed that the shear strength of the 1206 resistor solder joints aged at 100, 200 and 300 hours was influenced by the ageing reaction times. The results also indicate that an increase in ageing time and temperature does not have much influence on the formation and growth of Kirkendall voids. Research limitations/implications – A proper correlation between shear strength and fracture mode is required. Practical implications – The IMC thickness can be used to predict the shear strength of the component/printed circuit board pad solder joint. Originality/value – The shear strength of the 1206 chip resistor solder joint is a function of ageing time and temperature (°C). Therefore, it is vital to consider the shear strength of the surface-mount chip component in high-temperature electronics.


2021 ◽  
Vol 2 (1) ◽  
pp. 01-21
Author(s):  
Pius ten Hacken

This paper addresses the question of the definition of compounding from a terminological perspective. In terminology, concepts are defined by a selection of properties shared by prototypical cases. For scientific terminology, the selection is validated by the strength of the theories that can use the definition. It is shown that morphophonological criteria often adduced in the delimitation of compounding are not adequate in a universal definition. In order to come up with a better definition, a two-step procedure is proposed. In the first step, a universal definition is used to determine for constructions in a particular language whether they belong to compounding. In the second step, language-specific properties are used to identify instances of these constructions. A definition is proposed that takes a compound as a word with a binary, headed structure, a relation between the elements that is not determined by compounding and a non-head that is not introduced as an entity in the discourse. The use of this definition is illustrated with a number of constructions in different languages. It is shown that expressions commonly called exocentric and copulative compounds are generally not compounds in this definition, but that some expressions that have been labelled as such are in fact compounds. The two-step procedure demonstrated here for compounding can also be used for other linguistic terms.


1984 ◽  
Vol 40 ◽  
Author(s):  
Donald S. Stone ◽  
Thomas R. Homa ◽  
Che-Yu Li

AbstractGrain boundary cavity growth in solder joints during thermal fatigue is analyzed. The stress cycle profile is estimated based on a geometrically simplified model of a ceramic chip carrier - printed circuit board assembly and a state variable equation for plastic flow in the solder.


2021 ◽  
Vol 18 (3) ◽  
pp. 137-144
Author(s):  
Dania Bani Hani ◽  
Raed Al Athamneh ◽  
Mohammed Aljarrah ◽  
Sa’d Hamasha

Abstract SAC-based alloys are one of the most common solder materials that are utilized to provide mechanical support and electrical connection between electronic components and the printed circuit board. Enhancing the mechanical properties of solder joints can improve the life of the components. One of the mechanical properties that define the solder joint structure integrity is the shear strength. The main objective of this study is to assess the shear strength behavior of SAC305 solder joints under different aging conditions. Instron 5948 Micromechanical Tester with a customized fixture is used to perform accelerated shear tests on individual solder joints. The shear strength of SAC305 solder joints with organic solderability preservative (OSP) surface finish is investigated at constant strain rate under different aging times (2, 10, 100, and 1,000 h) and different aging temperatures (50, 100, and 150°C). The nonaged solder joints are examined as well for comparison purposes. Analysis of variance (ANOVA) is accomplished to identify the contribution of each parameter on the shear strength. A general empirical model is developed to estimate the shear strength as a function of aging conditions using the Arrhenius term. Microstructure analysis is performed at different aging conditions using scanning electron microscope (SEM). The results revealed a significant reduction in the shear strength when the aging level is increased. An increase in the precipitates coarsening and intermetallic compound (IMC) layer thickness are observed with increased aging time and temperature.


2018 ◽  
Vol 15 (4) ◽  
pp. 148-162 ◽  
Author(s):  
John Lau ◽  
Ming Li ◽  
Yang Lei ◽  
Margie Li ◽  
Iris Xu ◽  
...  

Abstract In this study, the reliability (thermal cycling and shock) performances of a fan-out wafer-level system-in-package (SiP) or heterogeneous integration with one large chip (5 × 5 mm), three small chips (3 ×3 mm), and four capacitors (0402) embedded in an epoxy molding compound package (10 × 10 mm) with two redistribution layers (RDLs) are experimentally determined. Emphasis is placed on the estimation of the Weibull life distribution, characteristic life, and failure rate of the solder joint and RDL of this package. The fan-out wafer-level packaging is assembled on a printed circuit board (PCB) with more than 400 (Sn3wt%Ag0.5wt%Cu) solder joints. It is a six-layer PCB. The sample sizes for the thermal cycling test and shock test are, respectively, equal to 60 and 24. The failure location and modes of the thermal cycling test and shock test of the fan-out wafer-level SiP solder joints and RDLs are provided and discussed. 3-D nonlinear finite element models are also constructed and analyzed for the fan-out heterogeneous integration package during thermal cycling and shock conditions. The simulation results are correlated to the experimental results. Finally, recommendations on improving the fan-out wafer-level SiP solder joints and RDLs under thermal and shock conditions are provided.


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