A New Assembly-Transferred Microwave Switch With Suspended CMOS-Compatible Coplanar Waveguides

2001 ◽  
Author(s):  
Jen-Yi Chen ◽  
Long-Sun Huang ◽  
Chia-Hua Chu ◽  
I-Yin Li ◽  
Yao-Hui Kuo ◽  
...  
Keyword(s):  
Transmission Lines ◽  
High Performance ◽  
Low Voltage ◽  
Transmission Efficiency ◽  
Cmos Process ◽  
Driving Voltage ◽  
Coplanar Waveguides ◽  
Electrostatically Actuated ◽  
Functional Complex ◽  
Microwave Switch

Abstract The paper reports a new, transferred micromachined microwave switch on top of suspended transmission lines for high performance and Si-based CMOS compatibility. The micro assembly transfer technique is used to integrate functional complex structures of the mircomachined microwave switch and suspended coplanar waveguides. The electrostatically actuated torsional switch has been successfully driven in a low voltage of 17 volt. Furthermore, the resonance of its dynamic behavior is numerically calculated as 2.6 KHz. In summary, the new microwave switch with suspended Si-based coplanar waveguides presents low driving voltage, CMOS-process compatibility and potentially high transmission efficiency on a lossy Si-based substrate.

Design and Layout of a High-Performance PWM Control Class D Amplifiers IC Systems

2012 ◽  
Vol 203 ◽  
pp. 469-473
Author(s):  
Ruei Chang Chen ◽  
Shih Fong Lee
Keyword(s):  
Low Power ◽  
High Performance ◽  
Low Voltage ◽  
Design Flow ◽  
Total Power ◽  
Cmos Process ◽  
Low Power Circuits ◽  
Class D ◽  
Total Power Consumption ◽  
Power Circuits

This paper presents the design and implementation of a novel pulse width modulation control class D amplifiers chip. With high-performance, low-voltage, low-power and small area, these circuits are employed in portable electronic systems, such as the low-power circuits, wireless communication and high-frequency circuit systems. This class D chip followed the chip implementation center advanced design flow, and then was fabricated using Taiwan Semiconductor Manufacture Company 0.35-μm 2P4M mixed-signal CMOS process. The chip supply voltage is 3.3 V which can operate at a maximum frequency of 100 MHz. The total power consumption is 2.8307 mW, and the chip area size is 1.1497×1.1497 mm2. Finally, the class D chip was tested and the experimental results are discussed. From the excellent performance of the chip verified that it can be applied to audio amplifiers, low-power circuits, etc.

Highly Efficient Piezoelectric Actuators for Active Vibration Control

2003 ◽  
Vol 785 ◽  
Author(s):  
Enrico L. Colla ◽  
Ganesh Suyal ◽  
Sandrine Gentil ◽  
Nava Setter
Keyword(s):  
High Performance ◽  
Low Voltage ◽  
Active Vibration Control ◽  
Driving Voltage ◽  
Efficient Design ◽  
Mechanical Amplification ◽  
Active Vibration Damping ◽  
Active Vibration ◽  
Displacement Force ◽  
A New Technique

ABSTRACTAn high performance / inexpensive diskbender actuator was produced by combining efficient design and fabrication methods and a new technique to operate these actuators was developed and tested, which can enhance the displacement and force capabilities by almost a factor of 2 by using the same maximal driving voltage.The properties of these actuators are intermediate between those of standard bimorphs, used for very large displacements but providing rather small forces, and those of low voltage stack multilayers, which provide quite large forces but are generally heavier, larger and expensive for equivalent displacements. The absence of any external mechanical amplification mechanism and their geometry make these actuators particularly suitable for active vibration damping applications within buildings affected by perturbations of hundreds of μm or for noise control by emission of controlled sound in antiphase. The class of displacement/force, which can be obtained with suitably dimensioned actuators, provides sufficient high motion even for the lower audio frequency region (400–1500 Hz).In order to lower the driving voltages, multilayer diskbenders were also fabricated with the same technique. The number of layers does not influence the actuator displacement and force properties but the increased capacity of the actuator may require sophisticated driving amplifiers.

scholarly journals High-Linearity Self-Biased CMOS Current Buffer

Electronics ◽  
2018 ◽  
Vol 7 (12) ◽  
pp. 423
Author(s):  
Javier Martínez-Nieto ◽  
María Sanz-Pascual ◽  
Nicolás Medrano-Marqués ◽  
Belén Calvo-López ◽  
Arturo Sarmiento-Reyes
Keyword(s):  
High Performance ◽  
Simple Structure ◽  
Low Voltage ◽  
Harmonic Distortion ◽  
Input Resistance ◽  
Cmos Process ◽  
Output Current ◽  
Current Ratio ◽  
Class Ab ◽  
Static Power

A highly linear fully self-biased class AB current buffer designed in a standard 0.18 μ m CMOS process with 1.8 V power supply is presented in this paper. It is a simple structure that, with a static power consumption of 48 μ W, features an input resistance as low as 89 Ω , high accuracy in the input–output current ratio and total harmonic distortion (THD) figures lower than −60 dB at 30 μ A amplitude signal and 1 kHz frequency. Robustness was proved through Monte Carlo and corner simulations, and finally validated through experimental measurements, showing that the proposed configuration is a suitable choice for high performance low voltage low power applications.

Current State of Biological High-Resolution Scanning Electron Microscopy

1988 ◽  
Vol 46 ◽  
pp. 180-181 ◽  
Author(s):  
Klaus-Ruediger Peters
Keyword(s):  
High Performance ◽  
Low Voltage ◽  
Backscattered Electrons ◽  
Lens Position ◽  
Low Voltage Operation ◽  
Signal Collection ◽  
Probe Size ◽  
Electron Microscopes ◽  
Scanning Electron Microscopes ◽  
Scanning Electron

A new generation of high performance field emission scanning electron microscopes (FSEM) is now commercially available (JEOL 890, Hitachi S 900, ISI OS 130-F) characterized by an "in lens" position of the specimen where probe diameters are reduced and signal collection improved. Additionally, low voltage operation is extended to 1 kV. Compared to the first generation of FSEM (JE0L JSM 30, Hitachi S 800), which utilized a specimen position below the final lens, specimen size had to be reduced but useful magnification could be impressively increased in both low (1-4 kV) and high (5-40 kV) voltage operation, i.e. from 50,000 to 200,000 and 250,000 to 1,000,000 x respectively.At high accelerating voltage and magnification, contrasts on biological specimens are well characterized1 and are produced by the entering probe electrons in the outmost surface layer within -vl nm depth. Backscattered electrons produce only a background signal. Under these conditions (FIG. 1) image quality is similar to conventional TEM (FIG. 2) and only limited at magnifications >1,000,000 x by probe size (0.5 nm) or non-localization effects (%0.5 nm).

Analysis of 6T SRAM Cell in Different Technologies

2017 ◽  
Vol MCSP2017 (01) ◽  
pp. 7-10 ◽  
Author(s):  
Subhashree Rath ◽  
Siba Kumar Panda
Keyword(s):  
Low Power ◽  
Data Storage ◽  
Low Voltage ◽  
Random Access ◽  
Storage Device ◽  
Cmos Process ◽  
Process Technology ◽  
Digital Devices ◽  
Noise Margin ◽  
Sram Cell

Static random access memory (SRAM) is an important component of embedded cache memory of handheld digital devices. SRAM has become major data storage device due to its large storage density and less time to access. Exponential growth of low power digital devices has raised the demand of low voltage low power SRAM. This paper presents design and implementation of 6T SRAM cell in 180 nm, 90 nm and 45 nm standard CMOS process technology. The simulation has been done in Cadence Virtuoso environment. The performance analysis of SRAM cell has been evaluated in terms of delay, power and static noise margin (SNM).

Transient self back-biased buffer for low-voltage high-performance applications in standard CMOS technologies

1999 ◽  
Vol 35 (2) ◽  
pp. 112 ◽  
Author(s):  
Y. Moisiadis ◽  
I. Bouras ◽  
C. Papadas ◽  
J.-P. Schoellkopf
Keyword(s):  
High Performance ◽  
Low Voltage
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